diff --git a/tgt-vhdl/expr.cc b/tgt-vhdl/expr.cc index 36dbbd2a3..34a635201 100644 --- a/tgt-vhdl/expr.cc +++ b/tgt-vhdl/expr.cc @@ -49,8 +49,6 @@ static vhdl_var_ref *translate_signal(ivl_expr_t e) const vhdl_decl *decl = ent->get_arch()->get_decl(strip_var(renamed)); assert(decl); - std::cout << "ref: " << renamed << " width=" << decl->get_type()->get_width() << std::endl; - vhdl_type *type = new vhdl_type(*decl->get_type()); return new vhdl_var_ref(renamed, type); @@ -142,11 +140,8 @@ static vhdl_expr *translate_binary(ivl_expr_t e) else opwidth = lwidth; - std::cout << "lwidth=" << lwidth << " rwidth=" << rwidth << std::endl; - // For === and !== we need to compare std_logic_vectors // rather than signeds - int msb = ivl_expr_width(e) - 1; vhdl_type std_logic_vector(VHDL_TYPE_STD_LOGIC_VECTOR, opwidth-1, 0); bool vectorop = (lhs->get_type()->get_name() == VHDL_TYPE_SIGNED diff --git a/tgt-vhdl/vhdl_syntax.cc b/tgt-vhdl/vhdl_syntax.cc index 3f3d6261f..466ab7175 100644 --- a/tgt-vhdl/vhdl_syntax.cc +++ b/tgt-vhdl/vhdl_syntax.cc @@ -462,10 +462,10 @@ vhdl_expr::~vhdl_expr() */ vhdl_expr *vhdl_expr::cast(const vhdl_type *to) { - std::cout << "Cast: from=" << type_->get_string() - << " (" << type_->get_width() << ") " - << " to=" << to->get_string() << " (" - << to->get_width() << ")" << std::endl; + //std::cout << "Cast: from=" << type_->get_string() + // << " (" << type_->get_width() << ") " + // << " to=" << to->get_string() << " (" + // << to->get_width() << ")" << std::endl; if (to->get_name() == type_->get_name()) { if (to->get_width() == type_->get_width()) @@ -618,9 +618,6 @@ vhdl_const_bits::vhdl_const_bits(const char *value, int width, bool issigned) // Can't rely on value being NULL-terminated while (width--) value_.push_back(*value++); - - std::cout << (issigned ? "signed" : "unsigned") << " bits: " - << value_ << std::endl; } vhdl_expr *vhdl_const_bits::cast(const vhdl_type *to)