From 816aba993fdc74191ddaa0a7a01b5adaef16b7a9 Mon Sep 17 00:00:00 2001 From: steve Date: Tue, 26 Aug 2003 04:45:47 +0000 Subject: [PATCH] iverilog-vpi support --cflags a la gtk. --- iverilog-vpi.man | 41 +++++++++++++++++++++++++++- iverilog-vpi.sh | 20 ++++++++++++-- tgt-fpga/d-lpm.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 127 insertions(+), 5 deletions(-) diff --git a/iverilog-vpi.man b/iverilog-vpi.man index c54d98c8b..e91e7079e 100644 --- a/iverilog-vpi.man +++ b/iverilog-vpi.man @@ -1,4 +1,4 @@ -.TH iverilog-vpi 1 "$Date: 2003/07/15 03:49:22 $" Version "$Date: 2003/07/15 03:49:22 $" +.TH iverilog-vpi 1 "$Date: 2003/08/26 04:45:47 $" Version "$Date: 2003/08/26 04:45:47 $" .SH NAME iverilog-vpi - Compile front end for VPI modules @@ -55,6 +55,45 @@ install. This is the place where you installed Icarus Verilog when you ran the installer. This flag is also only needed once, and the path is stored in the registry for future use. +.SH "UNIX-ONLY OPTIONS" + +The UNIX version of \fIiverilog-vpi\fP includes additional flags to +let Makefile gurus peek at the configuration of the \fIiverilog\fP +installation. This way, Makefiles can be written that handle complex VPI +builds natively, and without hard-coding values that depend on the +system and installation. If used at all, these options must be +used one at a time, and without any other options or directives. + +.TP 8 +.B --cflags +Print the compiler flags (CFLAGS or CXXFLAGS) needed to compile source +code destined for a VPI module. + +.TP 8 +.B --ldflags +Print the linker flags (LDFLAGS) needed to link a VPI module. + +.TP 8 +.B --ldlibs +Print the libraries (LDLIBS) needed to link a VPI module. + +.P +Example GNU makefile that takes advantage of these flags: +.IP "" 4 +CFLAGS = -Wall -O $(CFLAGS_$@) +.br +VPI_CFLAGS := $(shell iverilog-vpi --cflags) +.br +CFLAGS_messagev.o = $(VPI_CFLAGS) +.br +CFLAGS_fifo.o = $(VPI_CFLAGS) +.br +messagev.o fifo.o: transport.h +.br +messagev.vpi: messagev.o fifo.o +.br + iverilog-vpi $^ + .SH "AUTHOR" .nf Steve Williams (steve@icarus.com) diff --git a/iverilog-vpi.sh b/iverilog-vpi.sh index c26be83ea..d6467abb9 100644 --- a/iverilog-vpi.sh +++ b/iverilog-vpi.sh @@ -17,7 +17,7 @@ # 59 Temple Place - Suite 330 # Boston, MA 02111-1307, USA # -#ident "$Id: iverilog-vpi.sh,v 1.9 2002/10/19 23:18:52 steve Exp $" +#ident "$Id: iverilog-vpi.sh,v 1.10 2003/08/26 04:45:47 steve Exp $" # These are the variables used for compiling files CC=gcc @@ -26,8 +26,8 @@ CFLAGS="@PIC@ -O -I@INCLUDEDIR@" # These are used for linking... LD=gcc -LDFLAGS="@SHARED@" -LDLIBS="-L@LIBDIR@ -lveriuser -lvpi" +LDFLAGS="@SHARED@ -L@LIBDIR@" +LDLIBS="-lveriuser -lvpi" CCSRC= CXSRC= @@ -69,6 +69,20 @@ do -l*) LIB="$LIB $parm" ;; + --cflags) + echo "$CFLAGS" + exit; + ;; + + --ldflags) + echo "$LDFLAGS" + exit; + ;; + + --ldlibs) + echo "$LDLIBS" + exit; + ;; esac done diff --git a/tgt-fpga/d-lpm.c b/tgt-fpga/d-lpm.c index 3dcc14017..7651bf4f8 100644 --- a/tgt-fpga/d-lpm.c +++ b/tgt-fpga/d-lpm.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: d-lpm.c,v 1.6 2003/08/15 02:23:53 steve Exp $" +#ident "$Id: d-lpm.c,v 1.7 2003/08/26 04:45:47 steve Exp $" #endif /* @@ -137,6 +137,62 @@ static edif_cell_t lpm_cell_or(unsigned siz) return cell; } +static edif_cell_t lpm_cell_and(unsigned siz) +{ + unsigned idx; + edif_cell_t cell; + char name[32]; + + sprintf(name, "and%u", siz); + + cell = edif_xlibrary_findcell(xlib, name); + if (cell != 0) + return cell; + + cell = edif_xcell_create(xlib, strdup(name), siz+1); + + edif_cell_portconfig(cell, 0, "Result0", IVL_SIP_OUTPUT); + + for (idx = 0 ; idx < siz ; idx += 1) { + sprintf(name, "Data%ux0", idx); + edif_cell_portconfig(cell, idx+1, strdup(name), IVL_SIP_INPUT); + } + + edif_cell_pstring(cell, "LPM_TYPE", "LPM_AND"); + edif_cell_pinteger(cell, "LPM_Width", 1); + edif_cell_pinteger(cell, "LPM_Size", siz); + + return cell; +} + +static edif_cell_t lpm_cell_xor(unsigned siz) +{ + unsigned idx; + edif_cell_t cell; + char name[32]; + + sprintf(name, "xor%u", siz); + + cell = edif_xlibrary_findcell(xlib, name); + if (cell != 0) + return cell; + + cell = edif_xcell_create(xlib, strdup(name), siz+1); + + edif_cell_portconfig(cell, 0, "Result0", IVL_SIP_OUTPUT); + + for (idx = 0 ; idx < siz ; idx += 1) { + sprintf(name, "Data%ux0", idx); + edif_cell_portconfig(cell, idx+1, strdup(name), IVL_SIP_INPUT); + } + + edif_cell_pstring(cell, "LPM_TYPE", "LPM_XOR"); + edif_cell_pinteger(cell, "LPM_Width", 1); + edif_cell_pinteger(cell, "LPM_Size", siz); + + return cell; +} + static edif_cell_t lpm_cell_nor(unsigned siz) { unsigned idx; @@ -332,6 +388,16 @@ static void lpm_logic(ivl_net_logic_t net) hookup_logic_gate(net, cell); break; + case IVL_LO_AND: + cell = lpm_cell_and(ivl_logic_pins(net)-1); + hookup_logic_gate( net, cell); + break; + + case IVL_LO_XOR: + cell = lpm_cell_xor(ivl_logic_pins(net)-1); + hookup_logic_gate( net, cell); + break; + default: fprintf(stderr, "UNSUPPORTED LOGIC TYPE: %u\n", ivl_logic_type(net)); @@ -705,6 +771,9 @@ const struct device_s d_lpm_edif = { /* * $Log: d-lpm.c,v $ + * Revision 1.7 2003/08/26 04:45:47 steve + * iverilog-vpi support --cflags a la gtk. + * * Revision 1.6 2003/08/15 02:23:53 steve * Add synthesis support for synchronous reset. *