diff --git a/Makefile.in b/Makefile.in index da6a224a3..0a0235763 100644 --- a/Makefile.in +++ b/Makefile.in @@ -18,7 +18,7 @@ # 59 Temple Place - Suite 330 # Boston, MA 02111-1307, USA # -#ident "$Id: Makefile.in,v 1.68 2000/09/20 01:02:13 steve Exp $" +#ident "$Id: Makefile.in,v 1.69 2000/09/23 05:15:07 steve Exp $" # # SHELL = /bin/sh @@ -69,7 +69,8 @@ distclean: clean rm -f config.status config.cache config.log rm -f Makefile -TT = t-dll.o t-dll-api.o t-dll-proc.o t-null.o t-verilog.o t-vvm.o t-xnf.o +TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-null.o \ +t-verilog.o t-vvm.o t-xnf.o FF = nodangle.o synth.o syn-rules.o xnfio.o O = main.o cprop.o design_dump.o dup_expr.o elaborate.o elab_expr.o \ diff --git a/configure.in b/configure.in index fb043b22f..dba24c3a4 100644 --- a/configure.in +++ b/configure.in @@ -75,4 +75,4 @@ AC_SUBST(rdynamic) AC_MSG_RESULT($rdynamic) -AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile vvm/Makefile tgt-stub/Makefile) +AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile vvm/Makefile tgt-stub/Makefile tgt-verilog/Makefile) diff --git a/ivl_target.h b/ivl_target.h index 9d0b6fa53..15c2d8709 100644 --- a/ivl_target.h +++ b/ivl_target.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: ivl_target.h,v 1.9 2000/09/22 03:58:30 steve Exp $" +#ident "$Id: ivl_target.h,v 1.10 2000/09/23 05:15:07 steve Exp $" #endif #ifdef __cplusplus @@ -58,7 +58,7 @@ _BEGIN_DECL * around. */ typedef struct ivl_design_s *ivl_design_t; - +typedef struct ivl_expr_s *ivl_expr_t; typedef struct ivl_net_bufz_s *ivl_net_bufz_t; typedef struct ivl_net_const_s*ivl_net_const_t; typedef struct ivl_net_event_s*ivl_net_event_t; @@ -76,6 +76,12 @@ typedef struct ivl_statement_s*ivl_statement_t; * changes and additions to the enumerations. */ +typedef enum ivl_expr_type_e { + IVL_EX_NONE = 0, + IVL_EX_NUMBER, + IVL_EX_STRING +} ivl_expr_type_t; + typedef enum ivl_logic_e { IVL_LO_NONE = 0, IVL_LO_AND, @@ -126,6 +132,17 @@ extern const char* ivl_get_flag(ivl_design_t, const char*key); /* Get the name of the root module. This can be used as the design name. */ extern const char* ivl_get_root_name(ivl_design_t net); +/* EXPRESSION + * These methods operate on expression objects from the + * design. Expressions mainly exist in behavioral code. The + * ivl_expr_type() function returns the type of the expression node, + * and the remaining functions access value bits of the expression. + */ +extern ivl_expr_type_t ivl_expr_type(ivl_expr_t net); + +extern const char* ivl_expr_string(ivl_expr_t net); + + /* LOGIC * These types and functions support manipulation of logic gates. The * ivl_logic_t enumeration identifies the various kinds of gates that @@ -194,6 +211,10 @@ extern ivl_statement_t ivl_stmt_cond_true(ivl_statement_t net); extern unsigned long ivl_stmt_delay_val(ivl_statement_t net); /* IVL_ST_STASK */ extern const char* ivl_stmt_name(ivl_statement_t net); + /* IVL_ST_STASK */ +extern ivl_expr_t ivl_stmt_parm(ivl_statement_t net, unsigned idx); + /* IVL_ST_STASK */ +extern unsigned ivl_stmt_parm_count(ivl_statement_t net); /* IVL_ST_DELAY, IVL_ST_WAIT, IVL_ST_WHILE */ extern ivl_statement_t ivl_stmt_sub_stmt(ivl_statement_t net); @@ -303,6 +324,9 @@ _END_DECL /* * $Log: ivl_target.h,v $ + * Revision 1.10 2000/09/23 05:15:07 steve + * Add enough tgt-verilog code to support hello world. + * * Revision 1.9 2000/09/22 03:58:30 steve * Access to the name of a system task call. * diff --git a/t-dll-api.cc b/t-dll-api.cc index 375178785..cf91a28a7 100644 --- a/t-dll-api.cc +++ b/t-dll-api.cc @@ -17,13 +17,18 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: t-dll-api.cc,v 1.3 2000/09/22 03:58:30 steve Exp $" +#ident "$Id: t-dll-api.cc,v 1.4 2000/09/23 05:15:07 steve Exp $" #endif # include "t-dll.h" /* THE FOLLOWING ARE FUNCTIONS THAT ARE CALLED FROM THE TARGET. */ +extern "C" ivl_expr_type_t ivl_expr_type(ivl_expr_t net) +{ + return net->type_; +} + extern "C" const char*ivl_get_flag(ivl_design_t des, const char*key) { return ((const Design*)des)->get_flag(key).c_str(); @@ -34,6 +39,12 @@ extern "C" const char*ivl_get_root_name(ivl_design_t des) return ((const Design*)des)->find_root_scope()->name().c_str(); } +extern "C" const char* ivl_expr_string(ivl_expr_t net) +{ + assert(net->type_ == IVL_EX_STRING); + return net->u_.string_.value_; +} + extern "C" ivl_logic_t ivl_get_logic_type(ivl_net_logic_t net) { switch (net->dev_->type()) { @@ -133,6 +144,30 @@ extern "C" const char* ivl_stmt_name(ivl_statement_t net) return 0; } +extern "C" ivl_expr_t ivl_stmt_parm(ivl_statement_t net, unsigned idx) +{ + switch (net->type_) { + case IVL_ST_STASK: + assert(idx < net->u_.stask_.nparm_); + return net->u_.stask_.parms_[idx]; + + default: + assert(0); + } + return 0; +} + +extern "C" unsigned ivl_stmt_parm_count(ivl_statement_t net) +{ + switch (net->type_) { + case IVL_ST_STASK: + return net->u_.stask_.nparm_; + default: + assert(0); + } + return 0; +} + extern "C" ivl_statement_t ivl_stmt_sub_stmt(ivl_statement_t net) { switch (net->type_) { @@ -151,6 +186,9 @@ extern "C" ivl_statement_t ivl_stmt_sub_stmt(ivl_statement_t net) /* * $Log: t-dll-api.cc,v $ + * Revision 1.4 2000/09/23 05:15:07 steve + * Add enough tgt-verilog code to support hello world. + * * Revision 1.3 2000/09/22 03:58:30 steve * Access to the name of a system task call. * diff --git a/t-dll-expr.cc b/t-dll-expr.cc new file mode 100644 index 000000000..a69584391 --- /dev/null +++ b/t-dll-expr.cc @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2000 Stephen Williams (steve@icarus.com) + * + * This source code is free software; you can redistribute it + * and/or modify it in source code form under the terms of the GNU + * General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ +#if !defined(WINNT) & !defined(macintosh) +#ident "$Id: t-dll-expr.cc,v 1.1 2000/09/23 05:15:07 steve Exp $" +#endif + +# include "t-dll.h" +# include "netlist.h" +# include + + +void dll_target::expr_const(const NetEConst*net) +{ + assert(expr_ == 0); + + expr_ = (ivl_expr_t)calloc(1, sizeof(struct ivl_expr_s)); + assert(expr_); + + if (net->value().is_string()) { + expr_->type_ = IVL_EX_STRING; + expr_->u_.string_.value_ =strdup(net->value().as_string().c_str()); + + } else { + expr_->type_ = IVL_EX_NUMBER; + + } +} + +/* + * $Log: t-dll-expr.cc,v $ + * Revision 1.1 2000/09/23 05:15:07 steve + * Add enough tgt-verilog code to support hello world. + * + */ + diff --git a/t-dll-proc.cc b/t-dll-proc.cc index 88c80ba28..5113cd3c9 100644 --- a/t-dll-proc.cc +++ b/t-dll-proc.cc @@ -18,7 +18,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: t-dll-proc.cc,v 1.3 2000/09/22 03:58:30 steve Exp $" +#ident "$Id: t-dll-proc.cc,v 1.4 2000/09/23 05:15:07 steve Exp $" #endif # include "target.h" @@ -196,11 +196,22 @@ bool dll_target::proc_delay(const NetPDelay*net) void dll_target::proc_stask(const NetSTask*net) { + unsigned nparms = net->nparms(); assert(stmt_cur_); assert(stmt_cur_->type_ == IVL_ST_NONE); stmt_cur_->type_ = IVL_ST_STASK; stmt_cur_->u_.stask_.name_ = strdup(net->name()); + stmt_cur_->u_.stask_.nparm_= nparms; + stmt_cur_->u_.stask_.parms_= (ivl_expr_t*) + calloc(nparms, sizeof(ivl_expr_t)); + + for (unsigned idx = 0 ; idx < nparms ; idx += 1) { + expr_ = 0; + net->parm(idx)->expr_scan(this); + stmt_cur_->u_.stask_.parms_[idx] = expr_; + } + } bool dll_target::proc_wait(const NetEvWait*net) @@ -243,6 +254,9 @@ void dll_target::proc_while(const NetWhile*net) /* * $Log: t-dll-proc.cc,v $ + * Revision 1.4 2000/09/23 05:15:07 steve + * Add enough tgt-verilog code to support hello world. + * * Revision 1.3 2000/09/22 03:58:30 steve * Access to the name of a system task call. * diff --git a/t-dll.h b/t-dll.h index d9379adbc..0668044be 100644 --- a/t-dll.h +++ b/t-dll.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: t-dll.h,v 1.3 2000/09/22 03:58:30 steve Exp $" +#ident "$Id: t-dll.h,v 1.4 2000/09/23 05:15:07 steve Exp $" #endif # include "target.h" @@ -32,7 +32,7 @@ * DLL will call me back to get information out of the netlist in * particular. */ -struct dll_target : public target_t { +struct dll_target : public target_t, public expr_scan_t { bool start_design(const Design*); void end_design(const Design*); @@ -75,13 +75,24 @@ struct dll_target : public target_t { void proc_stask(const NetSTask*); bool proc_wait(const NetEvWait*); void proc_while(const NetWhile*); -}; + struct ivl_expr_s*expr_; + void expr_const(const NetEConst*net); +}; /* * These are various private declarations used by the t-dll target. */ +struct ivl_expr_s { + ivl_expr_type_t type_; + + union { + struct { + char*value_; + } string_; + } u_; +}; struct ivl_net_const_s { const NetConst*con_; @@ -125,6 +136,8 @@ struct ivl_statement_s { struct { /* IVL_ST_STASK */ char* name_; + unsigned nparm_; + ivl_expr_t*parms_; } stask_; struct { /* IVL_ST_WAIT */ @@ -141,6 +154,9 @@ struct ivl_statement_s { /* * $Log: t-dll.h,v $ + * Revision 1.4 2000/09/23 05:15:07 steve + * Add enough tgt-verilog code to support hello world. + * * Revision 1.3 2000/09/22 03:58:30 steve * Access to the name of a system task call. * diff --git a/tgt-verilog/.cvsignore b/tgt-verilog/.cvsignore new file mode 100644 index 000000000..fe70cd40f --- /dev/null +++ b/tgt-verilog/.cvsignore @@ -0,0 +1,3 @@ +Makefile +verilog.tgt +dep diff --git a/tgt-verilog/Makefile.in b/tgt-verilog/Makefile.in new file mode 100644 index 000000000..c4debcac5 --- /dev/null +++ b/tgt-verilog/Makefile.in @@ -0,0 +1,75 @@ +# +# This source code is free software; you can redistribute it +# and/or modify it in source code form under the terms of the GNU +# Library General Public License as published by the Free Software +# Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU Library General Public License for more details. +# +# You should have received a copy of the GNU Library General Public +# License along with this program; if not, write to the Free +# Software Foundation, Inc., +# 59 Temple Place - Suite 330 +# Boston, MA 02111-1307, USA +# +#ident "$Id: Makefile.in,v 1.1 2000/09/23 05:15:07 steve Exp $" +# +# +SHELL = /bin/sh + +VERSION = 0.0 + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +srcdir = @srcdir@ + +VPATH = $(srcdir) + +bindir = $(exec_prefix)/bin +libdir = $(exec_prefix)/lib +includedir = $(prefix)/include + +CC = @CC@ +CXX = @CXX@ +INSTALL = @INSTALL@ +INSTALL_PROGRAM = @INSTALL_PROGRAM@ +INSTALL_DATA = @INSTALL_DATA@ + +CPPFLAGS = @CPPFLAGS@ @DEFS@ -fpic +CXXFLAGS = @CXXFLAGS@ +LDFLAGS = @LDFLAGS@ + +all: verilog.tgt + +%.o dep/%.d: %.c + @[ -d dep ] || mkdir dep + $(CC) -Wall $(CPPFLAGS) -I$(srcdir)/.. -MD -c $< -o $*.o + mv $*.d dep + +O = verilog.o + +verilog.tgt: $O + $(CC) -shared -o $@ $O + +clean: + rm -f *.o dep/*.d + +install: all installdirs $(libdir)/ivl/verilog.tgt \ + $(includedir)/vpi_user.h + +$(libdir)/ivl/verilog.tgt: ./verilog.tgt + $(INSTALL_DATA) ./verilog.tgt $(libdir)/ivl/verilog.tgt + + +installdirs: ../mkinstalldirs + $(srcdir)/../mkinstalldirs $(libdir)/ivl + +uninstall: + rm -f $(libdir)/ivl/verilog.tgt + + +-include $(patsubst %.o, dep/%.d, $O) diff --git a/tgt-verilog/verilog.c b/tgt-verilog/verilog.c new file mode 100644 index 000000000..549e47e2e --- /dev/null +++ b/tgt-verilog/verilog.c @@ -0,0 +1,263 @@ +/* + * Copyright (c) 2000 Stephen Williams (steve@icarus.com) + * + * This source code is free software; you can redistribute it + * and/or modify it in source code form under the terms of the GNU + * General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ +#if !defined(WINNT) && !defined(macintosh) +#ident "$Id: verilog.c,v 1.1 2000/09/23 05:15:07 steve Exp $" +#endif + +/* + * This is a sample target module. All this does is write to the + * output file some information about each object handle when each of + * the various object functions is called. This can be used to + * understand the behavior of the core as it uses a target module. + */ + +# include +# include + +static FILE*out; + +int target_start_design(ivl_design_t des) +{ + const char*path = ivl_get_flag(des, "-o"); + if (path == 0) { + return -1; + } + + out = fopen(path, "w"); + if (out == 0) { + perror(path); + return -2; + } + + fprintf(out, "module %s;\n", ivl_get_root_name(des)); + return 0; +} + +void target_end_design(ivl_design_t des) +{ + fprintf(out, "endmodule\n"); + fclose(out); +} + +int target_net_bufz(const char*name, ivl_net_bufz_t net) +{ + fprintf(out, "STUB: %s: BUFZ\n", name); + return 0; +} + +int target_net_const(const char*name, ivl_net_const_t net) +{ + fprintf(out, "STUB: %s: constant\n", name); + return 0; +} + +int target_net_event(const char*name, ivl_net_event_t net) +{ + fprintf(out, "STUB: %s: event\n", name); + return 0; +} + +int target_net_logic(const char*name, ivl_net_logic_t net) +{ + unsigned npins, idx; + + switch (ivl_get_logic_type(net)) { + case IVL_LO_AND: + fprintf(out, " and %s (%s", name, + ivl_get_nexus_name(ivl_get_logic_pin(net, 0))); + break; + case IVL_LO_OR: + fprintf(out, " or %s (%s", name, + ivl_get_nexus_name(ivl_get_logic_pin(net, 0))); + break; + default: + fprintf(out, "STUB: %s: unsupported gate\n", name); + return -1; + } + + npins = ivl_get_logic_pins(net); + for (idx = 1 ; idx < npins ; idx += 1) + fprintf(out, ", %s", + ivl_get_nexus_name(ivl_get_logic_pin(net,idx))); + + fprintf(out, ");\n"); + + return 0; +} + +int target_net_probe(const char*name, ivl_net_probe_t net) +{ + fprintf(out, "STUB: %s: probe\n", name); + return 0; +} + +int target_net_signal(const char*name, ivl_net_signal_t net) +{ + fprintf(out, "STUB: %s: signal [%u]\n", name, ivl_get_signal_pins(net)); + return 0; +} + +static void show_expression(ivl_expr_t net) +{ + if (net == 0) + return; + + switch (ivl_expr_type(net)) { + case IVL_EX_STRING: + fprintf(out, "\"%s\"", ivl_expr_string(net)); + break; + + default: + fprintf(out, "..."); + } +} + +static void show_statement(ivl_statement_t net, unsigned ind) +{ + const ivl_statement_type_t code = ivl_statement_type(net); + + switch (code) { + case IVL_ST_ASSIGN: + fprintf(out, "%*s? = ?;\n", ind, ""); + break; + + case IVL_ST_BLOCK: { + unsigned cnt = ivl_stmt_block_count(net); + unsigned idx; + fprintf(out, "%*sbegin\n", ind, ""); + for (idx = 0 ; idx < cnt ; idx += 1) { + ivl_statement_t cur = ivl_stmt_block_stmt(net, idx); + show_statement(cur, ind+4); + } + fprintf(out, "%*send\n", ind, ""); + break; + } + + case IVL_ST_CONDIT: { + ivl_statement_t t = ivl_stmt_cond_true(net); + ivl_statement_t f = ivl_stmt_cond_false(net); + + fprintf(out, "%*sif (...)\n", ind, ""); + if (t) + show_statement(t, ind+4); + else + fprintf(out, "%*s;\n", ind+4, ""); + + if (f) { + fprintf(out, "%*selse\n", ind, ""); + show_statement(f, ind+4); + } + + break; + } + + case IVL_ST_DELAY: + fprintf(out, "%*s#%lu\n", ind, "", ivl_stmt_delay_val(net)); + show_statement(ivl_stmt_sub_stmt(net), ind+2); + break; + + case IVL_ST_NOOP: + fprintf(out, "%*s/* noop */;\n", ind, ""); + break; + + case IVL_ST_STASK: + if (ivl_stmt_parm_count(net) == 0) { + fprintf(out, "%*s%s;\n", ind, "", ivl_stmt_name(net)); + + } else { + unsigned idx; + fprintf(out, "%*s%s(", ind, "", ivl_stmt_name(net)); + show_expression(ivl_stmt_parm(net, 0)); + for (idx = 1 ; idx < ivl_stmt_parm_count(net) ; idx += 1) { + fprintf(out, ", "); + show_expression(ivl_stmt_parm(net, idx)); + } + fprintf(out, ");\n"); + } + break; + + case IVL_ST_WAIT: + fprintf(out, "%*s@(...)\n", ind, ""); + show_statement(ivl_stmt_sub_stmt(net), ind+2); + break; + + case IVL_ST_WHILE: + fprintf(out, "%*swhile ()\n", ind, ""); + show_statement(ivl_stmt_sub_stmt(net), ind+2); + break; + + default: + fprintf(out, "%*sunknown statement type (%u)\n", ind, "", code); + } +} + +int target_process(ivl_process_t net) +{ + switch (ivl_get_process_type(net)) { + case IVL_PR_INITIAL: + fprintf(out, " initial\n"); + break; + case IVL_PR_ALWAYS: + fprintf(out, " always\n"); + break; + } + + show_statement(ivl_get_process_stmt(net), 8); + + return 0; +} + +/* + * $Log: verilog.c,v $ + * Revision 1.1 2000/09/23 05:15:07 steve + * Add enough tgt-verilog code to support hello world. + * + * Revision 1.9 2000/09/22 03:58:30 steve + * Access to the name of a system task call. + * + * Revision 1.8 2000/09/19 04:15:27 steve + * Introduce the means to get statement types. + * + * Revision 1.7 2000/09/18 01:24:32 steve + * Get the structure for ivl_statement_t worked out. + * + * Revision 1.6 2000/08/27 15:51:51 steve + * t-dll iterates signals, and passes them to the + * target module. + * + * Some of NetObj should return char*, not string. + * + * Revision 1.5 2000/08/26 00:54:03 steve + * Get at gate information for ivl_target interface. + * + * Revision 1.4 2000/08/20 04:13:57 steve + * Add ivl_target support for logic gates, and + * make the interface more accessible. + * + * Revision 1.3 2000/08/19 18:12:42 steve + * Add target calls for scope, events and logic. + * + * Revision 1.2 2000/08/14 04:39:57 steve + * add th t-dll functions for net_const, net_bufz and processes. + * + * Revision 1.1 2000/08/12 16:34:37 steve + * Start stub for loadable targets. + * + */ +