diff --git a/elaborate.cc b/elaborate.cc
index b2a14b36d..0d224ef6e 100644
--- a/elaborate.cc
+++ b/elaborate.cc
@@ -2254,7 +2254,8 @@ void PGModule::elaborate_scope(Design*des, NetScope*sc) const
 	// Not a module or primitive that I know about yet, so try to
 	// load a library module file (which parses some new Verilog
 	// code) and try again.
-      if (load_module(type_)) {
+      int parser_errors = 0;
+      if (load_module(type_, parser_errors)) {
 
 	      // Try again to find the module type
 	    mod = pform_modules.find(type_);
@@ -2269,6 +2270,10 @@ void PGModule::elaborate_scope(Design*des, NetScope*sc) const
 		  return;
       }
 
+      if (parser_errors) {
+            cerr << get_fileline() << ": error: Failed to parse library file." << endl;
+            des->errors += parser_errors + 1;
+      }
 
 	// Not a module or primitive that I know about or can find by
 	// any means, so give up.
diff --git a/load_module.cc b/load_module.cc
index 665b865e9..7f558aad7 100644
--- a/load_module.cc
+++ b/load_module.cc
@@ -54,11 +54,13 @@ extern FILE *depend_file;
  * Use the type name as a key, and search the module library for a
  * file name that has that key.
  */
-bool load_module(const char*type)
+bool load_module(const char*type, int&parser_errors)
 {
       char path[4096];
       char*ltype = strdup(type);
 
+      parser_errors = 0;
+
       for (char*tmp = ltype ; *tmp ;  tmp += 1)
 	    *tmp = tolower(*tmp);
 
@@ -98,7 +100,7 @@ bool load_module(const char*type)
 		  if (verbose_flag)
 			cerr << "...parsing output from preprocessor..." << endl << flush;
 
-		  pform_parse(path, file);
+		  parser_errors = pform_parse(path, file);
 		  pclose(file);
 		  free(cmdline);
 
@@ -109,14 +111,14 @@ bool load_module(const char*type)
 
 		  FILE*file = fopen(path, "r");
 		  assert(file);
-		  pform_parse(path, file);
+		  parser_errors = pform_parse(path, file);
 		  fclose(file);
 	    }
 
 	    if (verbose_flag)
 		  cerr << "... Load module complete." << endl << flush;
 
-	    return true;
+	    return parser_errors == 0;
       }
 
 
diff --git a/util.h b/util.h
index d94919af5..d0ebc90ea 100644
--- a/util.h
+++ b/util.h
@@ -34,7 +34,7 @@ class NetScope;
  * looking for a plausible Verilog file to hold the module, and
  * invoking the parser to bring in that file's contents.
  */
-extern bool load_module(const char*type);
+extern bool load_module(const char*type, int&parser_errors);