diff --git a/ivtest/ivltests/localparam_implicit3.v b/ivtest/ivltests/localparam_implicit3.v
new file mode 100644
index 000000000..54ced0465
--- /dev/null
+++ b/ivtest/ivltests/localparam_implicit3.v
@@ -0,0 +1,30 @@
+// Check that all parameters in a parameter port list after a `localparam` get
+// elaborated as localparams, until the next `parameter`. Check that this is the
+// case even when the data type of the parameter is redefined.
+
+module a #(
+  parameter A = 1, B = 2,
+  localparam C = 3, real D = 4,
+  parameter E = 5
+);
+
+initial begin
+  if (A == 10 && B == 20 && C == 3 && D == 4 && E == 50) begin
+    $display("PASSED");
+  end else begin
+    $display("FAILED");
+  end
+end
+
+endmodule
+
+module b;
+
+  a #(
+    .A(10),
+    .B(20),
+    .D(40), // This will cause an error
+    .E(50)
+  ) i_a();
+
+endmodule
diff --git a/ivtest/ivltests/parameter_omit1.v b/ivtest/ivltests/parameter_omit1.v
new file mode 100644
index 000000000..1f635eb09
--- /dev/null
+++ b/ivtest/ivltests/parameter_omit1.v
@@ -0,0 +1,17 @@
+// Tests that it possible to omit the initial `parameter` keyword in a parameter
+// port list in SystemVerilog. In Verilog this is not allowed and should result
+// in an error.
+
+module a #(A = 1);
+  initial begin
+    if (A == 10) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+endmodule
+
+module test;
+  a #(.A(10)) i_a();
+endmodule
diff --git a/ivtest/ivltests/parameter_omit2.v b/ivtest/ivltests/parameter_omit2.v
new file mode 100644
index 000000000..a2a4d32d1
--- /dev/null
+++ b/ivtest/ivltests/parameter_omit2.v
@@ -0,0 +1,17 @@
+// Tests that it possible to omit the initial `parameter` keyword in a parameter
+// port list in SystemVerilog. In Verilog this is not allowed and should result
+// in an error.
+
+module a #(integer A = 1);
+  initial begin
+    if (A == 10) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+endmodule
+
+module test;
+  a #(.A(10.1)) i_a();
+endmodule
diff --git a/ivtest/ivltests/parameter_omit3.v b/ivtest/ivltests/parameter_omit3.v
new file mode 100644
index 000000000..bd7f3e3bf
--- /dev/null
+++ b/ivtest/ivltests/parameter_omit3.v
@@ -0,0 +1,17 @@
+// Tests that it possible to omit the `parameter` keyword in a parameter port
+// list before changing the parameter type in SystemVerilog. In Verilog this is
+// not allowed and should result in an error.
+
+module a #(parameter real A = 1.0, integer B = 2);
+  initial begin
+    if (A == 10.1 && B == 20) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+endmodule
+
+module test;
+  a #(.A(10.1), .B(20)) i_a();
+endmodule
diff --git a/ivtest/ivltests/parameter_omit_invalid1.v b/ivtest/ivltests/parameter_omit_invalid1.v
new file mode 100644
index 000000000..99afa1024
--- /dev/null
+++ b/ivtest/ivltests/parameter_omit_invalid1.v
@@ -0,0 +1,8 @@
+// Check that implicit type in a parameter port list without `parameter`
+// generates an error.
+
+module test #([7:0] A = 1);
+  initial begin
+    $display("FAILED");
+  end
+endmodule
diff --git a/ivtest/ivltests/parameter_omit_invalid2.v b/ivtest/ivltests/parameter_omit_invalid2.v
new file mode 100644
index 000000000..310074353
--- /dev/null
+++ b/ivtest/ivltests/parameter_omit_invalid2.v
@@ -0,0 +1,8 @@
+// Check that implicit type in a parameter port list without `parameter`
+// generates an error.
+
+module test #(signed A = 1);
+  initial begin
+    $display("FAILED");
+  end
+endmodule
diff --git a/ivtest/ivltests/parameter_omit_invalid3.v b/ivtest/ivltests/parameter_omit_invalid3.v
new file mode 100644
index 000000000..61346c410
--- /dev/null
+++ b/ivtest/ivltests/parameter_omit_invalid3.v
@@ -0,0 +1,8 @@
+// Check that declaring changing the parameter type to an implicit type without
+// the `parameter` keyword results in an error.
+
+module test #(parameter real A = 1.0, signed B = 2);
+  initial begin
+    $display("FAILED");
+  end
+endmodule
diff --git a/ivtest/regress-fsv.list b/ivtest/regress-fsv.list
index 9f129e8f9..a25e451c6 100644
--- a/ivtest/regress-fsv.list
+++ b/ivtest/regress-fsv.list
@@ -78,6 +78,9 @@ br_gh567		normal			ivltests
 check_constant_3	normal			ivltests
 function4		normal			ivltests
 parameter_in_generate1	normal			ivltests
+parameter_omit1		normal			ivltests
+parameter_omit2		normal			ivltests
+parameter_omit3		normal			ivltests
 pr1963962		normal			ivltests gold=pr1963962-fsv.gold
 pr3015421		CE			ivltests gold=pr3015421-fsv.gold
 resetall		normal,-Wtimescale	ivltests gold=resetall-fsv.gold
diff --git a/ivtest/regress-sv.list b/ivtest/regress-sv.list
index fc9d76edf..46a08f5e6 100644
--- a/ivtest/regress-sv.list
+++ b/ivtest/regress-sv.list
@@ -302,6 +302,7 @@ l_equiv_const		normal,-g2005-sv	ivltests
 line_directive		normal,-g2009,-I./ivltests	ivltests gold=line_directive.gold
 localparam_implicit	normal,-g2005-sv	ivltests
 localparam_implicit2	CE,-g2005-sv	ivltests
+localparam_implicit3	CE,-g2005-sv	ivltests
 localparam_query	normal,-g2005-sv	ivltests
 localparam_type2	normal,-g2009		ivltests
 logical_short_circuit	normal,-g2012		ivltests
diff --git a/ivtest/regress-vlg.list b/ivtest/regress-vlg.list
index 0b78224c5..950db67b9 100644
--- a/ivtest/regress-vlg.list
+++ b/ivtest/regress-vlg.list
@@ -695,6 +695,12 @@ param_test4		normal			ivltests
 param_times		normal			ivltests # param has multiplication.
 parameter_type		normal			ivltests gold=parameter_type.gold
 parameter_in_generate1	CE			ivltests
+parameter_omit1		CE			ivltests
+parameter_omit2		CE			ivltests
+parameter_omit3		CE			ivltests
+parameter_omit_invalid1	CE			ivltests
+parameter_omit_invalid2	CE			ivltests
+parameter_omit_invalid3	CE			ivltests
 patch1268		normal			ivltests
 pca1			normal			ivltests # Procedural Continuous Assignment in a mux
 pic			normal			contrib  pictest gold=pic.gold