diff --git a/elab_net.cc b/elab_net.cc index 4f734aa74..54ae617e4 100644 --- a/elab_net.cc +++ b/elab_net.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999-2000 Stephen Williams (steve@icarus.com) + * Copyright (c) 1999-2002 Stephen Williams (steve@icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: elab_net.cc,v 1.97 2002/08/21 02:28:03 steve Exp $" +#ident "$Id: elab_net.cc,v 1.98 2002/08/31 03:48:50 steve Exp $" #endif # include "config.h" @@ -1173,7 +1173,7 @@ NetNet* PEConcat::elaborate_net(Design*des, NetScope*scope, } /* - * This provate method handles the special case that we have a + * This private method handles the special case that we have a * non-constant bit-select of an identifier. We already know that the * signal that is represented is "sig". */ @@ -1188,12 +1188,25 @@ NetNet* PEIdent::elaborate_net_bitmux_(Design*des, NetScope*scope, /* Elaborate the selector. */ NetNet*sel = msb_->elaborate_net(des, scope, 0, 0, 0, 0); + unsigned sig_width = sig->pin_count(); NetMux*mux = new NetMux(scope, scope->local_hsymbol(), 1, - sig->pin_count(), - sel->pin_count()); + sig_width, sel->pin_count()); - for (unsigned idx = 0 ; idx < sig->pin_count() ; idx += 1) - connect(mux->pin_Data(0, idx), sig->pin(idx)); + /* Connect the signal bits to the mux. Account for the + direction of the numbering (lsb to msb vs. msb to lsb) by + swapping the connection order. */ + + if (sig->msb() > sig->lsb()) { + + sel = add_to_net(des, sel, -sig->lsb()); + for (unsigned idx = 0 ; idx < sig_width ; idx += 1) + connect(mux->pin_Data(0, idx), sig->pin(idx)); + } else { + + sel = add_to_net(des, sel, -sig->msb()); + for (unsigned idx = 0 ; idx < sig_width ; idx += 1) + connect(mux->pin_Data(0, idx), sig->pin(sig_width-idx-1)); + } for (unsigned idx = 0 ; idx < sel->pin_count() ; idx += 1) connect(mux->pin_Sel(idx), sel->pin(idx)); @@ -2161,6 +2174,9 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope, /* * $Log: elab_net.cc,v $ + * Revision 1.98 2002/08/31 03:48:50 steve + * Fix reverse bit ordered bit select in continuous assignment. + * * Revision 1.97 2002/08/21 02:28:03 steve * Carry mux output delays. * diff --git a/netmisc.cc b/netmisc.cc index 04ce3f9da..cc6fb0939 100644 --- a/netmisc.cc +++ b/netmisc.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: netmisc.cc,v 1.3 2002/08/12 01:35:00 steve Exp $" +#ident "$Id: netmisc.cc,v 1.4 2002/08/31 03:48:50 steve Exp $" #endif # include "config.h" @@ -26,6 +26,52 @@ # include "netmisc.h" # include "PExpr.h" +NetNet* add_to_net(Design*des, NetNet*sig, long val) +{ + if (val == 0) + return sig; + + NetScope*scope = sig->scope(); + unsigned long abs_val = (val >= 0)? val : (-val); + unsigned width = sig->pin_count(); + + verinum val_v (abs_val, width); + + NetConst*val_c = new NetConst(scope, scope->local_hsymbol(), val_v); + + NetNet*val_s = new NetNet(scope, scope->local_hsymbol(), + NetNet::IMPLICIT, width); + val_s->local_flag(true); + + NetNet*res = new NetNet(scope, scope->local_hsymbol(), + NetNet::IMPLICIT, width); + res->local_flag(true); + + NetAddSub*add = new NetAddSub(scope, scope->local_hsymbol(), width); + + for (unsigned idx = 0 ; idx < width ; idx += 1) + connect(sig->pin(idx), add->pin_DataA(idx)); + + for (unsigned idx = 0 ; idx < width ; idx += 1) + connect(val_c->pin(idx), add->pin_DataB(idx)); + + for (unsigned idx = 0 ; idx < width ; idx += 1) + connect(val_s->pin(idx), add->pin_DataB(idx)); + + for (unsigned idx = 0 ; idx < width ; idx += 1) + connect(res->pin(idx), add->pin_Result(idx)); + + if (val < 0) + add->attribute("LPM_Direction", verinum("SUB")); + else + add->attribute("LPM_Direction", verinum("ADD")); + + des->add_node(add); + des->add_node(val_c); + + return res; +} + NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe) { @@ -44,6 +90,9 @@ NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe) /* * $Log: netmisc.cc,v $ + * Revision 1.4 2002/08/31 03:48:50 steve + * Fix reverse bit ordered bit select in continuous assignment. + * * Revision 1.3 2002/08/12 01:35:00 steve * conditional ident string using autoconfig. * diff --git a/netmisc.h b/netmisc.h index e906d87a6..d5496aace 100644 --- a/netmisc.h +++ b/netmisc.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: netmisc.h,v 1.15 2002/08/12 01:35:00 steve Exp $" +#ident "$Id: netmisc.h,v 1.16 2002/08/31 03:48:50 steve Exp $" #endif # include "netlist.h" @@ -33,6 +33,13 @@ extern NetExpr*pad_to_width(NetExpr*expr, unsigned wid); extern NetNet*pad_to_width(Design*des, NetNet*n, unsigned w); +/* + * This function takes as input a NetNet signal and adds a constant + * value to it. If the val is 0, then simply return sig. Otherwise, + * return a new NetNet value that is the output of an addition. + */ +extern NetNet*add_to_net(Design*des, NetNet*sig, long val); + /* * In some cases the lval is accessible as a pointer to the head of * a list of NetAssign_ objects. This function returns the width of @@ -50,6 +57,9 @@ extern NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe); /* * $Log: netmisc.h,v $ + * Revision 1.16 2002/08/31 03:48:50 steve + * Fix reverse bit ordered bit select in continuous assignment. + * * Revision 1.15 2002/08/12 01:35:00 steve * conditional ident string using autoconfig. * diff --git a/tgt-vvp/vvp_process.c b/tgt-vvp/vvp_process.c index 98e70a25c..d471aef56 100644 --- a/tgt-vvp/vvp_process.c +++ b/tgt-vvp/vvp_process.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: vvp_process.c,v 1.65 2002/08/27 05:39:57 steve Exp $" +#ident "$Id: vvp_process.c,v 1.66 2002/08/31 03:48:50 steve Exp $" #endif # include "vvp_priv.h" @@ -270,7 +270,8 @@ static int show_stmt_assign(ivl_statement_t net) } - clr_vector(res); + if (res.base > 3) + clr_vector(res); } @@ -403,7 +404,8 @@ static int show_stmt_assign_nb(ivl_statement_t net) } - clr_vector(res); + if (res.base > 3) + clr_vector(res); } return 0; @@ -1267,6 +1269,9 @@ int draw_func_definition(ivl_scope_t scope) /* * $Log: vvp_process.c,v $ + * Revision 1.66 2002/08/31 03:48:50 steve + * Fix reverse bit ordered bit select in continuous assignment. + * * Revision 1.65 2002/08/27 05:39:57 steve * Fix l-value indexing of memories and vectors so that * an unknown (x) index causes so cell to be addresses.