From 7aab315ce533cee5e9de781738ddeefc3ac3fb64 Mon Sep 17 00:00:00 2001 From: Maciej Suminski Date: Wed, 20 May 2015 17:30:07 +0200 Subject: [PATCH] vhdlpp: Allow assigning values to inout ports. --- vhdlpp/expression_elaborate.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/vhdlpp/expression_elaborate.cc b/vhdlpp/expression_elaborate.cc index 5f54fc66a..30985fa53 100644 --- a/vhdlpp/expression_elaborate.cc +++ b/vhdlpp/expression_elaborate.cc @@ -112,7 +112,7 @@ int ExpName::elaborate_lval_(Entity*ent, ScopeBase*scope, bool is_sequ, ExpName* const VType*found_type = 0; if (const InterfacePort*cur = ent->find_port(name_)) { - if (cur->mode != PORT_OUT) { + if (cur->mode != PORT_OUT && cur->mode != PORT_INOUT) { cerr << get_fileline() << ": error: Assignment to " "input port " << name_ << "." << endl; return errors + 1; @@ -216,7 +216,7 @@ int ExpName::elaborate_lval(Entity*ent, ScopeBase*scope, bool is_sequ) const VType*found_type = 0; if (const InterfacePort*cur = ent->find_port(name_)) { - if (cur->mode != PORT_OUT) { + if (cur->mode != PORT_OUT && cur->mode != PORT_INOUT) { cerr << get_fileline() << ": error: Assignment to " "input port " << name_ << "." << endl; return errors += 1;