From 78d6ee26dd3647a70daf820f9a4d9fbe9f7744b9 Mon Sep 17 00:00:00 2001
From: Maciej Suminski <maciej.suminski@cern.ch>
Date: Wed, 24 Feb 2016 10:18:04 +0100
Subject: [PATCH] vhdlpp: Do not allow 'wire real' nets.

---
 vhdlpp/vsignal.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/vhdlpp/vsignal.cc b/vhdlpp/vsignal.cc
index 82c5f0760..ab949d7e1 100644
--- a/vhdlpp/vsignal.cc
+++ b/vhdlpp/vsignal.cc
@@ -22,6 +22,7 @@
 # include  "vsignal.h"
 # include  "expression.h"
 # include  "vtype.h"
+# include  "std_types.h"
 # include  <iostream>
 
 using namespace std;
@@ -64,7 +65,7 @@ int Signal::emit(ostream&out, Entity*ent, ScopeBase*scope)
       Expression*init_expr = peek_init_expr();
       if (init_expr) {
             /* Emit initialization value for wires as a weak assignment */
-            if(!decl.reg_flag)
+            if(!decl.reg_flag && !type->type_match(&primitive_REAL))
                 out << ";" << endl << "/*init*/ assign (weak1, weak0) " << peek_name();
 
             out << " = ";