From 950d72c77d4f719db2248f340a826e265862301f Mon Sep 17 00:00:00 2001
From: DeflateAwning <11021263+DeflateAwning@users.noreply.github.com>
Date: Sun, 15 Oct 2023 19:29:04 -0600
Subject: [PATCH 1/2] Tiny README fixes

---
 README.md | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/README.md b/README.md
index 5f05311e0..e76011ca3 100644
--- a/README.md
+++ b/README.md
@@ -34,7 +34,7 @@ Copyright 2000-2019 Stephen Williams
 
 ## What is ICARUS Verilog?
 
-Icarus Verilog is intended to compile ALL of the Verilog HDL as
+Icarus Verilog is intended to compile ALL of the Verilog HDL, as
 described in the IEEE-1364 standard. Of course, it's not quite there
 yet. It does currently handle a mix of structural and behavioural
 constructs. For a view of the current state of Icarus Verilog, see its
@@ -47,7 +47,7 @@ tools.
 > For instructions on how to run Icarus Verilog, see the `iverilog` man page.
 
 
-## Building/Installing Icarus Verilog From Source
+## Building/Installing Icarus Verilog from Source
 
 If you are starting from the source, the build process is designed to be
 as simple as practical. Someone basically familiar with the target
@@ -396,7 +396,7 @@ constructs.
 
   - `trireg` is not supported. `tri0` and `tri1` are supported.
 
-  - tran primitives, i.e. `tran`, `tranif1`, `tranif0`, `rtran`, `rtranif1`
+  - tran primitives, i.e. `tran`, `tranif1`, `tranif0`, `rtran`, `rtranif1`,
     and `rtranif0` are not supported.
 
   - Net delays, of the form `wire #N foo;` do not work. Delays in
@@ -547,7 +547,7 @@ flag to iverilog.
 
 ## Credits
 
-Except where otherwise noted, Icarus Verilog, ivl and ivlpp are
+Except where otherwise noted, Icarus Verilog, ivl, and ivlpp are
 Copyright Stephen Williams. The proper notices are in the head of each
 file. However, I have early on received aid in the form of fixes,
 Verilog guidance, and especially testing from many people. Testers, in

From 95217830b4ba7fdef03edeba45ba5c882bf99c21 Mon Sep 17 00:00:00 2001
From: DeflateAwning <11021263+DeflateAwning@users.noreply.github.com>
Date: Sun, 15 Oct 2023 19:29:40 -0600
Subject: [PATCH 2/2] Update URL http://iverilog.icarus.com/ ->
 https://steveicarus.github.io/iverilog/

---
 README.md              | 2 +-
 driver/iverilog.man.in | 2 +-
 iverilog-vpi.man.in    | 2 +-
 msys2/PKGBUILD         | 2 +-
 vvp/vvp.man.in         | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/README.md b/README.md
index e76011ca3..5b982c924 100644
--- a/README.md
+++ b/README.md
@@ -38,7 +38,7 @@ Icarus Verilog is intended to compile ALL of the Verilog HDL, as
 described in the IEEE-1364 standard. Of course, it's not quite there
 yet. It does currently handle a mix of structural and behavioural
 constructs. For a view of the current state of Icarus Verilog, see its
-home page at http://iverilog.icarus.com/.
+home page at https://steveicarus.github.io/iverilog/.
 
 Icarus Verilog is not aimed at being a simulator in the traditional
 sense, but a compiler that generates code employed by back-end
diff --git a/driver/iverilog.man.in b/driver/iverilog.man.in
index 3e70a44cd..9ee9d730c 100644
--- a/driver/iverilog.man.in
+++ b/driver/iverilog.man.in
@@ -642,7 +642,7 @@ Steve Williams (steve@icarus.com)
 
 .SH SEE ALSO
 vvp(1),
-.BR "<http://iverilog.icarus.com/>"
+.BR "<https://steveicarus.github.io/iverilog/>"
 
 Tips on using, debugging, and developing the compiler can be found at
 .BR "<http://iverilog.wikia.com/>"
diff --git a/iverilog-vpi.man.in b/iverilog-vpi.man.in
index bd8f7a930..3bdbd942d 100644
--- a/iverilog-vpi.man.in
+++ b/iverilog-vpi.man.in
@@ -115,7 +115,7 @@ Steve Williams (steve@icarus.com)
 
 .SH SEE ALSO
 iverilog(1), vvp(1),
-.BR "<http://iverilog.icarus.com/>",
+.BR "<https://steveicarus.github.io/iverilog/>",
 .BR "<http://mingw-w64.yaxm.org/>",
 
 .SH COPYRIGHT
diff --git a/msys2/PKGBUILD b/msys2/PKGBUILD
index 338818b09..e44f7493a 100644
--- a/msys2/PKGBUILD
+++ b/msys2/PKGBUILD
@@ -5,7 +5,7 @@ pkgver=ci
 pkgrel=1
 pkgdesc="Icarus Verilog, a Verilog simulation and synthesis tool (mingw-w64)"
 arch=('any')
-url="http://iverilog.icarus.com/"
+url="https://steveicarus.github.io/iverilog/"
 license=('GPLv2+')
 depends=("${MINGW_PACKAGE_PREFIX}-readline"
          "${MINGW_PACKAGE_PREFIX}-gcc-libs")
diff --git a/vvp/vvp.man.in b/vvp/vvp.man.in
index 4c3be7e88..51aa1d7a7 100644
--- a/vvp/vvp.man.in
+++ b/vvp/vvp.man.in
@@ -192,7 +192,7 @@ Steve Williams (steve@icarus.com)
 .SH SEE ALSO
 iverilog(1),
 iverilog\-vpi(1),
-.BR "<http://iverilog.icarus.com/>"
+.BR "<https://steveicarus.github.io/iverilog/>"
 
 .SH COPYRIGHT
 .nf