From 743cb234c0cd83228344ee83b88b2caf119aa88f Mon Sep 17 00:00:00 2001 From: Prasad Joshi Date: Mon, 11 Jul 2011 18:15:39 +0100 Subject: [PATCH] Initialization of atom types in module declaration The module declaration should allow initialization of atom types (byte, short int, int, and longint) data types. For example: $ cat clkgen.sv module clkgen(output logic clk = 0, output byte p = '1); initial begin #200; $display("p = %b", p); $finish; end initial forever #10 clk = ~clk; endmodule $ iverilog -g 2009 clkgen.sv $ ./a.out p = 11111111 $ Suggested-by: Oswaldo Cadenas Signed-off-by: Prasad Joshi --- parse.y | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/parse.y b/parse.y index 6103455bb..687c6e3bd 100644 --- a/parse.y +++ b/parse.y @@ -2251,6 +2251,28 @@ port_declaration delete[]$5; $$ = ptmp; } + | attribute_list_opt K_output atom2_type signed_unsigned_opt IDENTIFIER '=' expression + { Module::port_t*ptmp; + perm_string name = lex_strings.make($5); + list*use_range = make_range_from_width($3); + ptmp = pform_module_port_reference(name, @2.text, + @2.first_line); + pform_module_define_port(@2, name, NetNet::POUTPUT, + NetNet::IMPLICIT_REG, IVL_VT_BOOL, + $4, use_range, $1); + port_declaration_context.port_type = NetNet::POUTPUT; + port_declaration_context.port_net_type = NetNet::IMPLICIT_REG; + port_declaration_context.var_type = IVL_VT_BOOL; + port_declaration_context.sign_flag = $4; + delete port_declaration_context.range; + port_declaration_context.range = use_range; + + pform_make_reginit(@5, name, $7); + + delete[]$5; + $$ = ptmp; + } + ;