From 6f08f92ffcea2681d2e7e3569217c4a0ebd2d29a Mon Sep 17 00:00:00 2001
From: steve <steve>
Date: Sat, 9 Jun 2007 01:06:51 +0000
Subject: [PATCH]  Prepare for snapshot 20070608

---
 verilog.spec | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/verilog.spec b/verilog.spec
index 14596cb78..ec055b703 100644
--- a/verilog.spec
+++ b/verilog.spec
@@ -1,14 +1,14 @@
 Summary: Icarus Verilog
 Name: verilog
-Version: 0.9.0.20070421
+Version: 0.9.0.20070608
 Release: 0
 License: GPL
 Group: Productivity/Scientific/Electronics
-Source: verilog-20070421.tar.gz
+Source: verilog-20070608.tar.gz
 URL: http://www.icarus.com/eda/verilog/index.html
 Packager: Stephen Williams <steve@icarus.com>
 
-BuildRoot: %{_tmppath}/%{name}-%{version}-20070421-%{release}-root
+BuildRoot: %{_tmppath}/%{name}-%{version}-20070608-%{release}-root
 
 BuildRequires: gcc-c++, zlib-devel, bison, flex, gperf, readline-devel
 
@@ -32,7 +32,7 @@ engineering formats, including simulation. It strives to be true
 to the IEEE-1364 standard.
 
 %prep
-%setup -n verilog-20070421
+%setup -n verilog-20070608
 
 %build
 %ifarch x86_64