From 4e69fe13554e17e292aa8d39759cf575d1f53800 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Sat, 23 Apr 2022 12:24:26 +0200 Subject: [PATCH 1/2] Remove ivl_variable_type_t from PWire The ivl_variable_type_t in PWire is now only used for passing the base type for vector types to the elaboration stage. But we can query the base the from the vector_type_t itself. If the there is no data_type_t set for the PWire the base type will default to IVL_VT_LOGIC. Signed-off-by: Lars-Peter Clausen --- PExpr.cc | 2 +- PWire.cc | 19 +------------------ PWire.h | 4 ---- elab_sig.cc | 15 +++++++++++---- parse.y | 6 +++--- pform.cc | 19 +++++++++---------- pform_dump.cc | 2 -- 7 files changed, 25 insertions(+), 42 deletions(-) diff --git a/PExpr.cc b/PExpr.cc index ff67da5e0..c4d641711 100644 --- a/PExpr.cc +++ b/PExpr.cc @@ -433,7 +433,7 @@ void PEIdent::declare_implicit_nets(LexicalScope*scope, NetNet::Type type) ss = ss->parent_scope(); } - PWire*net = new PWire(name, type, NetNet::NOT_A_PORT, IVL_VT_LOGIC); + PWire*net = new PWire(name, type, NetNet::NOT_A_PORT); net->set_file(get_file()); net->set_lineno(get_lineno()); scope->wires[name] = net; diff --git a/PWire.cc b/PWire.cc index dbe68afcb..744447d53 100644 --- a/PWire.cc +++ b/PWire.cc @@ -28,10 +28,8 @@ using namespace std; PWire::PWire(perm_string n, NetNet::Type t, NetNet::PortType pt, - ivl_variable_type_t dt, PWSRType rt) -: name_(n), type_(t), port_type_(pt), data_type_(dt), - signed_(false), +: name_(n), type_(t), port_type_(pt), signed_(false), port_set_(false), net_set_(false), is_scalar_(false), error_cnt_(0), discipline_(0) { @@ -109,21 +107,6 @@ bool PWire::set_port_type(NetNet::PortType pt) } } -bool PWire::set_data_type(ivl_variable_type_t dt) -{ - if (data_type_ != IVL_VT_NO_TYPE) { - if (data_type_ != dt) - return false; - else - return true; - } - - assert(data_type_ == IVL_VT_NO_TYPE); - data_type_ = dt; - - return true; -} - void PWire::set_signed(bool flag) { // For a non-ANSI style port declaration where the data type is diff --git a/PWire.h b/PWire.h index 1f92fac9e..4d8820eee 100644 --- a/PWire.h +++ b/PWire.h @@ -57,7 +57,6 @@ class PWire : public PNamedItem { PWire(perm_string name, NetNet::Type t, NetNet::PortType pt, - ivl_variable_type_t dt, PWSRType rt = SR_NET); // Return a hierarchical name. @@ -72,8 +71,6 @@ class PWire : public PNamedItem { void set_signed(bool flag); bool get_signed() const; - bool set_data_type(ivl_variable_type_t dt); - void set_range(const std::list&ranges, PWSRType type); void set_unpacked_idx(const std::list&ranges); @@ -101,7 +98,6 @@ class PWire : public PNamedItem { perm_string name_; NetNet::Type type_; NetNet::PortType port_type_; - ivl_variable_type_t data_type_; bool signed_; // These members hold expressions for the bit width of the diff --git a/elab_sig.cc b/elab_sig.cc index 5016c48e7..64b76ee67 100644 --- a/elab_sig.cc +++ b/elab_sig.cc @@ -962,7 +962,13 @@ ivl_type_t PWire::elaborate_type(Design*des, NetScope*scope, // Fallback method. Create vector type. - ivl_variable_type_t use_data_type = data_type_; + ivl_variable_type_t use_data_type; + if (vec_type) { + use_data_type = vec_type->base_type; + } else { + use_data_type = IVL_VT_LOGIC; + } + if (use_data_type == IVL_VT_NO_TYPE) { use_data_type = IVL_VT_LOGIC; if (debug_elaborate) { @@ -1009,9 +1015,10 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const if (debug_elaborate) { cerr << get_fileline() << ": PWire::elaborate_sig: " << "Signal " << basename() - << ", wtype=" << wtype - << ", data_type_=" << data_type_ - << ", unpacked_.size()=" << unpacked_.size() + << ", wtype=" << wtype; + if (set_data_type_) + cerr << ", set_data_type_=" << *set_data_type_; + cerr << ", unpacked_.size()=" << unpacked_.size() << endl; } diff --git a/parse.y b/parse.y index 7ef0da370..79b4d4a35 100644 --- a/parse.y +++ b/parse.y @@ -6883,7 +6883,7 @@ udp_port_decl { $$ = pform_make_udp_input_ports($2); } | K_output IDENTIFIER ';' { perm_string pname = lex_strings.make($2); - PWire*pp = new PWire(pname, NetNet::IMPLICIT, NetNet::POUTPUT, IVL_VT_LOGIC); + PWire*pp = new PWire(pname, NetNet::IMPLICIT, NetNet::POUTPUT); vector*tmp = new std::vector(1); (*tmp)[0] = pp; $$ = tmp; @@ -6891,7 +6891,7 @@ udp_port_decl } | K_reg IDENTIFIER ';' { perm_string pname = lex_strings.make($2); - PWire*pp = new PWire(pname, NetNet::REG, NetNet::PIMPLICIT, IVL_VT_LOGIC); + PWire*pp = new PWire(pname, NetNet::REG, NetNet::PIMPLICIT); vector*tmp = new std::vector(1); (*tmp)[0] = pp; $$ = tmp; @@ -6899,7 +6899,7 @@ udp_port_decl } | K_output K_reg IDENTIFIER ';' { perm_string pname = lex_strings.make($3); - PWire*pp = new PWire(pname, NetNet::REG, NetNet::POUTPUT, IVL_VT_LOGIC); + PWire*pp = new PWire(pname, NetNet::REG, NetNet::POUTPUT); vector*tmp = new std::vector(1); (*tmp)[0] = pp; $$ = tmp; diff --git a/pform.cc b/pform.cc index 1d3524806..c0d0595c3 100644 --- a/pform.cc +++ b/pform.cc @@ -2085,7 +2085,7 @@ void pform_make_udp(const struct vlltype&loc, perm_string name, /* Make the PWire for the output port. */ pins[0] = new PWire(out_name, synchronous_flag? NetNet::REG : NetNet::WIRE, - NetNet::POUTPUT, IVL_VT_LOGIC); + NetNet::POUTPUT); FILE_NAME(pins[0], loc); /* Make the PWire objects for the input ports. */ @@ -2096,7 +2096,7 @@ void pform_make_udp(const struct vlltype&loc, perm_string name, ; idx += 1, ++ cur) { assert(idx < pins.size()); pins[idx] = new PWire(*cur, NetNet::WIRE, - NetNet::PINPUT, IVL_VT_LOGIC); + NetNet::PINPUT); FILE_NAME(pins[idx], loc); } assert(idx == pins.size()); @@ -2172,7 +2172,6 @@ static void pform_set_net_range(PWire *wire, if (range) wire->set_range(*range, rt); wire->set_signed(vec_type->signed_flag); - wire->set_data_type(vec_type->base_type); } /* @@ -2583,7 +2582,7 @@ static PWire* pform_get_or_make_wire(const struct vlltype&li, perm_string name, // to the scope. Do not delete the old wire - it will // remain in the local symbol map. - cur = new PWire(name, type, ptype, IVL_VT_NO_TYPE, rt); + cur = new PWire(name, type, ptype, rt); FILE_NAME(cur, li); pform_put_wire_in_scope(name, cur); @@ -2615,10 +2614,9 @@ void pform_module_define_port(const struct vlltype&li, PWire *cur = pform_get_or_make_wire(li, name, type, port_kind, SR_BOTH); - vector_type_t*vec_type = dynamic_cast (vtype); - if (vec_type) - pform_set_net_range(cur, vec_type, SR_BOTH); - else if (vtype) + pform_set_net_range(cur, dynamic_cast (vtype), SR_BOTH); + + if (vtype) cur->set_data_type(vtype); if (urange) { @@ -2774,6 +2772,8 @@ static vector*pform_make_task_ports_vec(const struct vlltype&lo port direction. If not, create it. */ PWire*curw = pform_get_or_make_wire(loc, name, NetNet::IMPLICIT_REG, pt, rt); + if (rt == SR_BOTH) + curw->set_data_type(vec_type); pform_set_net_range(curw, vec_type, rt); if (cur->udims) { @@ -3275,8 +3275,7 @@ vector* pform_make_udp_input_ports(list*names) perm_string txt = *cur; PWire*pp = new PWire(txt, NetNet::IMPLICIT, - NetNet::PINPUT, - IVL_VT_LOGIC); + NetNet::PINPUT); (*out)[idx] = pp; idx += 1; } diff --git a/pform_dump.cc b/pform_dump.cc index b23d1e0fd..fdf6fcfae 100644 --- a/pform_dump.cc +++ b/pform_dump.cc @@ -620,8 +620,6 @@ void PWire::dump(ostream&out, unsigned ind) const break; } - out << " " << data_type_; - if (signed_) { out << " signed"; } From 79771b17b2bfc3ecb9cea6fafa57f6935d80cbd5 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Mon, 18 Apr 2022 10:23:23 +0200 Subject: [PATCH 2/2] Consolidate functions for task port declaration With the recent refactorings pform_make_task_ports_vec() and do_make_task_ports() are now very similar. Consolidate them into a single function. Signed-off-by: Lars-Peter Clausen --- pform.cc | 76 +++++++++++--------------------------------------------- 1 file changed, 15 insertions(+), 61 deletions(-) diff --git a/pform.cc b/pform.cc index c0d0595c3..e9deb4ba8 100644 --- a/pform.cc +++ b/pform.cc @@ -2749,31 +2749,33 @@ void pform_makewire(const struct vlltype&li, * constraints as those of tasks, so this works fine. Functions have * no output or inout ports. */ -static vector*pform_make_task_ports_vec(const struct vlltype&loc, - NetNet::PortType pt, - vector_type_t *vec_type, - list*ports, - bool allow_implicit) +vector*pform_make_task_ports(const struct vlltype&loc, + NetNet::PortType pt, + data_type_t*vtype, + list*ports, + bool allow_implicit) { assert(pt != NetNet::PIMPLICIT && pt != NetNet::NOT_A_PORT); assert(ports); - vector*res = new vector(0); + vector*res = new vector(0); PWSRType rt = SR_BOTH; - if (allow_implicit && vec_type->implicit_flag) + // If this is a non-ansi port declaration and the type is an implicit type + // this is only a port declaration. + vector_type_t*vec_type = dynamic_cast(vtype); + if (allow_implicit && (!vtype || (vec_type && vec_type->implicit_flag))) rt = SR_PORT; - for (list::iterator cur = ports->begin() - ; cur != ports->end() ; ++ cur ) { + for (list::iterator cur = ports->begin(); + cur != ports->end(); ++cur) { perm_string &name = cur->name; - /* Look for a preexisting wire. If it exists, set the - port direction. If not, create it. */ PWire*curw = pform_get_or_make_wire(loc, name, NetNet::IMPLICIT_REG, pt, rt); if (rt == SR_BOTH) - curw->set_data_type(vec_type); + curw->set_data_type(vtype); + pform_set_net_range(curw, vec_type, rt); if (cur->udims) { @@ -2784,56 +2786,8 @@ static vector*pform_make_task_ports_vec(const struct vlltype&lo res->push_back(pform_tf_port_t(curw)); } - return res; -} - -static vector*do_make_task_ports(const struct vlltype&loc, - NetNet::PortType pt, - data_type_t*data_type, - list*ports) -{ - assert(pt != NetNet::PIMPLICIT && pt != NetNet::NOT_A_PORT); - assert(ports); - vector*res = new vector(0); - PWSRType rt = data_type ? SR_BOTH : SR_PORT; - - for (list::iterator cur = ports->begin() - ; cur != ports->end() ; ++cur) { - perm_string &name = cur->name; - - PWire*curw = pform_get_or_make_wire(loc, name, NetNet::IMPLICIT_REG, - pt, rt); - - if (data_type) - curw->set_data_type(data_type); - - if (cur->udims) { - if (pform_requires_sv(loc, "Task/function port with unpacked dimensions")) - curw->set_unpacked_idx(*cur->udims); - } - - res->push_back(pform_tf_port_t(curw)); - } - return res; -} - -vector*pform_make_task_ports(const struct vlltype&loc, - NetNet::PortType pt, - data_type_t*vtype, - list*ports, - bool allow_implicit) -{ - vector*ret = NULL; - - if (vector_type_t*vec_type = dynamic_cast (vtype)) { - ret = pform_make_task_ports_vec(loc, pt, vec_type, ports, - allow_implicit); - } else { - ret = do_make_task_ports(loc, pt, vtype, ports); - } - delete ports; - return ret; + return res; } /*