diff --git a/vvp/codes.h b/vvp/codes.h index 473a6365c..0b79f7035 100644 --- a/vvp/codes.h +++ b/vvp/codes.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: codes.h,v 1.74 2005/06/14 01:44:09 steve Exp $" +#ident "$Id: codes.h,v 1.75 2005/09/14 02:50:07 steve Exp $" #endif @@ -56,6 +56,8 @@ extern bool of_CMPIU(vthread_t thr, vvp_code_t code); extern bool of_CMPS(vthread_t thr, vvp_code_t code); extern bool of_CMPU(vthread_t thr, vvp_code_t code); extern bool of_CMPWR(vthread_t thr, vvp_code_t code); +extern bool of_CMPWS(vthread_t thr, vvp_code_t code); +extern bool of_CMPWU(vthread_t thr, vvp_code_t code); extern bool of_CMPX(vthread_t thr, vvp_code_t code); extern bool of_CMPZ(vthread_t thr, vvp_code_t code); extern bool of_CVT_IR(vthread_t thr, vvp_code_t code); @@ -175,6 +177,9 @@ extern vvp_code_t codespace_null(void); /* * $Log: codes.h,v $ + * Revision 1.75 2005/09/14 02:50:07 steve + * Add word integer compares. + * * Revision 1.74 2005/06/14 01:44:09 steve * Add the assign_v0_d instruction. * diff --git a/vvp/compile.cc b/vvp/compile.cc index 88ef63d47..9e12e3d1d 100644 --- a/vvp/compile.cc +++ b/vvp/compile.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: compile.cc,v 1.210 2005/07/06 04:29:25 steve Exp $" +#ident "$Id: compile.cc,v 1.211 2005/09/14 02:50:07 steve Exp $" #endif # include "arith.h" @@ -101,6 +101,8 @@ const static struct opcode_table_s opcode_table[] = { { "%cmp/s", of_CMPS, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, { "%cmp/u", of_CMPU, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, { "%cmp/wr", of_CMPWR, 2, {OA_BIT1, OA_BIT2, OA_NONE} }, + { "%cmp/ws", of_CMPWS, 2, {OA_BIT1, OA_BIT2, OA_NONE} }, + { "%cmp/wu", of_CMPWU, 2, {OA_BIT1, OA_BIT2, OA_NONE} }, { "%cmp/x", of_CMPX, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, { "%cmp/z", of_CMPZ, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, { "%cmpi/u", of_CMPIU, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} }, @@ -1478,6 +1480,9 @@ void compile_param_string(char*label, char*name, char*str, char*value) /* * $Log: compile.cc,v $ + * Revision 1.211 2005/09/14 02:50:07 steve + * Add word integer compares. + * * Revision 1.210 2005/07/06 04:29:25 steve * Implement real valued signals and arith nodes. * diff --git a/vvp/config.h.in b/vvp/config.h.in index 8e85041ce..199a374f2 100644 --- a/vvp/config.h.in +++ b/vvp/config.h.in @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: config.h.in,v 1.19 2005/04/13 06:34:20 steve Exp $" +#ident "$Id: config.h.in,v 1.20 2005/09/14 02:50:07 steve Exp $" #endif #if defined(__cplusplus) @@ -61,6 +61,8 @@ # define MODULE_DIR "." #endif +# include + #if SIZEOF_UNSIGNED >= 8 typedef unsigned vvp_time64_t; # define TIME_FMT "" @@ -105,6 +107,9 @@ typedef unsigned long vvp_time64_t; /* * $Log: config.h.in,v $ + * Revision 1.20 2005/09/14 02:50:07 steve + * Add word integer compares. + * * Revision 1.19 2005/04/13 06:34:20 steve * Add vvp driver functor for logic outputs, * Add ostream output operators for debugging. diff --git a/vvp/opcodes.txt b/vvp/opcodes.txt index 6eef7ce7b..0333fb044 100644 --- a/vvp/opcodes.txt +++ b/vvp/opcodes.txt @@ -1,7 +1,7 @@ /* * Copyright (c) 2001-2003 Stephen Williams (steve@icarus.com) * - * $Id: opcodes.txt,v 1.65 2005/06/14 01:44:10 steve Exp $ + * $Id: opcodes.txt,v 1.66 2005/09/14 02:50:07 steve Exp $ */ @@ -184,6 +184,10 @@ bit gets the x value. [compare real values.] +* %cmp/ws , +* %cmp/wu , + +[compare signed/unsigned integer words.] * %cmp/z , , * %cmp/x , , diff --git a/vvp/vthread.cc b/vvp/vthread.cc index d04aea9b3..716f1e0e1 100644 --- a/vvp/vthread.cc +++ b/vvp/vthread.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: vthread.cc,v 1.145 2005/08/30 00:49:21 steve Exp $" +#ident "$Id: vthread.cc,v 1.146 2005/09/14 02:50:07 steve Exp $" #endif # include "config.h" @@ -100,8 +100,9 @@ struct vthread_s { /* These are the word registers. */ union { - long w_int; - double w_real; + int64_t w_int; + uint64_t w_uint; + double w_real; } words[16]; /* My parent sets this when it wants me to wake it up. */ @@ -508,7 +509,6 @@ bool of_ASSIGN_V0(vthread_t thr, vvp_code_t cp) { unsigned wid = thr->words[0].w_int; assert(wid > 0); - unsigned delay = cp->bit_idx[0]; unsigned bit = cp->bit_idx[1]; @@ -921,6 +921,34 @@ bool of_CMPWR(vthread_t thr, vvp_code_t cp) return true; } +bool of_CMPWS(vthread_t thr, vvp_code_t cp) +{ + int64_t l = thr->words[cp->bit_idx[0]].w_int; + int64_t r = thr->words[cp->bit_idx[1]].w_int; + + vvp_bit4_t eq = (l == r)? BIT4_1 : BIT4_0; + vvp_bit4_t lt = (l < r)? BIT4_1 : BIT4_0; + + thr_put_bit(thr, 4, eq); + thr_put_bit(thr, 5, lt); + + return true; +} + +bool of_CMPWU(vthread_t thr, vvp_code_t cp) +{ + uint64_t l = thr->words[cp->bit_idx[0]].w_uint; + uint64_t r = thr->words[cp->bit_idx[1]].w_uint; + + vvp_bit4_t eq = (l == r)? BIT4_1 : BIT4_0; + vvp_bit4_t lt = (l < r)? BIT4_1 : BIT4_0; + + thr_put_bit(thr, 4, eq); + thr_put_bit(thr, 5, lt); + + return true; +} + bool of_CMPZ(vthread_t thr, vvp_code_t cp) { vvp_bit4_t eq = BIT4_1; @@ -3147,6 +3175,9 @@ bool of_JOIN_UFUNC(vthread_t thr, vvp_code_t cp) /* * $Log: vthread.cc,v $ + * Revision 1.146 2005/09/14 02:50:07 steve + * Add word integer compares. + * * Revision 1.145 2005/08/30 00:49:21 steve * minor correction to address check in of_MOV1XZ * diff --git a/vvp/vthread.txt b/vvp/vthread.txt index 924041dcf..c2f873c6f 100644 --- a/vvp/vthread.txt +++ b/vvp/vthread.txt @@ -1,7 +1,7 @@ /* * Copyright (c) 2001 Stephen Williams (steve@icarus.com) * - * $Id: vthread.txt,v 1.4 2003/02/09 23:33:26 steve Exp $ + * $Id: vthread.txt,v 1.5 2005/09/14 02:50:07 steve Exp $ */ @@ -40,13 +40,13 @@ The remaining 64K-8 possible values are read-write bit registers that can be accessed singly or as vectors. This obviously implies that a bit address is 16 bits. -Threads also contain 4 numeric ``index'' registers. These are binary -values (no unknowns) that can be used in certain cases where extra -numeric parameters are needed. The thread instruction set includes +Threads alco contait 16 numeric registers. These registers can hold a +real value or a 64bit integer, and can be used in certain cases where +numeric values are needed. The thread instruction set includes %ix/* instructions to manipulate these registers. The instructions that use these registers document which register is used, and what the -numeric value is used for. For example, %assign/m uses index register -3 to select the memory bit to target its bit. +numeric value is used for. Registers 0-3 are often given fixed +meanings to instructions that need an integer value. /* * Copyright (c) 2001 Stephen Williams (steve@icarus.com)