From 4bc90f7cfdcee80e23ddc700959c79ae73aefaa2 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Mon, 17 Nov 2008 07:22:46 -0800 Subject: [PATCH 01/26] Create support for the --enable-suffix configuration option. This configure option causes the installed commands to have a suffix string that makes them distinct from other versions that also have a suffix string. This allows for multiple installed versions of Icarus Verilog. Also, move installed C/C++ header files into a subdirectory of their own under the target include directory, to make clearer the purpose and source of those files. --- Makefile.in | 85 ++++++++++++++++++---------------------- README.txt | 35 +++++------------ aclocal.m4 | 17 ++++++++ cadpli/Makefile.in | 4 +- cadpli/configure.in | 2 + configure.in | 2 + driver-vpi/Makefile.in | 13 ++++-- driver-vpi/config.h.in | 3 +- driver-vpi/main.c | 16 ++++---- driver/Makefile.in | 30 +++++++------- iverilog-vpi.sh | 7 ++-- ivlpp/Makefile.in | 12 +++--- libveriuser/Makefile.in | 9 +++-- libveriuser/configure.in | 2 + tgt-fpga/Makefile.in | 36 +++++++++-------- tgt-fpga/configure.in | 2 + tgt-null/Makefile.in | 25 ++++++------ tgt-stub/Makefile.in | 26 ++++++------ tgt-stub/configure.in | 2 + tgt-vhdl/Makefile.in | 22 ++++++----- tgt-vhdl/configure.in | 2 + tgt-vvp/Makefile.in | 24 ++++++------ tgt-vvp/configure.in | 2 + vpi/Makefile.in | 22 ++++++----- vpi/configure.in | 2 + vvp/Makefile.in | 38 +++++++++--------- vvp/configure.in | 3 ++ 27 files changed, 241 insertions(+), 202 deletions(-) diff --git a/Makefile.in b/Makefile.in index 5e1a59a3d..0e385ea58 100644 --- a/Makefile.in +++ b/Makefile.in @@ -41,6 +41,12 @@ MODE=regular # in order to get a more automatic version stamp as well. VERSION = 0.9.devel +# This string is used as an installation suffix. It modifies certain +# key install paths/files such that a build and install of Icarus Verilog +# with the same $(prefix) but a different $(suffix) will not interfere. +# The normal configuratin leaves suffix empty +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -52,7 +58,9 @@ VPATH = $(srcdir) bindir = @bindir@ libdir = @libdir@ -includedir = @includedir@ +# This is actually the directory where we install our own header files. +# It is a little different from the generic includedir. +includedir = @includedir@/verilog$(suffix) mandir = @mandir@ dllib=@DLLIB@ @@ -160,10 +168,11 @@ all: dep iverilog-vpi iverilog-vpi: iverilog-vpi.sh sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' \ + -e 's;@SUFFIX@;$(suffix);' \ -e 's;@IVCC@;$(CC);' \ -e 's;@IVCXX@;$(CXX);' \ -e 's;@IVCFLAGS@;$(CXXFLAGS);' \ - -e 's;@INCLUDEDIR@;@includedir@;' \ + -e 's;@INCLUDEDIR@;$(includedir);' \ -e 's;@LIBDIR@;@libdir@;' $< > $@ chmod +x $@ endif @@ -229,43 +238,43 @@ version.h: ifeq (@MINGW32@,yes) ifeq ($(MAN),none) -INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1 +INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1 else ifeq ($(PS2PDF),none) -INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1 +INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1 else -INSTALL_DOC = $(prefix)/iverilog-vpi.pdf $(mandir)/man1/iverilog-vpi.1 +INSTALL_DOC = $(prefix)/iverilog-vpi$(suffix).pdf $(mandir)/man1/iverilog-vpi$(suffix).1 all: dep iverilog-vpi.pdf endif endif INSTALL_DOCDIR = $(mandir)/man1 else -INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1 +INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1 INSTALL_DOCDIR = $(mandir)/man1 endif ifeq (@MINGW32@,yes) -WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/sqrt-virtex.v $(prefix)/QUICK_START.txt +WIN32_INSTALL = else -WIN32_INSTALL = $(bindir)/iverilog-vpi +WIN32_INSTALL = $(bindir)/iverilog-vpi$(suffix) endif -install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(libdir)/ivl/include/constants.vams $(libdir)/ivl/include/disciplines.vams $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC) +install: all installdirs $(libdir)/ivl$(suffix)/ivl@EXEEXT@ $(libdir)/ivl$(suffix)/include/constants.vams $(libdir)/ivl$(suffix)/include/disciplines.vams $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC) for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done for dir in vpi ivlpp driver; \ do (cd $$dir ; $(MAKE) $@); done -$(bindir)/iverilog-vpi: ./iverilog-vpi - $(INSTALL_SCRIPT) ./iverilog-vpi $(DESTDIR)$(bindir)/iverilog-vpi +$(bindir)/iverilog-vpi$(suffix): ./iverilog-vpi + $(INSTALL_SCRIPT) ./iverilog-vpi $(DESTDIR)$(bindir)/iverilog-vpi$(suffix) -$(libdir)/ivl/ivl@EXEEXT@: ./ivl@EXEEXT@ - $(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(DESTDIR)$(libdir)/ivl/ivl@EXEEXT@ +$(libdir)/ivl$(suffix)/ivl@EXEEXT@: ./ivl@EXEEXT@ + $(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(DESTDIR)$(libdir)/ivl$(suffix)/ivl@EXEEXT@ -$(libdir)/ivl/include/constants.vams: $(srcdir)/constants.vams - $(INSTALL_DATA) $(srcdir)/constants.vams $(DESTDIR)$(libdir)/ivl/include/constants.vams +$(libdir)/ivl$(suffix)/include/constants.vams: $(srcdir)/constants.vams + $(INSTALL_DATA) $(srcdir)/constants.vams $(DESTDIR)$(libdir)/ivl$(suffix)/include/constants.vams -$(libdir)/ivl/include/disciplines.vams: $(srcdir)/disciplines.vams - $(INSTALL_DATA) $(srcdir)/disciplines.vams $(DESTDIR)$(libdir)/ivl/include/disciplines.vams +$(libdir)/ivl$(suffix)/include/disciplines.vams: $(srcdir)/disciplines.vams + $(INSTALL_DATA) $(srcdir)/disciplines.vams $(DESTDIR)$(libdir)/ivl$(suffix)/include/disciplines.vams $(includedir)/ivl_target.h: $(srcdir)/ivl_target.h $(INSTALL_DATA) $(srcdir)/ivl_target.h $(DESTDIR)$(includedir)/ivl_target.h @@ -282,49 +291,31 @@ $(includedir)/acc_user.h: $(srcdir)/acc_user.h $(includedir)/veriuser.h: $(srcdir)/veriuser.h $(INSTALL_DATA) $(srcdir)/veriuser.h $(DESTDIR)$(includedir)/veriuser.h -$(mandir)/man1/iverilog-vpi.1: $(srcdir)/iverilog-vpi.man - $(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(DESTDIR)$(mandir)/man1/iverilog-vpi.1 +$(mandir)/man1/iverilog-vpi$(suffix).1: $(srcdir)/iverilog-vpi.man + $(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1 -$(prefix)/iverilog-vpi.pdf: iverilog-vpi.pdf - $(INSTALL_DATA) iverilog-vpi.pdf $(DESTDIR)$(prefix)/iverilog-vpi.pdf +$(prefix)/iverilog-vpi$(suffix).pdf: iverilog-vpi.pdf + $(INSTALL_DATA) iverilog-vpi.pdf $(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf -# In windows installations, put a few examples and the quick_start -# into the destination directory. -ifeq (@MINGW32@,yes) -$(prefix)/hello.vl: $(srcdir)/examples/hello.vl - ./dosify.exe $(srcdir)/examples/hello.vl tmp.vl - mv tmp.vl $(prefix)/hello.vl - -$(prefix)/sqrt.vl: $(srcdir)/examples/sqrt.vl - ./dosify.exe $(srcdir)/examples/sqrt.vl tmp.vl - mv tmp.vl $(prefix)/sqrt.vl - -$(prefix)/sqrt-virtex.v: $(srcdir)/examples/sqrt-virtex.v - ./dosify.exe $(srcdir)/examples/sqrt-virtex.v tmp.vl - mv tmp.vl $(prefix)/sqrt-virtex.v - -$(prefix)/QUICK_START.txt: $(srcdir)/QUICK_START.txt - ./dosify.exe $(srcdir)/QUICK_START.txt tmp.txt - mv tmp.txt $(prefix)/QUICK_START.txt -endif installdirs: mkinstalldirs - $(srcdir)/mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(includedir) $(DESTDIR)$(libdir)/ivl \ - $(DESTDIR)$(libdir)/ivl/include $(DESTDIR)$(mandir) $(DESTDIR)$(mandir)/man1 + $(srcdir)/mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(includedir) $(DESTDIR)$(libdir)/ivl$(suffix) \ + $(DESTDIR)$(libdir)/ivl$(suffix)/include $(DESTDIR)$(mandir) $(DESTDIR)$(mandir)/man1 uninstall: for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done for dir in vpi ivlpp driver; \ do (cd $$dir ; $(MAKE) $@); done for f in ivl@EXEEXT@ include/constants.vams include/disciplines.vams; \ - do rm -f $(DESTDIR)$(libdir)/ivl/$$f; done - -rmdir $(DESTDIR)$(libdir)/ivl/include - -rmdir $(DESTDIR)$(libdir)/ivl - for f in verilog iverilog-vpi gverilog@EXEEXT@; \ + do rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/$$f; done + -rmdir $(DESTDIR)$(libdir)/ivl$(suffix)/include + -rmdir $(DESTDIR)$(libdir)/ivl$(suffix) + for f in verilog$(suffix) iverilog-vpi$(suffix) gverilog$(suffix)@EXEEXT@; \ do rm -f $(DESTDIR)$(bindir)/$$f; done for f in ivl_target.h vpi_user.h _pli_types.h acc_user.h veriuser.h; \ do rm -f $(DESTDIR)$(includedir)/$$f; done - rm -f $(DESTDIR)$(mandir)/man1/iverilog-vpi.1 $(DESTDIR)$(prefix)/iverilog-vpi.pdf + -test X$(suffix) = X || rmdir $(DESTDIR)/$(includedir) + rm -f $(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1 $(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf -include $(patsubst %.o, dep/%.d, $O) diff --git a/README.txt b/README.txt index b980e9c1f..3186c5038 100644 --- a/README.txt +++ b/README.txt @@ -85,10 +85,6 @@ Normally, this command automatically figures out everything it needs to know. It generally works pretty well. There are a few flags to the configure script that modify its behavior: - --without-ipal - This turns off support for Icarus PAL, whether ipal - libraries are installed or not. - --prefix= The default is /usr/local, which causes the tool suite to be compiled for install in /usr/local/bin, @@ -99,27 +95,16 @@ configure script that modify its behavior: common to use --prefix=/opt. You can configure for a non-root install with --prefix=$HOME. - --enable-vvp32 (experimental) - If compiling on AMD64 systems, this enables the - compilation of 32bit compatible vvp (vvp32) and the vpi - modules that match. - -2.2.1 Special AMD64 Instructions - -(The Icarus Verilog RPM for x86_64 is build using these instructions.) - -If you are building for Linux/AMD64 (a.k.a x86_64) then to get the -most out of your install, first make sure you have both 64bit and -32bit development libraries installed. Then configure with this -somewhat more complicated command: - - ./configure libdir64='$(prefix)/lib64' vpidir1=vpi64 vpidir2=. --enable-vvp32 - -This reflects the convention on AMD64 systems that 64bit libraries go -into lib64 directories. The "--enable-vvp32" also turns on 32bit -compatibility files. A 32bit version of vvp (vvp32) will be created, -as well as 32bit versions of the development libraries and bundled VPI -libraries. + --enable-suffix + --enable-suffix= + --disable-suffix + Enable/disable changing the names of install files to use + a suffix string so that this version or install can co- + exist with other versions. This renames the installed + commands (iverilog, iverilog-vpi, vvp) and the installed + library files and include directory so that installations + with the same prefix but different suffix are guaranteed + to not interfere with each other. 2.3 (Optional) Testing diff --git a/aclocal.m4 b/aclocal.m4 index 76ddc0296..0c140fc0a 100644 --- a/aclocal.m4 +++ b/aclocal.m4 @@ -24,6 +24,23 @@ fi AC_SUBST(ident_support) ])# AC_CPP_IDENT +# AX_ENABLE_SUFFIX +# ---------------- +# Create the configure option --enable-suffix[=suffix] to generate suffix +# strings for the installed commands. This allows for shared installs of +# different builds. Remember to change the default suffix string to some +# value appropriate for the current version. +AC_DEFUN([AX_ENABLE_SUFFIX], +[AC_ARG_ENABLE([suffix],[Set the installation command suffix],[true],[enable_suffix=no]) +if test X$enable_suffix = Xyes; then + install_suffix='-0.9' +elif test X$enable_suffix = Xno; then + install_suffix='' +else + install_suffix="$enable_suffix" +fi +AC_SUBST(install_suffix) +])# AX_ENABLE_SUFFIX # _AX_C_UNDERSCORES_MATCH_IFELSE(PATTERN, ACTION-IF-MATCH, ACTION-IF-NOMATCH) # ------------------------------ diff --git a/cadpli/Makefile.in b/cadpli/Makefile.in index 2d4f81c0f..669961ff6 100644 --- a/cadpli/Makefile.in +++ b/cadpli/Makefile.in @@ -20,6 +20,8 @@ SHELL = /bin/sh VERSION = 0.9.devel +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -30,7 +32,7 @@ bindir = @bindir@ libdir = @libdir@ includedir = $(prefix)/include -vpidir = @libdir@/ivl +vpidir = @libdir@/ivl$(suffix) CC = @CC@ INSTALL = @INSTALL@ diff --git a/cadpli/configure.in b/cadpli/configure.in index 99f1a1e45..fa55d815a 100644 --- a/cadpli/configure.in +++ b/cadpli/configure.in @@ -10,6 +10,8 @@ AC_SUBST(EXEEXT) # Combined check for Microsoft-related bogosities; sets WIN32 if found AX_WIN32 +AX_ENABLE_SUFFIX + AC_PROG_INSTALL AC_CHECK_HEADERS(malloc.h) diff --git a/configure.in b/configure.in index 5443f69ec..ab66fb7a8 100644 --- a/configure.in +++ b/configure.in @@ -92,6 +92,8 @@ AC_C_BIGENDIAN # $host +AX_ENABLE_SUFFIX + AX_LD_EXTRALIBS # Compiler option for position independent code, needed when making shared objects. diff --git a/driver-vpi/Makefile.in b/driver-vpi/Makefile.in index a33053ae1..73843a9bd 100644 --- a/driver-vpi/Makefile.in +++ b/driver-vpi/Makefile.in @@ -20,6 +20,8 @@ SHELL = /bin/sh VERSION = 0.9.devel +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -27,6 +29,8 @@ datarootdir = @datarootdir@ VPATH = $(srcdir) +suffix = @install_suffix@ + bindir = $(exec_prefix)/bin libdir = $(exec_prefix)/lib includedir = $(prefix)/include @@ -65,6 +69,7 @@ main.o: main.c config.h config.h: config.h.in sed -e 's;@IVLCC@;@CC@;' -e 's;@IVLCXX@;@CXX@;' \ + -e 's;@SUFFIX@;$(suffix);' \ -e 's;@IVLCFLAGS@;@CXXFLAGS@;' \ -e 's;@SHARED@;@shared@;' $< > $@ @@ -73,13 +78,13 @@ res.o: res.rc windres -i res.rc -o res.o # -install: all installdirs $(bindir)/iverilog-vpi@EXEEXT@ +install: all installdirs $(bindir)/iverilog-vpi$(suffix)@EXEEXT@ -$(bindir)/iverilog-vpi@EXEEXT@: ./iverilog-vpi@EXEEXT@ - $(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi@EXEEXT@ +$(bindir)/iverilog-vpi$(suffix)@EXEEXT@: ./iverilog-vpi@EXEEXT@ + $(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi$(suffix)@EXEEXT@ installdirs: ../mkinstalldirs $(srcdir)/../mkinstalldirs $(bindir) uninstall: - rm -f $(bindir)/iverilog-vpi@EXEEXT@ + rm -f $(bindir)/iverilog-vpi$(suffix)@EXEEXT@ diff --git a/driver-vpi/config.h.in b/driver-vpi/config.h.in index ca1005555..9f4da0c15 100644 --- a/driver-vpi/config.h.in +++ b/driver-vpi/config.h.in @@ -5,4 +5,5 @@ #define IVERILOG_VPI_CXX "@IVLCXX@" #define IVERILOG_VPI_CFLAGS " @IVLCFLAGS@" #define IVERILOG_VPI_LDFLAGS "@SHARED@" -#define IVERILOG_VPI_LDLIBS "-lveriuser -lvpi" +#define IVERILOG_VPI_LDLIBS "-lveriuser@SUFFIX@ -lvpi@SUFFIX@" +#define IVERILOG_SUFFIX "@SUFFIX@" \ No newline at end of file diff --git a/driver-vpi/main.c b/driver-vpi/main.c index a5be8f8dc..a08260dfb 100644 --- a/driver-vpi/main.c +++ b/driver-vpi/main.c @@ -87,9 +87,9 @@ static void myExit(int exitVal) static void usage() { - fprintf(stderr,"usage: iverilog-vpi [src and obj files]...\n"); - fprintf(stderr," or iverilog-vpi -mingw=dir\n"); - fprintf(stderr," or iverilog-vpi -ivl=dir\n"); + fprintf(stderr,"usage: iverilog-vpi" IVERILOG_SUFFIX " [src and obj files]...\n"); + fprintf(stderr," or iverilog-vpi" IVERILOG_SUFFIX " -mingw=dir\n"); + fprintf(stderr," or iverilog-vpi" IVERILOG_SUFFIX " -ivl=dir\n"); myExit(1); } @@ -384,7 +384,7 @@ static int parse(int argc, char *argv[]) /* Check for the --install-dir option */ else if (stricmp("--install-dir", argv[idx]) == 0) { setup_ivl_environment(); - printf("%s\\\\lib\\\\ivl\\\\.\n", gstr.pIVL); + printf("%s\\\\lib\\\\ivl" IVERILOG_SUFFIX "\\\\.\n", gstr.pIVL); myExit(0); } /* This is different than iverilog-vpi.sh, we don't @@ -444,14 +444,14 @@ static void checkIvlDir(char *root) initDynString(&path); assign(&path,gstr.pIVL); appendBackSlash(&path); - append(&path,"bin\\vvp.exe"); + append(&path,"bin\\vvp" IVERILOG_SUFFIX ".exe"); irv = _stat(path,&stat_buf); deInitDynString(path); if (irv) { fprintf(stderr,"error: %s does not appear to be the valid root directory of\n",root); - fprintf(stderr," Icarus Verilog. Use the -ivl option of iverilog-vpi.exe to\n"); + fprintf(stderr," Icarus Verilog. Use the -ivl option of iverilog-vpi" IVERILOG_SUFFIX " to\n"); fprintf(stderr," point to the Icarus Verilog root directory. For a Windows\n"); fprintf(stderr," command shell the option would be something like -ivl=c:\\iverilog\n"); fprintf(stderr," For a Cygwin shell the option would be something like\n"); @@ -503,7 +503,7 @@ static void setup_ivl_environment() SetRegistryKey(IVL_REGKEY_IVL,gstr.pIVL); } else if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) { fprintf(stderr,"error: can not locate the Icarus Verilog root directory, use the -ivl option\n"); - fprintf(stderr," of iverilog-vpi.exe to point to the Icarus Verilog root directory.\n"); + fprintf(stderr," of iverilog-vpi" IVERILOG_SUFFIX " to point to the Icarus Verilog root directory.\n"); fprintf(stderr," For a Windows command shell the option would be something like\n"); fprintf(stderr," -ivl=c:\\iverilog For a Cygwin shell the option would be something\n"); fprintf(stderr," like -ivl=c:\\\\iverilog\n"); @@ -516,7 +516,7 @@ static void setup_ivl_environment() append(&gstr.pCFLAGS,gstr.pIVL); appendBackSlash(&gstr.pCFLAGS); append(&gstr.pCFLAGS, "\\"); - append(&gstr.pCFLAGS,"include"); + append(&gstr.pCFLAGS,"include" IVERILOG_SUFFIX); /* Build up the LDFLAGS option string */ assign(&gstr.pLDLIBS,"-L"); diff --git a/driver/Makefile.in b/driver/Makefile.in index e3b91d3e4..f624bd427 100644 --- a/driver/Makefile.in +++ b/driver/Makefile.in @@ -20,6 +20,8 @@ SHELL = /bin/sh VERSION = 0.9.devel +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -68,7 +70,7 @@ cfparse.h cfparse.c: cfparse.y main.o: main.c globals.h ../version.h - $(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl"' -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c + $(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl$(suffix)"' -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c build_string.o: build_string.c globals.h cflexor.o: cflexor.c cfparse.h cfparse_misc.h globals.h @@ -82,35 +84,35 @@ iverilog.pdf: iverilog.ps ifeq (@MINGW32@,yes) ifeq ($(MAN),none) -INSTALL_DOC = $(mandir)/man1/iverilog.1 +INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1 else ifeq ($(PS2PDF),none) -INSTALL_DOC = $(mandir)/man1/iverilog.1 +INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1 else -INSTALL_DOC = $(prefix)/iverilog.pdf $(mandir)/man1/iverilog.1 +INSTALL_DOC = $(prefix)/iverilog$(suffix).pdf $(mandir)/man1/iverilog$(suffix).1 all: iverilog.pdf endif endif INSTALL_DOCDIR = $(mandir)/man1 else -INSTALL_DOC = $(mandir)/man1/iverilog.1 +INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1 INSTALL_DOCDIR = $(mandir)/man1 endif -install: all installdirs $(bindir)/iverilog@EXEEXT@ $(INSTALL_DOC) +install: all installdirs $(bindir)/iverilog$(suffix)@EXEEXT@ $(INSTALL_DOC) -$(bindir)/iverilog@EXEEXT@: ./iverilog@EXEEXT@ - $(INSTALL_PROGRAM) ./iverilog@EXEEXT@ $(DESTDIR)$(bindir)/iverilog@EXEEXT@ +$(bindir)/iverilog$(suffix)@EXEEXT@: ./iverilog@EXEEXT@ + $(INSTALL_PROGRAM) ./iverilog@EXEEXT@ $(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@ -$(mandir)/man1/iverilog.1: $(srcdir)/iverilog.man - $(INSTALL_DATA) $(srcdir)/iverilog.man $(DESTDIR)$(mandir)/man1/iverilog.1 +$(mandir)/man1/iverilog$(suffix).1: $(srcdir)/iverilog.man + $(INSTALL_DATA) $(srcdir)/iverilog.man $(DESTDIR)$(mandir)/man1/iverilog$(suffix).1 -$(prefix)/iverilog.pdf: iverilog.pdf - $(INSTALL_DATA) iverilog.pdf $(prefix)/iverilog.pdf +$(prefix)/iverilog$(suffix).pdf: iverilog.pdf + $(INSTALL_DATA) iverilog.pdf $(prefix)/iverilog$(suffix).pdf installdirs: ../mkinstalldirs $(srcdir)/../mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(INSTALL_DOCDIR) uninstall: - rm -f $(DESTDIR)$(bindir)/iverilog@EXEEXT@ - rm -f $(DESTDIR)$(mandir)/man1/iverilog.1 $(DESTDIR)$(prefix)/iverilog.pdf + rm -f $(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@ + rm -f $(DESTDIR)$(mandir)/man1/iverilog$(suffix).1 $(DESTDIR)$(prefix)/iverilog$(suffix).pdf diff --git a/iverilog-vpi.sh b/iverilog-vpi.sh index b49abe6cc..29c9a880c 100644 --- a/iverilog-vpi.sh +++ b/iverilog-vpi.sh @@ -17,17 +17,18 @@ # 59 Temple Place - Suite 330 # Boston, MA 02111-1307, USA # -#ident "$Id: iverilog-vpi.sh,v 1.17 2007/02/06 05:07:31 steve Exp $" # These are the variables used for compiling files CC=@IVCC@ CXX=@IVCXX@ CFLAGS="@PIC@ @IVCFLAGS@ -I@INCLUDEDIR@" +SUFFIX=@SUFFIX@ + # These are used for linking... LD=$CC LDFLAGS="@SHARED@ -L@LIBDIR@" -LDLIBS="-lveriuser -lvpi" +LDLIBS="-lveriuser$SUFFIX -lvpi$SUFFIX" CCSRC= CXSRC= @@ -101,7 +102,7 @@ do ;; --install-dir) - echo "@LIBDIR@/ivl" + echo "@LIBDIR@/ivl$SUFFIX" exit ;; esac diff --git a/ivlpp/Makefile.in b/ivlpp/Makefile.in index 2a3e0d22f..c4e0b1ccf 100644 --- a/ivlpp/Makefile.in +++ b/ivlpp/Makefile.in @@ -25,6 +25,8 @@ SHELL = /bin/sh VERSION = 0.0 +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -60,16 +62,16 @@ ivlpp@EXEEXT@: $O lexor.c: lexor.lex flex -olexor.c $(srcdir)/lexor.lex -install: all installdirs $(libdir)/ivl/ivlpp@EXEEXT@ +install: all installdirs $(libdir)/ivl$(suffix)/ivlpp@EXEEXT@ -$(libdir)/ivl/ivlpp@EXEEXT@: ivlpp@EXEEXT@ - $(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ $(DESTDIR)$(libdir)/ivl/ivlpp@EXEEXT@ +$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@: ivlpp@EXEEXT@ + $(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ $(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@ installdirs: ../mkinstalldirs - $(srcdir)/../mkinstalldirs $(DESTDIR)$(libdir)/ivl + $(srcdir)/../mkinstalldirs $(DESTDIR)$(libdir)/ivl$(suffix) uninstall: - rm -f $(DESTDIR)$(libdir)/ivl/ivlpp@EXEEXT@ + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@ lexor.o: lexor.c globals.h main.o: main.c globals.h diff --git a/libveriuser/Makefile.in b/libveriuser/Makefile.in index 7fc807e84..5c69e5485 100644 --- a/libveriuser/Makefile.in +++ b/libveriuser/Makefile.in @@ -21,6 +21,7 @@ # SHELL = /bin/sh +suffix = @install_suffix@ prefix = @prefix@ exec_prefix = @exec_prefix@ @@ -86,15 +87,15 @@ clean: distclean: clean rm -f Makefile config.status config.log config.cache config.h -install:: all installdirs $(libdir)/libveriuser.a $(INSTALL32) +install:: all installdirs $(libdir)/libveriuser$(suffix).a $(INSTALL32) -$(libdir)/libveriuser.a: ./libveriuser.a - $(INSTALL_DATA) ./libveriuser.a $(DESTDIR)$(libdir)/libveriuser.a +$(libdir)/libveriuser$(suffix).a: ./libveriuser.a + $(INSTALL_DATA) ./libveriuser.a $(DESTDIR)$(libdir)/libveriuser$(suffix).a installdirs: mkinstalldirs $(srcdir)/mkinstalldirs $(DESTDIR)$(includedir) $(DESTDIR)$(libdir) uninstall:: - rm -f $(DESTDIR)$(libdir)/libveriuser.a + rm -f $(DESTDIR)$(libdir)/libveriuser$(suffix).a -include $(patsubst %.o, dep/%.d, $O) diff --git a/libveriuser/configure.in b/libveriuser/configure.in index e185749be..d3a37b8d9 100644 --- a/libveriuser/configure.in +++ b/libveriuser/configure.in @@ -10,6 +10,8 @@ AC_PROG_RANLIB AC_EXEEXT AX_CPP_IDENT +AX_ENABLE_SUFFIX + AC_CHECK_HEADERS(malloc.h) AC_CHECK_SIZEOF(unsigned long long) diff --git a/tgt-fpga/Makefile.in b/tgt-fpga/Makefile.in index a540f346c..0413f258b 100644 --- a/tgt-fpga/Makefile.in +++ b/tgt-fpga/Makefile.in @@ -24,6 +24,8 @@ SHELL = /bin/sh VERSION = 0.0 +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -87,39 +89,39 @@ distclean: clean check: all ifeq (@WIN32@,yes) -INSTALL_DOC = $(prefix)/iverilog-fpga.pdf $(mandir)/man1/iverilog-fpga.1 +INSTALL_DOC = $(prefix)/iverilog-fpga$(suffix).pdf $(mandir)/man1/iverilog-fpga$(suffix).1 INSTALL_DOCDIR = $(mandir)/man1 all: iverilog-fpga.pdf else -INSTALL_DOC = $(mandir)/man1/iverilog-fpga.1 +INSTALL_DOC = $(mandir)/man1/iverilog-fpga$(suffix).1 INSTALL_DOCDIR = $(mandir)/man1 endif -install: all installdirs $(libdir)/ivl/fpga.tgt $(INSTALL_DOC) $(libdir)/ivl/fpga.conf $(libdir)/ivl/fpga-s.conf +install: all installdirs $(libdir)/ivl$(suffix)/fpga.tgt $(INSTALL_DOC) $(libdir)/ivl$(suffix)/fpga.conf $(libdir)/ivl$(suffix)/fpga-s.conf -$(libdir)/ivl/fpga.tgt: ./fpga.tgt - $(INSTALL_PROGRAM) ./fpga.tgt $(libdir)/ivl/fpga.tgt +$(libdir)/ivl$(suffix)/fpga.tgt: ./fpga.tgt + $(INSTALL_PROGRAM) ./fpga.tgt $(libdir)/ivl$(suffix)/fpga.tgt -$(libdir)/ivl/fpga.conf: $(srcdir)/fpga.conf - $(INSTALL_DATA) $(srcdir)/fpga.conf $(libdir)/ivl/fpga.conf +$(libdir)/ivl$(suffix)/fpga.conf: $(srcdir)/fpga.conf + $(INSTALL_DATA) $(srcdir)/fpga.conf $(libdir)/ivl$(suffix)/fpga.conf -$(libdir)/ivl/fpga-s.conf: $(srcdir)/fpga-s.conf - $(INSTALL_DATA) $(srcdir)/fpga-s.conf $(libdir)/ivl/fpga-s.conf +$(libdir)/ivl$(suffix)/fpga-s.conf: $(srcdir)/fpga-s.conf + $(INSTALL_DATA) $(srcdir)/fpga-s.conf $(libdir)/ivl$(suffix)/fpga-s.conf -$(mandir)/man1/iverilog-fpga.1: $(srcdir)/iverilog-fpga.man - $(INSTALL_DATA) $(srcdir)/iverilog-fpga.man $(mandir)/man1/iverilog-fpga.1 +$(mandir)/man1/iverilog-fpga$(suffix).1: $(srcdir)/iverilog-fpga.man + $(INSTALL_DATA) $(srcdir)/iverilog-fpga.man $(mandir)/man1/iverilog-fpga$(suffix).1 -$(prefix)/iverilog-fpga.pdf: iverilog-fpga.pdf - $(INSTALL_DATA) iverilog-fpga.pdf $(prefix)/iverilog-fpga.pdf +$(prefix)/iverilog-fpga$(suffix).pdf: iverilog-fpga.pdf + $(INSTALL_DATA) iverilog-fpga.pdf $(prefix)/iverilog-fpga$(suffix).pdf installdirs: ../mkinstalldirs - $(srcdir)/../mkinstalldirs $(libdir)/ivl + $(srcdir)/../mkinstalldirs $(libdir)/ivl$(suffix) uninstall: - rm -f $(libdir)/ivl/fpga.tgt + rm -f $(libdir)/ivl$(suffix)/fpga.tgt rm -f $(INSTALL_DOC) - rm -f $(libdir)/ivl/fpga-s.conf - rm -f $(libdir)/ivl/fpga.conf + rm -f $(libdir)/ivl$(suffix)/fpga-s.conf + rm -f $(libdir)/ivl$(suffix)/fpga.conf -include $(patsubst %.o, dep/%.d, $O) diff --git a/tgt-fpga/configure.in b/tgt-fpga/configure.in index 725d36bdd..5481e1d8f 100644 --- a/tgt-fpga/configure.in +++ b/tgt-fpga/configure.in @@ -9,6 +9,8 @@ AC_PROG_INSTALL AC_CANONICAL_HOST # $host +AX_ENABLE_SUFFIX + # Combined check for Microsoft-related bogosities; sets WIN32 if found AX_WIN32 diff --git a/tgt-null/Makefile.in b/tgt-null/Makefile.in index 845b2f0e1..5cb577068 100644 --- a/tgt-null/Makefile.in +++ b/tgt-null/Makefile.in @@ -20,6 +20,8 @@ SHELL = /bin/sh VERSION = 0.9.devel +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -28,7 +30,6 @@ VPATH = $(srcdir) bindir = @bindir@ libdir = @libdir@ -includedir = $(prefix)/include CC = @CC@ INSTALL = @INSTALL@ @@ -72,25 +73,25 @@ distclean: clean check: all -install: all installdirs $(libdir)/ivl/null.tgt $(INSTALL_DOC) $(libdir)/ivl/null.conf $(libdir)/ivl/null-s.conf +install: all installdirs $(libdir)/ivl$(suffix)/null.tgt $(INSTALL_DOC) $(libdir)/ivl$(suffix)/null.conf $(libdir)/ivl$(suffix)/null-s.conf -$(libdir)/ivl/null.tgt: ./null.tgt - $(INSTALL_PROGRAM) ./null.tgt $(DESTDIR)$(libdir)/ivl/null.tgt +$(libdir)/ivl$(suffix)/null.tgt: ./null.tgt + $(INSTALL_PROGRAM) ./null.tgt $(DESTDIR)$(libdir)/ivl$(suffix)/null.tgt -$(libdir)/ivl/null.conf: $(srcdir)/null.conf - $(INSTALL_DATA) $(srcdir)/null.conf $(DESTDIR)$(libdir)/ivl/null.conf +$(libdir)/ivl$(suffix)/null.conf: $(srcdir)/null.conf + $(INSTALL_DATA) $(srcdir)/null.conf $(DESTDIR)$(libdir)/ivl$(suffix)/null.conf -$(libdir)/ivl/null-s.conf: $(srcdir)/null-s.conf - $(INSTALL_DATA) $(srcdir)/null-s.conf $(DESTDIR)$(libdir)/ivl/null-s.conf +$(libdir)/ivl$(suffix)/null-s.conf: $(srcdir)/null-s.conf + $(INSTALL_DATA) $(srcdir)/null-s.conf $(DESTDIR)$(libdir)/ivl$(suffix)/null-s.conf installdirs: ../mkinstalldirs - $(srcdir)/../mkinstalldirs $(DESTDIR)$(includedir) $(DESTDIR)$(bindir) $(DESTDIR)$(libdir)/ivl + $(srcdir)/../mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(libdir)/ivl$(suffix) uninstall: - rm -f $(DESTDIR)$(libdir)/ivl/null.tgt - rm -f $(DESTDIR)$(libdir)/ivl/null.conf - rm -f $(DESTDIR)$(libdir)/ivl/null-s.conf + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/null.tgt + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/null.conf + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/null-s.conf -include $(patsubst %.o, dep/%.d, $O) diff --git a/tgt-stub/Makefile.in b/tgt-stub/Makefile.in index fbf4702b3..b77bd6ec9 100644 --- a/tgt-stub/Makefile.in +++ b/tgt-stub/Makefile.in @@ -20,6 +20,8 @@ SHELL = /bin/sh VERSION = 0.9.devel +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -72,25 +74,25 @@ distclean: clean check: all -install: all installdirs $(libdir)/ivl/stub.tgt \ - $(libdir)/ivl/stub.conf $(libdir)/ivl/stub-s.conf +install: all installdirs $(libdir)/ivl$(suffix)/stub.tgt \ + $(libdir)/ivl$(suffix)/stub.conf $(libdir)/ivl$(suffix)/stub-s.conf -$(libdir)/ivl/stub.tgt: ./stub.tgt - $(INSTALL_PROGRAM) ./stub.tgt $(DESTDIR)$(libdir)/ivl/stub.tgt +$(libdir)/ivl$(suffix)/stub.tgt: ./stub.tgt + $(INSTALL_PROGRAM) ./stub.tgt $(DESTDIR)$(libdir)/ivl$(suffix)/stub.tgt -$(libdir)/ivl/stub.conf: stub.conf - $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl/stub.conf +$(libdir)/ivl$(suffix)/stub.conf: stub.conf + $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl$(suffix)/stub.conf -$(libdir)/ivl/stub-s.conf: stub-s.conf - $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl/stub-s.conf +$(libdir)/ivl$(suffix)/stub-s.conf: stub-s.conf + $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl$(suffix)/stub-s.conf installdirs: ../mkinstalldirs - $(srcdir)/../mkinstalldirs $(DESTDIR)$(includedir) $(DESTDIR)$(bindir) $(DESTDIR)$(libdir)/ivl + $(srcdir)/../mkinstalldirs $(DESTDIR)$(includedir) $(DESTDIR)$(bindir) $(DESTDIR)$(libdir)/ivl$(suffix) uninstall: - rm -f $(DESTDIR)$(libdir)/ivl/stub.tgt - rm -f $(DESTDIR)$(libdir)/ivl/stub.conf - rm -f $(DESTDIR)$(libdir)/ivl/stub-s.conf + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/stub.tgt + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/stub.conf + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/stub-s.conf -include $(patsubst %.o, dep/%.d, $O) diff --git a/tgt-stub/configure.in b/tgt-stub/configure.in index dab124974..5f3b050bb 100644 --- a/tgt-stub/configure.in +++ b/tgt-stub/configure.in @@ -9,6 +9,8 @@ AC_PROG_INSTALL AC_CANONICAL_HOST # $host +AX_ENABLE_SUFFIX + # Combined check for Microsoft-related bogosities; sets WIN32 if found AX_WIN32 diff --git a/tgt-vhdl/Makefile.in b/tgt-vhdl/Makefile.in index 2348e5e97..c1bbe956d 100644 --- a/tgt-vhdl/Makefile.in +++ b/tgt-vhdl/Makefile.in @@ -20,6 +20,8 @@ SHELL = /bin/sh VERSION = 0.0 +suffix = @install_suffix@ + prefix = @prefix@ prefix = @prefix@ exec_prefix = @exec_prefix@ @@ -74,23 +76,23 @@ distclean: clean check: all -install: all installdirs $(libdir)/ivl/vhdl.tgt $(libdir)/ivl/vhdl.conf \ - $(libdir)/ivl/vhdl-s.conf +install: all installdirs $(libdir)/ivl$(suffix)/vhdl.tgt $(libdir)/ivl$(suffix)/vhdl.conf \ + $(libdir)/ivl$(suffix)/vhdl-s.conf -$(libdir)/ivl/vhdl.tgt: ./vhdl.tgt - $(INSTALL_PROGRAM) ./vhdl.tgt $(DESTDIR)$(libdir)/ivl/vhdl.tgt +$(libdir)/ivl$(suffix)/vhdl.tgt: ./vhdl.tgt + $(INSTALL_PROGRAM) ./vhdl.tgt $(DESTDIR)$(libdir)/ivl$(suffix)/vhdl.tgt -$(libdir)/ivl/vhdl.conf: vhdl.conf - $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl/vhdl.conf +$(libdir)/ivl$(suffix)/vhdl.conf: vhdl.conf + $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl$(suffix)/vhdl.conf -$(libdir)/ivl/vhdl-s.conf: vhdl-s.conf - $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl/vhdl-s.conf +$(libdir)/ivl$(suffix)/vhdl-s.conf: vhdl-s.conf + $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl$(suffix)/vhdl-s.conf installdirs: ../mkinstalldirs - $(srcdir)/../mkinstalldirs $(DESTDIR)$(libdir)/ivl + $(srcdir)/../mkinstalldirs $(DESTDIR)$(libdir)/ivl$(suffix) uninstall: - rm -f $(DESTDIR)$(libdir)/ivl/vhdl.tgt $(DESTDIR)$(libdir)/ivl/vhdl.conf + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/vhdl.tgt $(DESTDIR)$(libdir)/ivl$(suffix)/vhdl.conf $(DESTDIR)$(libdir)/ivl$(suffix)/vhdl-s.conf -include $(patsubst %.o, dep/%.d, $O) diff --git a/tgt-vhdl/configure.in b/tgt-vhdl/configure.in index 3223b50e8..52ca76897 100644 --- a/tgt-vhdl/configure.in +++ b/tgt-vhdl/configure.in @@ -11,6 +11,8 @@ AC_PROG_INSTALL AC_CANONICAL_HOST # $host +AX_ENABLE_SUFFIX + # Combined check for Microsoft-related bogosities; sets WIN32 if found AX_WIN32 diff --git a/tgt-vvp/Makefile.in b/tgt-vvp/Makefile.in index b71c1310a..4c1076523 100644 --- a/tgt-vvp/Makefile.in +++ b/tgt-vvp/Makefile.in @@ -23,6 +23,8 @@ SHELL = /bin/sh VERSION = 0.0 +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -69,10 +71,10 @@ vvp.tgt: $O $(TGTDEPLIBS) $(CC) @shared@ -o $@ $O $(TGTLDFLAGS) vvp.conf: $(srcdir)/vvp.conf.in - echo 'flag:VVP_EXECUTABLE=$(bindir)/vvp' | cat $(srcdir)/vvp.conf.in - > vvp.conf + echo 'flag:VVP_EXECUTABLE=$(bindir)/vvp$(suffix)' | cat $(srcdir)/vvp.conf.in - > vvp.conf vvp-s.conf: $(srcdir)/vvp-s.conf.in - echo 'flag:VVP_EXECUTABLE=$(bindir)/vvp' | cat $(srcdir)/vvp-s.conf.in - > vvp-s.conf + echo 'flag:VVP_EXECUTABLE=$(bindir)/vvp$(suffix)' | cat $(srcdir)/vvp-s.conf.in - > vvp-s.conf Makefile: Makefile.in config.status ./config.status @@ -85,23 +87,23 @@ distclean: clean check: all -install: all installdirs $(libdir)/ivl/vvp.tgt $(libdir)/ivl/vvp.conf $(libdir)/ivl/vvp-s.conf +install: all installdirs $(libdir)/ivl$(suffix)/vvp.tgt $(libdir)/ivl$(suffix)/vvp.conf $(libdir)/ivl$(suffix)/vvp-s.conf -$(libdir)/ivl/vvp.tgt: ./vvp.tgt - $(INSTALL_PROGRAM) ./vvp.tgt $(DESTDIR)$(libdir)/ivl/vvp.tgt +$(libdir)/ivl$(suffix)/vvp.tgt: ./vvp.tgt + $(INSTALL_PROGRAM) ./vvp.tgt $(DESTDIR)$(libdir)/ivl$(suffix)/vvp.tgt -$(libdir)/ivl/vvp.conf: vvp.conf - $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl/vvp.conf +$(libdir)/ivl$(suffix)/vvp.conf: vvp.conf + $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl$(suffix)/vvp.conf -$(libdir)/ivl/vvp-s.conf: vvp-s.conf - $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl/vvp-s.conf +$(libdir)/ivl$(suffix)/vvp-s.conf: vvp-s.conf + $(INSTALL_DATA) $< $(DESTDIR)$(libdir)/ivl$(suffix)/vvp-s.conf installdirs: ../mkinstalldirs - $(srcdir)/../mkinstalldirs $(DESTDIR)$(libdir)/ivl + $(srcdir)/../mkinstalldirs $(DESTDIR)$(libdir)/ivl$(suffix) uninstall: - rm -f $(DESTDIR)$(libdir)/ivl/vvp.tgt $(DESTDIR)$(libdir)/ivl/vvp.conf $(DESTDIR)$(libdir)/ivl/vvp-s.conf + rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/vvp.tgt $(DESTDIR)$(libdir)/ivl$(suffix)/vvp.conf $(DESTDIR)$(libdir)/ivl$(suffix)/vvp-s.conf -include $(patsubst %.o, dep/%.d, $O) diff --git a/tgt-vvp/configure.in b/tgt-vvp/configure.in index eef3ee18f..9a245752a 100644 --- a/tgt-vvp/configure.in +++ b/tgt-vvp/configure.in @@ -10,6 +10,8 @@ AC_PROG_INSTALL AC_CANONICAL_HOST # $host +AX_ENABLE_SUFFIX + # Combined check for Microsoft-related bogosities; sets WIN32 if found AX_WIN32 diff --git a/vpi/Makefile.in b/vpi/Makefile.in index d6ee95e6e..77c5b492b 100644 --- a/vpi/Makefile.in +++ b/vpi/Makefile.in @@ -20,6 +20,8 @@ SHELL = /bin/sh VERSION = 0.9.devel +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -30,7 +32,7 @@ bindir = @bindir@ libdir = @libdir@ includedir = $(prefix)/include -vpidir = $(libdir)/ivl +vpidir = $(libdir)/ivl$(suffix) CC = @CC@ INSTALL = @INSTALL@ @@ -114,26 +116,26 @@ distclean: clean check: all install: all installdirs \ - $(vpidir)/system.vpi $(libdir)/ivl/system.sft \ - $(vpidir)/va_math.vpi $(libdir)/ivl/va_math.sft \ - $(vpidir)/v2005_math.vpi $(libdir)/ivl/v2005_math.sft + $(vpidir)/system.vpi $(vpidir)/system.sft \ + $(vpidir)/va_math.vpi $(vpidir)/va_math.sft \ + $(vpidir)/v2005_math.vpi $(vpidir)/v2005_math.sft $(vpidir)/system.vpi: ./system.vpi $(INSTALL_PROGRAM) ./system.vpi $(DESTDIR)$(vpidir)/system.vpi -$(libdir)/ivl/system.sft: system.sft +$(vpidir)/system.sft: system.sft $(INSTALL_DATA) $< $(DESTDIR)$@ $(vpidir)/va_math.vpi: ./va_math.vpi $(INSTALL_PROGRAM) ./va_math.vpi $(DESTDIR)$(vpidir)/va_math.vpi -$(libdir)/ivl/va_math.sft: va_math.sft +$(vpidir)/va_math.sft: va_math.sft $(INSTALL_DATA) $< $(DESTDIR)$@ $(vpidir)/v2005_math.vpi: ./v2005_math.vpi $(INSTALL_PROGRAM) ./v2005_math.vpi $(DESTDIR)$(vpidir)/v2005_math.vpi -$(libdir)/ivl/v2005_math.sft: v2005_math.sft +$(vpidir)/v2005_math.sft: v2005_math.sft $(INSTALL_DATA) $< $(DESTDIR)$@ installdirs: ../mkinstalldirs @@ -141,10 +143,10 @@ installdirs: ../mkinstalldirs uninstall: rm -f $(DESTDIR)$(vpidir)/system.vpi - rm -f $(DESTDIR)$(libdir)/ivl/system.sft + rm -f $(DESTDIR)$(vpidir)/system.sft rm -f $(DESTDIR)$(vpidir)/va_math.vpi - rm -f $(DESTDIR)$(libdir)/ivl/va_math.sft + rm -f $(DESTDIR)$(vpidir)/va_math.sft rm -f $(DESTDIR)$(vpidir)/v2005_math.vpi - rm -f $(DESTDIR)$(libdir)/ivl/v2005_math.sft + rm -f $(DESTDIR)$(vpidir)/v2005_math.sft -include $(patsubst %.o, dep/%.d, $O) diff --git a/vpi/configure.in b/vpi/configure.in index 9e0125650..bf3d8f775 100644 --- a/vpi/configure.in +++ b/vpi/configure.in @@ -71,6 +71,8 @@ AC_SUBST(file64_support) # $host +AX_ENABLE_SUFFIX + # Compiler option for position independent code, needed when making shared objects. AX_C_PICFLAG diff --git a/vvp/Makefile.in b/vvp/Makefile.in index a65994e6b..17cf2face 100644 --- a/vvp/Makefile.in +++ b/vvp/Makefile.in @@ -21,6 +21,8 @@ # SHELL = /bin/sh +suffix = @install_suffix@ + prefix = @prefix@ exec_prefix = @exec_prefix@ srcdir = @srcdir@ @@ -53,9 +55,9 @@ LIBS = @LIBS@ @EXTRALIBS@ dllib=@DLLIB@ -MDIR1 = -DMODULE_DIR1=\"$(libdir)/ivl/@vpidir1@\" +MDIR1 = -DMODULE_DIR1=\"$(libdir)/ivl$(suffix)/@vpidir1@\" ifneq (x@vpidir2@,x) -MDIR2 = -DMODULE_DIR2=\"$(libdir)/ivl/@vpidir2@\" +MDIR2 = -DMODULE_DIR2=\"$(libdir)/ivl$(suffix)/@vpidir2@\" endif all: dep vvp@EXEEXT@ libvpi.a @@ -139,18 +141,18 @@ vvp.pdf: $(srcdir)/vvp.man ifeq (@MINGW32@,yes) ifeq ($(MAN),none) -INSTALL_DOC = $(mandir)/man1/vvp.1 +INSTALL_DOC = $(mandir)/man1/vvp$(suffix).1 else ifeq ($(PS2PDF),none) -INSTALL_DOC = $(mandir)/man1/vvp.1 +INSTALL_DOC = $(mandir)/man1/vvp$(suffix).1 else -INSTALL_DOC = $(prefix)/vvp.pdf $(mandir)/man1/vvp.1 +INSTALL_DOC = $(prefix)/vvp$(suffix).pdf $(mandir)/man1/vvp$(suffix).1 all: vvp.pdf endif endif INSTALL_DOCDIR = $(mandir)/man1 else -INSTALL_DOC = $(mandir)/man1/vvp.1 +INSTALL_DOC = $(mandir)/man1/vvp$(suffix).1 INSTALL_DOCDIR = $(mandir)/man1 endif @@ -158,27 +160,27 @@ Makefile: Makefile.in config.status ./config.status -install: all installdirs $(bindir)/vvp@EXEEXT@ $(libdir)/libvpi.a $(INSTALL_DOC) +install: all installdirs $(bindir)/vvp$(suffix)@EXEEXT@ $(libdir)/libvpi$(suffix).a $(INSTALL_DOC) -$(bindir)/vvp@EXEEXT@: ./vvp@EXEEXT@ - $(INSTALL_PROGRAM) ./vvp@EXEEXT@ $(DESTDIR)$(bindir)/vvp@EXEEXT@ +$(bindir)/vvp$(suffix)@EXEEXT@: ./vvp@EXEEXT@ + $(INSTALL_PROGRAM) ./vvp@EXEEXT@ $(DESTDIR)$(bindir)/vvp$(suffix)@EXEEXT@ -$(libdir)/libvpi.a : ./libvpi.a - $(INSTALL_DATA) libvpi.a $(DESTDIR)$(libdir)/libvpi.a +$(libdir)/libvpi$(suffix).a : ./libvpi.a + $(INSTALL_DATA) libvpi.a $(DESTDIR)$(libdir)/libvpi$(suffix).a -$(mandir)/man1/vvp.1: $(srcdir)/vvp.man - $(INSTALL_DATA) $(srcdir)/vvp.man $(DESTDIR)$(mandir)/man1/vvp.1 +$(mandir)/man1/vvp$(suffix).1: $(srcdir)/vvp.man + $(INSTALL_DATA) $(srcdir)/vvp.man $(DESTDIR)$(mandir)/man1/vvp$(suffix).1 -$(prefix)/vvp.pdf: vvp.pdf - $(INSTALL_DATA) vvp.pdf $(DESTDIR)$(prefix)/vvp.pdf +$(prefix)/vvp$(suffix).pdf: vvp.pdf + $(INSTALL_DATA) vvp.pdf $(DESTDIR)$(prefix)/vvp$(suffix).pdf installdirs: $(srcdir)/mkinstalldirs $(srcdir)/mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(libdir) $(DESTDIR)$(INSTALL_DOCDIR) uninstall: $(UNINSTALL32) - rm -f $(DESTDIR)$(bindir)/vvp@EXEEXT@ - rm -f $(DESTDIR)$(libdir)/libvpi.a - rm -f $(DESTDIR)$(mandir)/man1/vvp.1 $(DESTDIR)$(prefix)/vvp.pdf + rm -f $(DESTDIR)$(bindir)/vvp$(suffix)@EXEEXT@ + rm -f $(DESTDIR)$(libdir)/libvpi$(suffix).a + rm -f $(DESTDIR)$(mandir)/man1/vvp$(suffix).1 $(DESTDIR)$(prefix)/vvp$(suffix).pdf -include $(patsubst %.o, dep/%.d, $O) diff --git a/vvp/configure.in b/vvp/configure.in index 28e762708..3ffa8bc4c 100644 --- a/vvp/configure.in +++ b/vvp/configure.in @@ -3,6 +3,8 @@ AC_CONFIG_HEADER(config.h) AC_PROG_CC +AX_ENABLE_SUFFIX + ####################### ## test for underscores. The vpi module loader in vvm needs to know this ## in order to know the name of the start symbol for the .vpi module. @@ -98,6 +100,7 @@ AC_CHECK_FUNCS(lround nan) AC_CHECK_HEADERS(sys/resource.h) case "${host}" in *linux*) AC_DEFINE([LINUX], [1], [Host operating system is Linux.]) ;; esac + # Linker option used when compiling the target AX_LD_RDYNAMIC From a8a8d3ce5b6fb1a8bcfa64fea76e83dea5b9374f Mon Sep 17 00:00:00 2001 From: Cary R Date: Mon, 17 Nov 2008 11:13:56 -0800 Subject: [PATCH 02/26] Fix MinGW suffix configuration. In the driver-vpi file we need to use g for the suffix replacement so that both libraries get changed. Also added an end line to the config.h.in file. --- driver-vpi/Makefile.in | 2 +- driver-vpi/config.h.in | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/driver-vpi/Makefile.in b/driver-vpi/Makefile.in index 73843a9bd..c484e4e32 100644 --- a/driver-vpi/Makefile.in +++ b/driver-vpi/Makefile.in @@ -69,7 +69,7 @@ main.o: main.c config.h config.h: config.h.in sed -e 's;@IVLCC@;@CC@;' -e 's;@IVLCXX@;@CXX@;' \ - -e 's;@SUFFIX@;$(suffix);' \ + -e 's;@SUFFIX@;$(suffix);g' \ -e 's;@IVLCFLAGS@;@CXXFLAGS@;' \ -e 's;@SHARED@;@shared@;' $< > $@ diff --git a/driver-vpi/config.h.in b/driver-vpi/config.h.in index 9f4da0c15..a944b3149 100644 --- a/driver-vpi/config.h.in +++ b/driver-vpi/config.h.in @@ -6,4 +6,4 @@ #define IVERILOG_VPI_CFLAGS " @IVLCFLAGS@" #define IVERILOG_VPI_LDFLAGS "@SHARED@" #define IVERILOG_VPI_LDLIBS "-lveriuser@SUFFIX@ -lvpi@SUFFIX@" -#define IVERILOG_SUFFIX "@SUFFIX@" \ No newline at end of file +#define IVERILOG_SUFFIX "@SUFFIX@" From e191fcdd28c0f23e07f0faceaa58a6b7ab9c547c Mon Sep 17 00:00:00 2001 From: Cary R Date: Mon, 17 Nov 2008 15:59:40 -0800 Subject: [PATCH 03/26] A non-negated reduction needs to change a 1'bz into a 1'bx. In a procedural single bit non-negated reduction (&, | or ^) we need to translate a 1'bz to a 1'bx. The easiest way to do that is with two %inv opcodes. This patch modifies the code generator to do this for this very special case. --- tgt-vvp/eval_expr.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tgt-vvp/eval_expr.c b/tgt-vvp/eval_expr.c index b25827f02..4b0923d13 100644 --- a/tgt-vvp/eval_expr.c +++ b/tgt-vvp/eval_expr.c @@ -2580,6 +2580,11 @@ static struct vector_info draw_unary_expr(ivl_expr_t exp, unsigned wid) } else if (inv) { assert(res.base >= 4); fprintf(vvp_out, " %%inv %u, 1;\n", res.base); + } else { + /* We need to convert a 1'bz to 1'bx. */ + assert(res.base >= 4); + fprintf(vvp_out, " %%inv %u, 1;\n", res.base); + fprintf(vvp_out, " %%inv %u, 1;\n", res.base); } /* If the result needs to be bigger then the calculated From 95065819f1468b80a92e31a2067116f454b1a023 Mon Sep 17 00:00:00 2001 From: Cary R Date: Mon, 17 Nov 2008 15:39:53 -0800 Subject: [PATCH 04/26] Evaluate constant negated reductions. This patch adds support for calculating the negated reductions (~&, ~| and ~^) in the compiler when given a constant argument. --- eval_tree.cc | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/eval_tree.cc b/eval_tree.cc index 07b337970..f4f5c93aa 100644 --- a/eval_tree.cc +++ b/eval_tree.cc @@ -1604,6 +1604,7 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width) verinum val = rval->value(); verinum::V res; + bool invert = false; switch (op_) { @@ -1632,6 +1633,8 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width) break; } + case 'A': + invert = true; case '&': { res = verinum::V1; for (unsigned idx = 0 ; idx < val.len() ; idx += 1) @@ -1639,6 +1642,8 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width) break; } + case 'N': + invert = true; case '|': { res = verinum::V0; for (unsigned idx = 0 ; idx < val.len() ; idx += 1) @@ -1646,6 +1651,8 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width) break; } + case 'X': + invert = true; case '^': { /* Reduction XOR. */ unsigned ones = 0, unknown = 0; @@ -1661,17 +1668,17 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width) break; } - if (unknown) - return new NetEConst(verinum(verinum::Vx,1,true)); - if (ones%2) - return new NetEConst(verinum(verinum::V1,1,true)); - return new NetEConst(verinum(verinum::V0,1,true)); + if (unknown) res = verinum::Vx; + else if (ones%2) res = verinum::V1; + else res = verinum::V0; + break; } default: return 0; } + if (invert) res = ~res; return new NetEConst(verinum(res, 1)); } From 319006601304a197757b2df8f0e4eb64c06de676 Mon Sep 17 00:00:00 2001 From: Cary R Date: Tue, 18 Nov 2008 09:17:23 -0800 Subject: [PATCH 05/26] Remove old real array word debug message. This message appears to be left over from the original implementation of real array words. --- vvp/words.cc | 2 -- 1 file changed, 2 deletions(-) diff --git a/vvp/words.cc b/vvp/words.cc index 1afb75338..4537e2368 100644 --- a/vvp/words.cc +++ b/vvp/words.cc @@ -270,8 +270,6 @@ void compile_netw_real(char*label, char*array_label, unsigned long array_addr, int msb, int lsb, unsigned argc, struct symb_s*argv) { - cerr << "XXXX compile_netw_real: label=" << label - << ", array_label=" << array_label << endl; __compile_real(label, 0, array_label, array_addr, msb, lsb, false, argc, argv); } From 35e0a9873243f8f6590eba4ef49c60bba136a59e Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Tue, 18 Nov 2008 14:34:34 -0800 Subject: [PATCH 06/26] Improve error message about signal type conflict. When the parser detects a signal type conflict, print a more useful error message. In the process, be more careful with what line number is actually attributed to the declaration. --- pform.cc | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/pform.cc b/pform.cc index ef3ceacd4..a737a33b4 100644 --- a/pform.cc +++ b/pform.cc @@ -1447,11 +1447,11 @@ void pform_makewire(const vlltype&li, perm_string name, bool rc = cur->set_wire_type(type); if (rc == false) { ostringstream msg; - msg << name << " definition conflicts with " - << "definition at " << cur->get_fileline() + msg << name << " " << type + << " definition conflicts with " << cur->get_wire_type() + << " definition at " << cur->get_fileline() << "."; VLerror(msg.str().c_str()); - cerr << "XXXX type=" << type <<", curtype=" << cur->get_wire_type() << endl; } } @@ -1460,9 +1460,11 @@ void pform_makewire(const vlltype&li, perm_string name, if (! cur) { new_wire_flag = true; cur = new PWire(name, type, pt, dt); + FILE_NAME(cur, li.text, li.first_line); } - FILE_NAME(cur, li.text, li.first_line); + if (type != NetNet::IMPLICIT) + FILE_NAME(cur, li.text, li.first_line); bool flag; switch (dt) { From ec0e718151824a096c0d14d2a52619c2c7dbdfcc Mon Sep 17 00:00:00 2001 From: Cary R Date: Tue, 18 Nov 2008 12:59:07 -0800 Subject: [PATCH 07/26] VHDL: make casez support 'x' and handle a full don't care case. The VHDL converter erroneously treated a casez and casex exactly the same. In reality a casez compares a 'x' value (it is not a don't care). It also adds support for a full don't care case by just returning True for the condition. --- tgt-vhdl/stmt.cc | 42 ++++++++++++++++++++++++------------------ 1 file changed, 24 insertions(+), 18 deletions(-) diff --git a/tgt-vhdl/stmt.cc b/tgt-vhdl/stmt.cc index 0e86ebf6c..c319abb34 100644 --- a/tgt-vhdl/stmt.cc +++ b/tgt-vhdl/stmt.cc @@ -608,30 +608,36 @@ int draw_casezx(vhdl_procedural *proc, stmt_container *container, vhdl_binop_expr *all = new vhdl_binop_expr(VHDL_BINOP_AND, vhdl_type::boolean()); + bool just_dont_care = true; for (unsigned i = 0; i < ivl_expr_width(net); i++) { switch (bits[i]) { + case 'x': + if (ivl_statement_type(stmt) == IVL_ST_CASEZ) break; case '?': case 'z': - case 'x': // Ignore it - break; - default: - { - // Generate a comparison for this bit position - vhdl_binop_expr *cmp = - new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); - - vhdl_type *type = vhdl_type::nunsigned(ivl_expr_width(net)); - vhdl_var_ref *lhs = - new vhdl_var_ref(test->get_name().c_str(), type); - lhs->set_slice(new vhdl_const_int(i)); - - cmp->add_expr(lhs); - cmp->add_expr(new vhdl_const_bit(bits[i])); - - all->add_expr(cmp); - } + continue; } + + // Generate a comparison for this bit position + vhdl_binop_expr *cmp = + new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean()); + + vhdl_type *type = vhdl_type::nunsigned(ivl_expr_width(net)); + vhdl_var_ref *lhs = + new vhdl_var_ref(test->get_name().c_str(), type); + lhs->set_slice(new vhdl_const_int(i)); + + cmp->add_expr(lhs); + cmp->add_expr(new vhdl_const_bit(bits[i])); + + all->add_expr(cmp); + just_dont_care = false; + } + + // If there are no bits comparisons then just put a True + if (just_dont_care) { + all->add_expr(new vhdl_const_bool(true)); } if (result) From 7529034c7ae02f8c04e877b76e925241dea48816 Mon Sep 17 00:00:00 2001 From: Nick Gasson Date: Tue, 18 Nov 2008 22:21:51 +0000 Subject: [PATCH 08/26] Fix incorrect temporary size with padding Fix for pr2224949 The compiler generates a concatenation LPM to zero-pad ports when the signal widths don't match up. However, when the VHDL generator generated the input signals to this LPM it incorrectly sized them to be the width of the result. --- tgt-vhdl/scope.cc | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/tgt-vhdl/scope.cc b/tgt-vhdl/scope.cc index 179abfbc9..5b15d6074 100644 --- a/tgt-vhdl/scope.cc +++ b/tgt-vhdl/scope.cc @@ -131,6 +131,7 @@ static string visible_nexus_signal_name(nexus_private_t *priv, vhdl_scope *scope void draw_nexus(ivl_nexus_t nexus) { nexus_private_t *priv = new nexus_private_t; + int nexus_signal_width = -1; priv->const_driver = NULL; int nptrs = ivl_nexus_ptrs(nexus); @@ -144,6 +145,8 @@ void draw_nexus(ivl_nexus_t nexus) vhdl_scope *scope = find_scope_for_signal(sig); unsigned pin = ivl_nexus_ptr_pin(nexus_ptr); link_scope_to_nexus_signal(priv, scope, sig, pin); + + nexus_signal_width = ivl_signal_width(sig); } } @@ -188,7 +191,17 @@ void draw_nexus(ivl_nexus_t nexus) else { // Create a temporary signal to connect the nexus // TODO: we could avoid this for IVL_LPM_PART_PV - vhdl_type *type = vhdl_type::type_for(ivl_lpm_width(lpm), + + // If we already know how wide the temporary should be + // (i.e. because we've seen a signal it's connected to) + // then use that, otherwise use the width of the LPM + int lpm_temp_width; + if (nexus_signal_width != -1) + lpm_temp_width = nexus_signal_width; + else + lpm_temp_width = ivl_lpm_width(lpm); + + vhdl_type *type = vhdl_type::type_for(lpm_temp_width, ivl_lpm_signed(lpm) != 0); ostringstream ss; ss << "LPM" << ivl_lpm_basename(lpm); From dafe61b0f991a2303c56d24e5b2b9a889f475a0d Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Tue, 18 Nov 2008 15:37:42 -0800 Subject: [PATCH 09/26] Update for s20081118 snapshot --- scripts/MAKE_SNAPSHOT.sh | 2 +- verilog.spec | 18 +++++++++++------- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/scripts/MAKE_SNAPSHOT.sh b/scripts/MAKE_SNAPSHOT.sh index aacf28ac6..cb26bc9ca 100644 --- a/scripts/MAKE_SNAPSHOT.sh +++ b/scripts/MAKE_SNAPSHOT.sh @@ -45,7 +45,7 @@ if [ -e $destdir/$prefix ]; then fi echo "Exporting $tag to $destdir/$prefix..." -git-archive --prefix="$prefix/" $tag | ( cd "$destdir" && tar xf - ) +git archive --prefix="$prefix/" $tag | ( cd "$destdir" && tar xf - ) versionh="$destdir/$prefix/version.h" echo "Create $versionh ..." diff --git a/verilog.spec b/verilog.spec index 568e8594d..b4492160a 100644 --- a/verilog.spec +++ b/verilog.spec @@ -1,6 +1,6 @@ #norootforbuild # -%define rev_date 20080905 +%define rev_date 20081118 # # Summary: Icarus Verilog @@ -41,7 +41,7 @@ rm -rf $RPM_BUILD_ROOT %files -%attr(-,root,root) %doc COPYING README.txt BUGS.txt QUICK_START.txt ieee1364-notes.txt mingw.txt swift.txt netlist.txt t-dll.txt vpi.txt tgt-fpga/fpga.txt cadpli/cadpli.txt +%attr(-,root,root) %doc COPYING README.txt BUGS.txt QUICK_START.txt ieee1364-notes.txt mingw.txt swift.txt netlist.txt t-dll.txt vpi.txt cadpli/cadpli.txt %attr(-,root,root) %doc examples/* %attr(-,root,root) %{_mandir}/man1/iverilog.1.gz @@ -64,6 +64,7 @@ rm -rf $RPM_BUILD_ROOT %attr(-,root,root) %{_libdir}/ivl/vvp-s.conf %attr(-,root,root) %{_libdir}/ivl/vhdl.tgt %attr(-,root,root) %{_libdir}/ivl/vhdl.conf +%attr(-,root,root) %{_libdir}/ivl/vhdl-s.conf %attr(-,root,root) %{_libdir}/ivl/system.sft %attr(-,root,root) %{_libdir}/ivl/system.vpi %attr(-,root,root) %{_libdir}/ivl/va_math.sft @@ -75,13 +76,16 @@ rm -rf $RPM_BUILD_ROOT %attr(-,root,root) %{_libdir}/libveriuser.a %attr(-,root,root) %{_libdir}/ivl/include/constants.vams %attr(-,root,root) %{_libdir}/ivl/include/disciplines.vams -%attr(-,root,root) /usr/include/ivl_target.h -%attr(-,root,root) /usr/include/vpi_user.h -%attr(-,root,root) /usr/include/acc_user.h -%attr(-,root,root) /usr/include/veriuser.h -%attr(-,root,root) /usr/include/_pli_types.h +%attr(-,root,root) /usr/include/verilog/ivl_target.h +%attr(-,root,root) /usr/include/verilog/vpi_user.h +%attr(-,root,root) /usr/include/verilog/acc_user.h +%attr(-,root,root) /usr/include/verilog/veriuser.h +%attr(-,root,root) /usr/include/verilog/_pli_types.h %changelog -n verilog +* Tue Nov 18 2008 - steve@icarus.com +- New snapshot 20080905 + * Fri Sep 03 2008 - steve@icarus.com - New snapshot 20080905 From 7ec86757c5921f41602d73f25aaf157239939494 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Tue, 18 Nov 2008 16:52:05 -0800 Subject: [PATCH 10/26] Elaborate concatenation expression put tested widths to use. Concatenation expressions need to use the tested widths of its argument expressions during elaboration. --- PExpr.cc | 2 +- PExpr.h | 4 ++++ elab_expr.cc | 21 ++++++++++++++++++--- 3 files changed, 23 insertions(+), 4 deletions(-) diff --git a/PExpr.cc b/PExpr.cc index 614ff34b8..7ee5f9298 100644 --- a/PExpr.cc +++ b/PExpr.cc @@ -152,7 +152,7 @@ bool PECallFunction::has_aa_term(Design*des, NetScope*scope) const } PEConcat::PEConcat(const svector&p, PExpr*r) -: parms_(p), repeat_(r) +: parms_(p), tested_widths_(p.count()), repeat_(r) { } diff --git a/PExpr.h b/PExpr.h index 3d6be4ab0..e043da23a 100644 --- a/PExpr.h +++ b/PExpr.h @@ -21,6 +21,7 @@ # include # include +# include # include "netlist.h" # include "verinum.h" # include "LineInfo.h" @@ -181,7 +182,10 @@ class PEConcat : public PExpr { bool bidirectional_flag) const; private: svectorparms_; + std::valarraytested_widths_; + PExpr*repeat_; + }; /* diff --git a/elab_expr.cc b/elab_expr.cc index e4c998ff5..6c32fc4c9 100644 --- a/elab_expr.cc +++ b/elab_expr.cc @@ -1366,8 +1366,10 @@ unsigned PEConcat::test_width(Design*des, NetScope*scope, expr_type_ = IVL_VT_LOGIC; unsigned count_width = 0; - for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) - count_width += parms_[idx]->test_width(des, scope, 0, 0, expr_type__, unsized_flag); + for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) { + tested_widths_[idx] = parms_[idx]->test_width(des, scope, 0, 0, expr_type__, unsized_flag); + count_width += tested_widths_[idx]; + } if (repeat_) { // The repeat expression is self-determined and its own type. @@ -1462,7 +1464,8 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope, } assert(parms_[idx]); - NetExpr*ex = elab_and_eval(des, scope, parms_[idx], 0, 0); + NetExpr*ex = elab_and_eval(des, scope, parms_[idx], + tested_widths_[idx], 0); if (ex == 0) continue; ex->set_line(*parms_[idx]); @@ -2789,6 +2792,12 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope, cerr << get_fileline() << ": debug: Short-circuit " "elaborate TRUE clause of ternary." << endl; + if (use_wid <= 0) { + cerr << get_fileline() << ": internal error: " + << "Unexpected use_wid=" << use_wid + << " processing short-circuit TRUE clause" + << " of expression: " << *this << endl; + } ivl_assert(*this, use_wid > 0); NetExpr*tru = elab_and_eval(des, scope, tru_, use_wid); return pad_to_width(tru, use_wid); @@ -2801,6 +2810,12 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope, cerr << get_fileline() << ": debug: Short-circuit " "elaborate FALSE clause of ternary." << endl; + if (use_wid <= 0) { + cerr << get_fileline() << ": internal error: " + << "Unexpected use_wid=" << use_wid + << " processing short-circuit FALSE clause" + << " of expression: " << *this << endl; + } ivl_assert(*this, use_wid > 0); NetExpr*fal = elab_and_eval(des, scope, fal_, use_wid); return pad_to_width(fal, use_wid); From 5e174f54ee0da44d03b22126dfc25166ab926736 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Tue, 18 Nov 2008 20:10:10 -0800 Subject: [PATCH 11/26] Elaborate signals in generated named blocks. Named blocks create scopes, and generated named blocks' scopes can have signals declared in them. So the elaborate_sig for the generate scheme needs to call the elaborate_sig for the processes as well as the obvious gates and tasks/functions. --- elab_scope.cc | 5 +++++ elab_sig.cc | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/elab_scope.cc b/elab_scope.cc index 2fcc1017b..cf617a640 100644 --- a/elab_scope.cc +++ b/elab_scope.cc @@ -1144,6 +1144,11 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const des->errors += 1; return; } + if (debug_scopes) + cerr << get_fileline() << ": debug: " + << "Elaborate block scope " << use_name + << " within " << scope_path(scope) << endl; + my_scope = new NetScope(scope, use_name, bl_type_==BL_PAR ? NetScope::FORK_JOIN : NetScope::BEGIN_END); diff --git a/elab_sig.cc b/elab_sig.cc index b239aa1fd..167f068a7 100644 --- a/elab_sig.cc +++ b/elab_sig.cc @@ -486,6 +486,13 @@ bool PGenerate::elaborate_sig_(Design*des, NetScope*scope) const (*cur) ->elaborate_sig(des, scope); } + typedef list::const_iterator proc_it_t; + for (proc_it_t cur = behaviors.begin() + ; cur != behaviors.end() ; cur ++ ) { + (*cur) -> statement() -> elaborate_sig(des, scope); + } + + return true; } From 3c4b9692a6a693163fea8066fec821091b7a2017 Mon Sep 17 00:00:00 2001 From: Cary R Date: Tue, 18 Nov 2008 17:17:19 -0800 Subject: [PATCH 12/26] Pads and local signal file/line should be related to creation location. When padding a signal or when creating a local signal the file and line information should be related to where the new object was created not the signal value it is being created from. This patch modifies the NetE* pad_to_width() routines to take a LineInfo object to set the location to the correct value. It fixes some set_line() calls to use the correct location. It fixes ports to not set the file/line information if it is already defined. Doing this was causing the definition of signals to become the instantiation instead of the real module declaration. --- elab_expr.cc | 45 ++++++++++++++++----------------- elaborate.cc | 37 ++++++++++++++------------- expr_synth.cc | 29 +++++++++++---------- netmisc.h | 8 +++--- pad_to_width.cc | 67 ++++++++----------------------------------------- set_width.cc | 14 ++++++----- 6 files changed, 80 insertions(+), 120 deletions(-) diff --git a/elab_expr.cc b/elab_expr.cc index 6c32fc4c9..21e302b06 100644 --- a/elab_expr.cc +++ b/elab_expr.cc @@ -377,9 +377,9 @@ NetExpr* PEBinary::elaborate_expr_base_bits_(Design*des, if (expr_wid > 0) { if (type_is_vectorable(lp->expr_type())) - lp = pad_to_width(lp, expr_wid); + lp = pad_to_width(lp, expr_wid, *this); if (type_is_vectorable(rp->expr_type())) - rp = pad_to_width(rp, expr_wid); + rp = pad_to_width(rp, expr_wid, *this); } NetEBBits*tmp = new NetEBBits(op_, lp, rp); @@ -410,8 +410,8 @@ NetExpr* PEBinary::elaborate_expr_base_div_(Design*des, padded. The divide expression operands must be the width of the output. */ if (expr_wid > 0) { - lp = pad_to_width(lp, expr_wid); - rp = pad_to_width(rp, expr_wid); + lp = pad_to_width(lp, expr_wid, *this); + rp = pad_to_width(rp, expr_wid, *this); } NetEBDiv*tmp = new NetEBDiv(op_, lp, rp); @@ -509,7 +509,7 @@ NetExpr* PEBinary::elaborate_expr_base_lshift_(Design*des, cerr << get_fileline() << ": debug: " << "Left shift expression by constant " << shift << " bits. (use_wid=" << use_wid << ")" << endl; - lp = pad_to_width(lp, use_wid); + lp = pad_to_width(lp, use_wid, *this); tmp = new NetEBShift(op_, lp, rp); } @@ -517,7 +517,7 @@ NetExpr* PEBinary::elaborate_expr_base_lshift_(Design*des, // Left side is not constant, so handle it the // default way. if (expr_wid >= 0) - lp = pad_to_width(lp, expr_wid); + lp = pad_to_width(lp, expr_wid, *this); tmp = new NetEBShift(op_, lp, rp); } @@ -582,9 +582,7 @@ NetExpr* PEBinary::elaborate_expr_base_rshift_(Design*des, tmp->set_line(*this); tmp = new NetESelect(lp, tmp, 1); tmp->cast_signed(true); - tmp->set_line(*this); - tmp = pad_to_width(tmp, use_wid); - tmp->set_line(*this); + tmp = pad_to_width(tmp, use_wid, *this); return tmp; } else if (shift >= 0) { @@ -607,8 +605,7 @@ NetExpr* PEBinary::elaborate_expr_base_rshift_(Design*des, tmp = new NetESelect(lp, tmp, tmp_wid); tmp->set_line(*this); tmp->cast_signed(lp->has_sign() && op_=='R'); - tmp = pad_to_width(tmp, use_wid); - tmp->set_line(*this); + tmp = pad_to_width(tmp, use_wid, *this); return tmp; } else if ((0-shift) >= use_wid) { @@ -626,7 +623,7 @@ NetExpr* PEBinary::elaborate_expr_base_rshift_(Design*des, // Falback, handle the general case. if (expr_wid > 0) - lp = pad_to_width(lp, expr_wid); + lp = pad_to_width(lp, expr_wid, *this); tmp = new NetEBShift(op_, lp, rp); tmp->set_line(*this); return tmp; @@ -641,9 +638,9 @@ NetExpr* PEBinary::elaborate_expr_base_mult_(Design*des, // multiplication to come out right. if (expr_wid > 0) { if (lp->has_sign() && lp->expr_type() != IVL_VT_REAL) - lp = pad_to_width(lp, expr_wid); + lp = pad_to_width(lp, expr_wid, *this); if (rp->has_sign() && rp->expr_type() != IVL_VT_REAL) - rp = pad_to_width(rp, expr_wid); + rp = pad_to_width(rp, expr_wid, *this); } // Keep constants on the right side. @@ -683,7 +680,7 @@ NetExpr* PEBinary::elaborate_expr_base_mult_(Design*des, // pad one of the arguments enough that the sum is the // desired width. if (expr_wid > (long)(lp->expr_width() + rp->expr_width())) - lp = pad_to_width(lp, expr_wid - rp->expr_width()); + lp = pad_to_width(lp, expr_wid - rp->expr_width(), *this); NetEBMult*tmp = new NetEBMult(op_, lp, rp); tmp->set_line(*this); @@ -781,9 +778,9 @@ NetExpr* PEBComp::elaborate_expr(Design*des, NetScope*scope, // pad the width here. This matters because if the arguments // are signed, then this padding will do sign extension. if (type_is_vectorable(lp->expr_type())) - lp = pad_to_width(lp, use_wid_l); + lp = pad_to_width(lp, use_wid_l, *this); if (type_is_vectorable(rp->expr_type())) - rp = pad_to_width(rp, use_wid_r); + rp = pad_to_width(rp, use_wid_r, *this); eval_expr(lp, use_wid_l); eval_expr(rp, use_wid_r); @@ -1090,7 +1087,7 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope, int expr_w sub->cast_signed(false); if (expr_wid > 0 && (unsigned)expr_wid > sub->expr_width()) - sub = pad_to_width(sub, expr_wid); + sub = pad_to_width(sub, expr_wid, *this); return sub; } @@ -2800,7 +2797,7 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope, } ivl_assert(*this, use_wid > 0); NetExpr*tru = elab_and_eval(des, scope, tru_, use_wid); - return pad_to_width(tru, use_wid); + return pad_to_width(tru, use_wid, *this); } // Condition is constant FALSE, so we only need the @@ -2818,7 +2815,7 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope, } ivl_assert(*this, use_wid > 0); NetExpr*fal = elab_and_eval(des, scope, fal_, use_wid); - return pad_to_width(fal, use_wid); + return pad_to_width(fal, use_wid, *this); } // X and Z conditions need to blend both results, so we @@ -2851,8 +2848,8 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope, /* Whatever the width we choose for the ternary operator, we need to make sure the operands match. */ - tru = pad_to_width(tru, use_wid); - fal = pad_to_width(fal, use_wid); + tru = pad_to_width(tru, use_wid, *this); + fal = pad_to_width(fal, use_wid, *this); NetETernary*res = new NetETernary(con, tru, fal); res->set_line(*this); @@ -2975,7 +2972,7 @@ NetExpr* PEUnary::elaborate_expr(Design*des, NetScope*scope, } else { if (expr_wid > 0) - ip = pad_to_width(ip, expr_wid); + ip = pad_to_width(ip, expr_wid, *this); tmp = new NetEUnary(op_, ip); tmp->set_line(*this); } @@ -3063,7 +3060,7 @@ NetExpr* PEUnary::elaborate_expr_bits_(NetExpr*operand, int expr_wid) const } if (expr_wid > (int)operand->expr_width()) - operand = pad_to_width(operand, expr_wid); + operand = pad_to_width(operand, expr_wid, *this); NetEUBits*tmp = new NetEUBits(op_, operand); tmp->set_line(*this); diff --git a/elaborate.cc b/elaborate.cc index 8c5b47c9e..bd67391b0 100644 --- a/elaborate.cc +++ b/elaborate.cc @@ -119,7 +119,7 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const << " expression is to small for l-value width " << lval->vector_width() << "." << endl; } - rval_expr = pad_to_width(rval_expr, lval->vector_width()); + rval_expr = pad_to_width(rval_expr, lval->vector_width(), *this); } NetNet*rval = rval_expr->synthesize(des, scope); @@ -165,9 +165,10 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const of the l-value. */ if (lval->vector_width() > rval->vector_width()) { if (rval->get_signed()) - rval = pad_to_width_signed(des, rval, lval->vector_width()); + rval = pad_to_width_signed(des, rval, lval->vector_width(), + *this); else - rval = pad_to_width(des, rval, lval->vector_width()); + rval = pad_to_width(des, rval, lval->vector_width(), *this); } /* If, on the other hand, the r-value insists on being @@ -861,7 +862,7 @@ NetNet*PGModule::resize_net_to_port_(Design*des, NetScope*scope, NetNet*tmp = new NetNet(scope, scope->local_symbol(), NetNet::WIRE, port_wid); tmp->local_flag(true); - tmp->set_line(*sig); + tmp->set_line(*this); // Handle the special case of a bi-directional part // select. Create a NetTran(VP) instead of a uni-directional @@ -903,9 +904,9 @@ NetNet*PGModule::resize_net_to_port_(Design*des, NetScope*scope, } else { NetNet*osig; if (as_signed) { - osig = pad_to_width_signed(des, tmp, swidth); + osig = pad_to_width_signed(des, tmp, swidth, *this); } else { - osig = pad_to_width(des, tmp, swidth); + osig = pad_to_width(des, tmp, swidth, *this); } connect(osig->pin(0), sig->pin(0)); } @@ -915,9 +916,9 @@ NetNet*PGModule::resize_net_to_port_(Design*des, NetScope*scope, if (pwidth > swidth) { delete tmp; if (as_signed) { - tmp = pad_to_width_signed(des, sig, pwidth); + tmp = pad_to_width_signed(des, sig, pwidth, *this); } else { - tmp = pad_to_width(des, sig, pwidth); + tmp = pad_to_width(des, sig, pwidth, *this); } } else { NetPartSelect*node = new NetPartSelect(sig, 0, pwidth, @@ -1192,7 +1193,7 @@ v NOTE that this also handles the case that the } delete tmp_expr; - sig->set_line(*this); + if (!sig->get_lineno()) sig->set_line(*this); if (need_bufz_for_input_port(prts)) { NetBUFZ*tmp = new NetBUFZ(scope, scope->local_symbol(), @@ -1890,7 +1891,7 @@ NetProc* PAssign::elaborate(Design*des, NetScope*scope) const unsigned wid = count_lval_width(lv); rv->set_width(wid); - rv = pad_to_width(rv, wid); + rv = pad_to_width(rv, wid, *this); if (wid > rv->expr_width()) { cerr << get_fileline() << ": error: Unable to match " @@ -1999,7 +2000,7 @@ NetProc* PAssign::elaborate(Design*des, NetScope*scope) const unsigned wid = count_lval_width(lv); if (wid > rv->expr_width()) { rv->set_width(wid); - rv = pad_to_width(rv, wid); + rv = pad_to_width(rv, wid, *this); } ivl_assert(*this, rv->expr_width() >= wid); } @@ -2053,7 +2054,7 @@ NetProc* PAssignNB::elaborate(Design*des, NetScope*scope) const } else { unsigned wid = count_lval_width(lv); rv->set_width(wid); - rv = pad_to_width(rv, wid); + rv = pad_to_width(rv, wid, *this); } NetExpr*delay = 0; @@ -2546,7 +2547,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const NetExpr*rv = elab_and_eval(des, scope, parms_[idx], wid); rv->set_width(wid); - rv = pad_to_width(rv, wid); + rv = pad_to_width(rv, wid, *this); NetAssign*pr = new NetAssign(lv, rv); block->append(pr); } @@ -2599,7 +2600,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const continue; NetESignal*sig = new NetESignal(port); - NetExpr*rv = pad_to_width(sig, count_lval_width(lv)); + NetExpr*rv = pad_to_width(sig, count_lval_width(lv), *this); /* Generate the assignment statement. */ NetAssign*ass = new NetAssign(lv, rv); @@ -2655,7 +2656,7 @@ NetCAssign* PCAssign::elaborate(Design*des, NetScope*scope) const return 0; rexp->set_width(lwid); - rexp = pad_to_width(rexp, lwid); + rexp = pad_to_width(rexp, lwid, *this); dev = new NetCAssign(lval, rexp); @@ -3253,7 +3254,7 @@ NetForce* PForce::elaborate(Design*des, NetScope*scope) const return 0; rexp->set_width(lwid, true); - rexp = pad_to_width(rexp, lwid); + rexp = pad_to_width(rexp, lwid, *this); dev = new NetForce(lval, rexp); @@ -3318,7 +3319,7 @@ NetProc* PForStatement::elaborate(Design*des, NetScope*scope) const properly. Then use it to build the assignment statement. */ etmp = elab_and_eval(des, scope, expr1_, use_width); etmp->set_width(use_width); - etmp = pad_to_width(etmp, use_width); + etmp = pad_to_width(etmp, use_width, *this); if (debug_elaborate) { cerr << get_fileline() << ": debug: FOR initial assign: " @@ -3331,7 +3332,7 @@ NetProc* PForStatement::elaborate(Design*des, NetScope*scope) const if (etmp->expr_type() != IVL_VT_REAL) { unsigned wid = count_lval_width(lv); etmp->set_width(wid); - etmp = pad_to_width(etmp, wid); + etmp = pad_to_width(etmp, wid, *this); assert(etmp->expr_width() >= wid); } diff --git a/expr_synth.cc b/expr_synth.cc index ff829aacf..fcd690eaa 100644 --- a/expr_synth.cc +++ b/expr_synth.cc @@ -111,8 +111,8 @@ NetNet* NetEBAdd::synthesize(Design*des, NetScope*scope) rsig = cast_to_real(des, scope, rsig); } else { - lsig = pad_to_width(des, lsig, expr_width()); - rsig = pad_to_width(des, rsig, expr_width()); + lsig = pad_to_width(des, lsig, expr_width(), *this); + rsig = pad_to_width(des, rsig, expr_width(), *this); assert(lsig->vector_width() == rsig->vector_width()); width=lsig->vector_width(); @@ -167,8 +167,8 @@ NetNet* NetEBBits::synthesize(Design*des, NetScope*scope) unsigned width = expr_width(); if (rsig->vector_width() > width) width = rsig->vector_width(); - lsig = pad_to_width(des, lsig, width); - rsig = pad_to_width(des, rsig, width); + lsig = pad_to_width(des, lsig, width, *this); + rsig = pad_to_width(des, rsig, width, *this); assert(lsig->vector_width() == rsig->vector_width()); NetNet*osig = new NetNet(scope, scope->local_symbol(), @@ -230,13 +230,13 @@ NetNet* NetEBComp::synthesize(Design*des, NetScope*scope) if (rsig->vector_width() > width) width = rsig->vector_width(); if (lsig->get_signed()) - lsig = pad_to_width_signed(des, lsig, width); + lsig = pad_to_width_signed(des, lsig, width, *this); else - lsig = pad_to_width(des, lsig, width); + lsig = pad_to_width(des, lsig, width, *this); if (rsig->get_signed()) - rsig = pad_to_width_signed(des, rsig, width); + rsig = pad_to_width_signed(des, rsig, width, *this); else - rsig = pad_to_width(des, rsig, width); + rsig = pad_to_width(des, rsig, width, *this); } NetNet*osig = new NetNet(scope, scope->local_symbol(), @@ -768,10 +768,13 @@ NetNet* NetEConst::synthesize(Design*des, NetScope*scope) osig->local_flag(true); osig->data_type(expr_type()); osig->set_signed(has_sign()); - NetConst*con = new NetConst(scope, scope->local_symbol(), value()); - connect(osig->pin(0), con->pin(0)); + osig->set_line(*this); + NetConst*con = new NetConst(scope, scope->local_symbol(), value()); des->add_node(con); + con->set_line(*this); + + connect(osig->pin(0), con->pin(0)); return osig; } @@ -1154,8 +1157,8 @@ NetNet* NetETernary::synthesize(Design *des, NetScope*scope) osig->local_flag(true); /* Make sure both value operands are the right width. */ - tsig = crop_to_width(des, pad_to_width(des, tsig, width), width); - fsig = crop_to_width(des, pad_to_width(des, fsig, width), width); + tsig = crop_to_width(des, pad_to_width(des, tsig, width, *this), width); + fsig = crop_to_width(des, pad_to_width(des, fsig, width, *this), width); assert(width == tsig->vector_width()); assert(width == fsig->vector_width()); @@ -1302,7 +1305,7 @@ NetNet* NetEUFunc::synthesize(Design*des, NetScope*scope) NetFuncDef*def = func_->func_def(); for (unsigned idx = 0; idx < eparms.count(); idx += 1) { NetNet*tmp = pad_to_width(des, eparms[idx], - def->port(idx)->vector_width()); + def->port(idx)->vector_width(), *this); connect(net->pin(idx+1), tmp->pin(0)); } diff --git a/netmisc.h b/netmisc.h index 29333b063..c51ba02f7 100644 --- a/netmisc.h +++ b/netmisc.h @@ -63,10 +63,12 @@ inline NetScope* symbol_search(const LineInfo*li, * not transforming the expression at all, if it is already wide * enough. */ -extern NetExpr*pad_to_width(NetExpr*expr, unsigned wid); -extern NetNet*pad_to_width(Design*des, NetNet*n, unsigned w); +extern NetExpr*pad_to_width(NetExpr*expr, unsigned wid, const LineInfo&info); +extern NetNet*pad_to_width(Design*des, NetNet*n, unsigned w, + const LineInfo&info); -extern NetNet*pad_to_width_signed(Design*des, NetNet*n, unsigned w); +extern NetNet*pad_to_width_signed(Design*des, NetNet*n, unsigned w, + const LineInfo&info); /* * Generate the nodes necessary to cast an expression (a net) to a diff --git a/pad_to_width.cc b/pad_to_width.cc index 373d9457e..a63c75b15 100644 --- a/pad_to_width.cc +++ b/pad_to_width.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999-2005 Stephen Williams (steve@icarus.com) + * Copyright (c) 1999-2008 Stephen Williams (steve@icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -16,9 +16,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ -#ifdef HAVE_CVS_IDENT -#ident "$Id: pad_to_width.cc,v 1.20 2005/12/22 15:43:47 steve Exp $" -#endif # include "config.h" @@ -32,7 +29,7 @@ * not transforming the expression at all, if it is already wide * enough. */ -NetExpr*pad_to_width(NetExpr*expr, unsigned wid) +NetExpr*pad_to_width(NetExpr*expr, unsigned wid, const LineInfo&info) { if (wid <= expr->expr_width()) return expr; @@ -42,12 +39,13 @@ NetExpr*pad_to_width(NetExpr*expr, unsigned wid) if (NetEConst*tmp = dynamic_cast(expr)) { verinum oval = pad_to_width(tmp->value(), wid); tmp = new NetEConst(oval); + tmp->set_line(info); delete expr; return tmp; } NetESelect*tmp = new NetESelect(expr, 0, wid); - tmp->set_line(*expr); + tmp->set_line(info); tmp->cast_signed(expr->has_sign()); return tmp; } @@ -57,7 +55,7 @@ NetExpr*pad_to_width(NetExpr*expr, unsigned wid) * NetConst of constant zeros. Use a NetConcat node to do the * concatenation. */ -NetNet*pad_to_width(Design*des, NetNet*net, unsigned wid) +NetNet*pad_to_width(Design*des, NetNet*net, unsigned wid, const LineInfo&info) { NetScope*scope = net->scope(); @@ -80,6 +78,7 @@ NetNet*pad_to_width(Design*des, NetNet*net, unsigned wid) NetNet*tmp = new NetNet(scope, scope->local_symbol(), NetNet::WIRE, wid - net->vector_width()); tmp->data_type( net->data_type() ); + tmp->set_line(info); tmp->local_flag(true); connect(cc->pin(2), tmp->pin(0)); @@ -88,14 +87,15 @@ NetNet*pad_to_width(Design*des, NetNet*net, unsigned wid) tmp = new NetNet(scope, scope->local_symbol(), NetNet::WIRE, wid); tmp->data_type( net->data_type() ); - tmp->set_line(*net); + tmp->set_line(info); tmp->local_flag(true); connect(cc->pin(0), tmp->pin(0)); return tmp; } -NetNet*pad_to_width_signed(Design*des, NetNet*net, unsigned wid) +NetNet*pad_to_width_signed(Design*des, NetNet*net, unsigned wid, + const LineInfo&info) { NetScope*scope = net->scope(); @@ -104,11 +104,11 @@ NetNet*pad_to_width_signed(Design*des, NetNet*net, unsigned wid) NetSignExtend*se = new NetSignExtend(scope, scope->local_symbol(), wid); - se->set_line(*net); + se->set_line(info); des->add_node(se); NetNet*tmp = new NetNet(scope, scope->local_symbol(), NetNet::WIRE, wid); - tmp->set_line(*net); + tmp->set_line(info); tmp->local_flag(true); tmp->data_type(net->data_type()); tmp->set_signed(true); @@ -139,48 +139,3 @@ NetNet*crop_to_width(Design*des, NetNet*net, unsigned wid) return tmp; } - -/* - * $Log: pad_to_width.cc,v $ - * Revision 1.20 2005/12/22 15:43:47 steve - * pad_to_width handles signed expressions. - * - * Revision 1.19 2005/07/07 16:22:49 steve - * Generalize signals to carry types. - * - * Revision 1.18 2005/05/24 01:44:28 steve - * Do sign extension of structuran nets. - * - * Revision 1.17 2005/04/24 23:44:02 steve - * Update DFF support to new data flow. - * - * Revision 1.16 2005/01/12 03:17:37 steve - * Properly pad vector widths in pgassign. - * - * Revision 1.15 2004/02/18 17:11:57 steve - * Use perm_strings for named langiage items. - * - * Revision 1.14 2003/03/06 00:28:42 steve - * All NetObj objects have lex_string base names. - * - * Revision 1.13 2003/01/27 05:09:17 steve - * Spelling fixes. - * - * Revision 1.12 2003/01/26 21:15:59 steve - * Rework expression parsing and elaboration to - * accommodate real/realtime values and expressions. - * - * Revision 1.11 2002/08/12 01:35:00 steve - * conditional ident string using autoconfig. - * - * Revision 1.10 2002/05/25 16:43:22 steve - * Better padding of constants. - * - * Revision 1.9 2001/10/28 01:14:53 steve - * NetObj constructor finally requires a scope. - * - * Revision 1.8 2001/07/25 03:10:49 steve - * Create a config.h.in file to hold all the config - * junk, and support gcc 3.0. (Stephan Boettcher) - */ - diff --git a/set_width.cc b/set_width.cc index 24a6f8df0..ed209c754 100644 --- a/set_width.cc +++ b/set_width.cc @@ -130,13 +130,13 @@ bool NetEBBits::set_width(unsigned w, bool) /* If the operands end up too small, then pad them to suit. */ if (left_->expr_width() < use_width) { - NetExpr*tmp = pad_to_width(left_, use_width); + NetExpr*tmp = pad_to_width(left_, use_width, *this); assert(tmp); left_ = tmp; } if (right_->expr_width() < w) { - NetExpr*tmp = pad_to_width(right_, use_width); + NetExpr*tmp = pad_to_width(right_, use_width, *this); assert(tmp); right_ = tmp; } @@ -211,13 +211,13 @@ bool NetEBShift::set_width(unsigned w, bool) case 'l': left_->set_width(w); if (left_->expr_width() < w) - left_ = pad_to_width(left_, w); + left_ = pad_to_width(left_, w, *this); break; case 'r': case 'R': if (left_->expr_width() < w) - left_ = pad_to_width(left_, w); + left_ = pad_to_width(left_, w, *this); break; default: @@ -407,9 +407,11 @@ bool NetETernary::set_width(unsigned w, bool last_chance) the user requests, at least pad the smaller width to suit the larger. */ if (true_val_->expr_width() < false_val_->expr_width()) - true_val_ = pad_to_width(true_val_, false_val_->expr_width()); + true_val_ = pad_to_width(true_val_, false_val_->expr_width(), + *this); if (false_val_->expr_width() < true_val_->expr_width()) - false_val_ = pad_to_width(false_val_, true_val_->expr_width()); + false_val_ = pad_to_width(false_val_, true_val_->expr_width(), + *this); expr_width(true_val_->expr_width()); return flag; From cedbdb63fa92d2045ce577dfcdbab1b205870cac Mon Sep 17 00:00:00 2001 From: Cary R Date: Tue, 18 Nov 2008 17:22:06 -0800 Subject: [PATCH 13/26] VHDL make comment for temporaries unique. Make the comment for local signals (temporaries) unique from normal signals. --- tgt-vhdl/scope.cc | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/tgt-vhdl/scope.cc b/tgt-vhdl/scope.cc index 5b15d6074..98426bc36 100644 --- a/tgt-vhdl/scope.cc +++ b/tgt-vhdl/scope.cc @@ -366,8 +366,13 @@ static void declare_signals(vhdl_entity *ent, ivl_scope_t scope) vhdl_decl *decl = new vhdl_signal_decl(name.c_str(), sig_type); ostringstream ss; - ss << "Declared at " << ivl_signal_file(sig) << ":" - << ivl_signal_lineno(sig); + if (ivl_signal_local(sig)) { + ss << "Temporary created at " << ivl_signal_file(sig) << ":" + << ivl_signal_lineno(sig); + } else { + ss << "Declared at " << ivl_signal_file(sig) << ":" + << ivl_signal_lineno(sig); + } decl->set_comment(ss.str().c_str()); ent->get_arch()->get_scope()->add_decl(decl); From 5eaea58209772a4d6c0d4fc68853b03efdb1be06 Mon Sep 17 00:00:00 2001 From: Cary R Date: Tue, 18 Nov 2008 18:28:45 -0800 Subject: [PATCH 14/26] Update GNU address in -V output and add -V stub to VHDL target. This patch updates the GNU address in the -V output, adds the VERSION_TAG info to the tgt-vvp back end and adds the whole -V hook to the tgt-vhdl back end. --- driver/main.c | 8 ++++---- ivlpp/main.c | 8 ++++---- main.cc | 14 +++++++------- tgt-vhdl/Makefile.in | 2 +- tgt-vhdl/vhdl.cc | 25 +++++++++++++++++++++++++ tgt-vvp/vvp.c | 15 +++++++-------- 6 files changed, 48 insertions(+), 24 deletions(-) diff --git a/driver/main.c b/driver/main.c index 8d26cf1b2..e11045794 100644 --- a/driver/main.c +++ b/driver/main.c @@ -31,9 +31,9 @@ const char NOTICE[] = " MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" " GNU General Public License for more details.\n" "\n" -" You should have received a copy of the GNU General Public License\n" -" along with this program; if not, write to the Free Software\n" -" Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n" +" You should have received a copy of the GNU General Public License along\n" +" with this program; if not, write to the Free Software Foundation, Inc.,\n" +" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n" ; const char HELP[] = @@ -844,7 +844,7 @@ int main(int argc, char **argv) if (version_flag || verbose_flag) { printf("Icarus Verilog version " VERSION " (" VERSION_TAG ")\n\n"); - printf("Copyright 1998-2008 Stephen Williams\n"); + printf("Copyright 1998-2008 Stephen Williams\n\n"); puts(NOTICE); } diff --git a/ivlpp/main.c b/ivlpp/main.c index a8d761ebc..d25d286d2 100644 --- a/ivlpp/main.c +++ b/ivlpp/main.c @@ -31,9 +31,9 @@ const char NOTICE[] = " MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" " GNU General Public License for more details.\n" "\n" -" You should have received a copy of the GNU General Public License\n" -" along with this program; if not, write to the Free Software\n" -" Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n" +" You should have received a copy of the GNU General Public License along\n" +" with this program; if not, write to the Free Software Foundation, Inc.,\n" +" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n" ; # include @@ -289,7 +289,7 @@ int main(int argc, char*argv[]) case 'v': fprintf(stderr, "Icarus Verilog Preprocessor version " VERSION " (" VERSION_TAG ")\n\n"); - fprintf(stderr, "%s\n", COPYRIGHT); + fprintf(stderr, "%s\n\n", COPYRIGHT); fputs(NOTICE, stderr); break; diff --git a/main.cc b/main.cc index abdb03245..772f59ed3 100644 --- a/main.cc +++ b/main.cc @@ -33,9 +33,9 @@ const char NOTICE[] = " MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" " GNU General Public License for more details.\n" "\n" -" You should have received a copy of the GNU General Public License\n" -" along with this program; if not, write to the Free Software\n" -" Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n" +" You should have received a copy of the GNU General Public License along\n" +" with this program; if not, write to the Free Software Foundation, Inc.,\n" +" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n" ; # include @@ -589,10 +589,10 @@ int main(int argc, char*argv[]) return flag_errors; if (version_flag) { - cout << "\n\nIcarus Verilog Parser/Elaborator version " - << VERSION << " (" << VERSION_TAG << ")" << endl; - cout << COPYRIGHT << endl; - cout << endl << NOTICE << endl; + cout << "\nIcarus Verilog Parser/Elaborator version " + << VERSION << " (" << VERSION_TAG << ")" << endl << endl; + cout << COPYRIGHT << endl << endl; + cout << NOTICE << endl; dll_target_obj.test_version(flags["DLL"]); diff --git a/tgt-vhdl/Makefile.in b/tgt-vhdl/Makefile.in index c1bbe956d..20423541e 100644 --- a/tgt-vhdl/Makefile.in +++ b/tgt-vhdl/Makefile.in @@ -38,7 +38,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ CXXFLAGS = -Wall @CXXFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/tgt-vhdl/vhdl.cc b/tgt-vhdl/vhdl.cc index ecf59b339..b2dc42248 100644 --- a/tgt-vhdl/vhdl.cc +++ b/tgt-vhdl/vhdl.cc @@ -18,6 +18,7 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */ +#include "version.h" #include "vhdl_target.h" #include "vhdl_element.hh" @@ -31,6 +32,24 @@ #include #include +static const char*version_string = +"Icarus Verilog VHDL Code Generator " VERSION " (" VERSION_TAG ")\n\n" +"Copyright (C) 2008 Nick Gasson (nick@nickg.me.uk)\n\n" +" This program is free software; you can redistribute it and/or modify\n" +" it under the terms of the GNU General Public License as published by\n" +" the Free Software Foundation; either version 2 of the License, or\n" +" (at your option) any later version.\n" +"\n" +" This program is distributed in the hope that it will be useful,\n" +" but WITHOUT ANY WARRANTY; without even the implied warranty of\n" +" MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" +" GNU General Public License for more details.\n" +"\n" +" You should have received a copy of the GNU General Public License along\n" +" with this program; if not, write to the Free Software Foundation, Inc.,\n" +" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n" +; + /* * Maps a signal to the scope it is defined within. Also * provides a mechanism for renaming signals -- i.e. when @@ -194,3 +213,9 @@ extern "C" int target_design(ivl_design_t des) return g_errors; } + +extern "C" const char* target_query(const char*key) +{ + if (strcmp(key, "version") == 0) return version_string; + return 0; +} diff --git a/tgt-vvp/vvp.c b/tgt-vvp/vvp.c index 7d844721f..3fe0bf0ef 100644 --- a/tgt-vvp/vvp.c +++ b/tgt-vvp/vvp.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001-2007 Stephen Williams (steve@icarus.com) + * Copyright (c) 2001-2008 Stephen Williams (steve@icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -17,9 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ -/* - */ - +# include "version.h" # include "vvp_priv.h" # include # include @@ -27,7 +25,8 @@ # include static const char*version_string = -"Icarus Verilog VVP Code Generator " VERSION "\n" +"Icarus Verilog VVP Code Generator " VERSION " (" VERSION_TAG ")\n\n" +"Copyright (c) 2001-2008 Stephen Williams (steve@icarus.com)\n\n" " This program is free software; you can redistribute it and/or modify\n" " it under the terms of the GNU General Public License as published by\n" " the Free Software Foundation; either version 2 of the License, or\n" @@ -38,9 +37,9 @@ static const char*version_string = " MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" " GNU General Public License for more details.\n" "\n" -" You should have received a copy of the GNU General Public License\n" -" along with this program; if not, write to the Free Software\n" -" Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n" +" You should have received a copy of the GNU General Public License along\n" +" with this program; if not, write to the Free Software Foundation, Inc.,\n" +" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n" ; FILE*vvp_out = 0; From a288b0180c6fbae8a7c7d60b47bfe2ab1552a943 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Wed, 19 Nov 2008 13:28:50 -0800 Subject: [PATCH 15/26] Fix concatenations losing track of its repeat values. In some cases, it was possible for the NetEConcat expression to lose track of the repeat expression, causing the output result to have a broken concatenation expression. This also adds some internal checks that the concatenation widths add up properly. --- expr_synth.cc | 10 ++++++++++ net_expr.cc | 7 ++++++- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/expr_synth.cc b/expr_synth.cc index fcd690eaa..89fd2d2b8 100644 --- a/expr_synth.cc +++ b/expr_synth.cc @@ -745,6 +745,7 @@ NetNet* NetEConcat::synthesize(Design*des, NetScope*scope) des->add_node(concat); connect(concat->pin(0), osig->pin(0)); + unsigned count_input_width = 0; unsigned cur_pin = 1; for (unsigned rpt = 0; rpt < repeat(); rpt += 1) { for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) { @@ -752,9 +753,18 @@ NetNet* NetEConcat::synthesize(Design*des, NetScope*scope) ivl_assert(*this, tmp[concat_item]); connect(concat->pin(cur_pin), tmp[concat_item]->pin(0)); cur_pin += 1; + count_input_width += tmp[concat_item]->vector_width(); } } + if (count_input_width != osig->vector_width()) { + cerr << get_fileline() << ": internal error: " + << "NetEConcat input width = " << count_input_width + << ", expecting " << osig->vector_width() + << " (repeat=" << repeat() << ")" << endl; + des->errors += 1; + } + delete[]tmp; return osig; } diff --git a/net_expr.cc b/net_expr.cc index 9dd6b59b1..ff5482418 100644 --- a/net_expr.cc +++ b/net_expr.cc @@ -380,7 +380,8 @@ void NetEConcat::set(unsigned idx, NetExpr*e) NetEConcat* NetEConcat::dup_expr() const { - NetEConcat*dup = new NetEConcat(parms_.count(), repeat_); + NetEConcat*dup = new NetEConcat(parms_.count(), 0); + dup->set_line(*this); for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) if (parms_[idx]) { NetExpr*tmp = parms_[idx]->dup_expr(); @@ -389,7 +390,11 @@ NetEConcat* NetEConcat::dup_expr() const } + dup->repeat_ = repeat_? repeat_->dup_expr() : 0; + dup->repeat_value_ = repeat_value_; + dup->repeat_calculated_ = repeat_calculated_; dup->expr_width(expr_width()); + return dup; } From c9077bd0be34551736b294b6d813674adb111939 Mon Sep 17 00:00:00 2001 From: Cary R Date: Wed, 19 Nov 2008 14:39:59 -0800 Subject: [PATCH 16/26] For scheduled put values save the string and free it after the put. Users expect that vpi_put_value() will keep a copy of the string that is passed to it. This patch implements this buy copying the string and then freeing it after the actual put_value call. --- vvp/vpi_priv.cc | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/vvp/vpi_priv.cc b/vvp/vpi_priv.cc index 321b1109e..ae09d6240 100644 --- a/vvp/vpi_priv.cc +++ b/vvp/vpi_priv.cc @@ -677,6 +677,22 @@ struct vpip_put_value_event : vvp_gen_event_s { void vpip_put_value_event::run_run() { handle->vpi_type->vpi_put_value_ (handle, &value, flags); + switch (value.format) { + /* Free the copied string. */ + case vpiBinStrVal: + case vpiOctStrVal: + case vpiDecStrVal: + case vpiHexStrVal: + case vpiStringVal: + free(value.value.str); + break; + /* If these are every copied then free them too. */ + case vpiTimeVal: + case vpiVectorVal: + case vpiStrengthVal: + default: + break; + } } vpiHandle vpi_put_value(vpiHandle obj, s_vpi_value*vp, @@ -720,6 +736,22 @@ vpiHandle vpi_put_value(vpiHandle obj, s_vpi_value*vp, vpip_put_value_event*put = new vpip_put_value_event; put->handle = obj; put->value = *vp; + switch (put->value.format) { + /* If this is scheduled make a copy of the string. */ + case vpiBinStrVal: + case vpiOctStrVal: + case vpiDecStrVal: + case vpiHexStrVal: + case vpiStringVal: + put->value.value.str = strdup(put->value.value.str); + break; + /* Do these also need to be copied? */ + case vpiTimeVal: + case vpiVectorVal: + case vpiStrengthVal: + default: + break; + } put->flags = flags; schedule_generic(put, dly, false); return 0; From 24827c4b42e769ffb3b4e23cd9d8a46e24a7da78 Mon Sep 17 00:00:00 2001 From: Cary R Date: Wed, 19 Nov 2008 16:45:17 -0800 Subject: [PATCH 17/26] Add a -V flag to the runtime and update the manual pages. This patch adds a -V flag to the runtime to print version information. It also updates the manual page to document this and makes some minor changes to the iverilog an iverilog-vpi manual pages. --- driver/iverilog.man | 2 +- iverilog-vpi.man | 4 ++-- vvp/Makefile.in | 4 +++- vvp/main.cc | 32 ++++++++++++++++++++++++++++++-- vvp/vvp.man | 7 +++++-- 5 files changed, 41 insertions(+), 8 deletions(-) diff --git a/driver/iverilog.man b/driver/iverilog.man index a365b8967..9db60b4d8 100644 --- a/driver/iverilog.man +++ b/driver/iverilog.man @@ -1,4 +1,4 @@ -.TH iverilog 1 "April 22nd, 2008" Version "0.9.devel" +.TH iverilog 1 "April 22nd, 2008" "" "Version 0.9.devel" .SH NAME iverilog - Icarus Verilog compiler diff --git a/iverilog-vpi.man b/iverilog-vpi.man index fb559691f..5cfd082ba 100644 --- a/iverilog-vpi.man +++ b/iverilog-vpi.man @@ -1,4 +1,4 @@ -.TH iverilog-vpi 1 "$Date: 2004/10/04 01:10:53 $" Version "$Date: 2004/10/04 01:10:53 $" +.TH iverilog-vpi 1 "November 19th, 2008" "" "Version 0.9.devel" .SH NAME iverilog-vpi - Compile front end for VPI modules @@ -129,7 +129,7 @@ iverilog(1), vvp(1), .SH COPYRIGHT .nf -Copyright \(co 2002 Stephen Williams +Copyright \(co 2002-2008 Stephen Williams This document can be freely redistributed according to the terms of the GNU General Public License version 2.0 diff --git a/vvp/Makefile.in b/vvp/Makefile.in index 17cf2face..ad4f066ce 100644 --- a/vvp/Makefile.in +++ b/vvp/Makefile.in @@ -21,6 +21,8 @@ # SHELL = /bin/sh +VERSION = 0.0 + suffix = @install_suffix@ prefix = @prefix@ @@ -48,7 +50,7 @@ YACC = @YACC@ MAN = @MAN@ PS2PDF = @PS2PDF@ -CPPFLAGS = @ident_support@ -I. -I.. -I $(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ +CPPFLAGS = @ident_support@ -I. -I.. -I $(srcdir) -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ CXXFLAGS = -Wall @CXXFLAGS@ LDFLAGS = @rdynamic@ @LDFLAGS@ LIBS = @LIBS@ @EXTRALIBS@ diff --git a/vvp/main.cc b/vvp/main.cc index 111273400..ddf7aacd4 100644 --- a/vvp/main.cc +++ b/vvp/main.cc @@ -17,6 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ +# include "version.h" # include "config.h" # include "parse_misc.h" # include "compile.h" @@ -66,6 +67,7 @@ extern "C" long int lround(double x) #endif bool verbose_flag = false; +bool version_flag = false; static int vvp_return_value = 0; void vpip_set_return_value(int value) @@ -166,7 +168,7 @@ int main(int argc, char*argv[]) /* For non-interactive runs we do not want to run the interactive * debugger, so make $stop just execute a $finish. */ stop_is_finish = false; - while ((opt = getopt(argc, argv, "+hl:M:m:nsv")) != EOF) switch (opt) { + while ((opt = getopt(argc, argv, "+hl:M:m:nsvV")) != EOF) switch (opt) { case 'h': fprintf(stderr, "Usage: vvp [options] input-file [+plusargs...]\n" @@ -178,7 +180,8 @@ int main(int argc, char*argv[]) " -m module Load vpi module.\n" " -n Non-interactive ($stop = $finish).\n" " -s $stop right away.\n" - " -v Verbose progress messages.\n" ); + " -v Verbose progress messages.\n" + " -V Print the version information.\n" ); exit(0); case 'l': logfile_name = optarg; @@ -203,6 +206,9 @@ int main(int argc, char*argv[]) case 'v': verbose_flag = true; break; + case 'V': + version_flag = true; + break; default: flag_errors += 1; } @@ -210,6 +216,28 @@ int main(int argc, char*argv[]) if (flag_errors) return flag_errors; + if (version_flag) { + fprintf(stderr, "Icarus Verilog runtime version " VERSION " (" + VERSION_TAG ")\n\n"); + fprintf(stderr, "Copyright 1998-2008 Stephen Williams\n\n"); + fprintf(stderr, +" This program is free software; you can redistribute it and/or modify\n" +" it under the terms of the GNU General Public License as published by\n" +" the Free Software Foundation; either version 2 of the License, or\n" +" (at your option) any later version.\n" +"\n" +" This program is distributed in the hope that it will be useful,\n" +" but WITHOUT ANY WARRANTY; without even the implied warranty of\n" +" MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" +" GNU General Public License for more details.\n" +"\n" +" You should have received a copy of the GNU General Public License along\n" +" with this program; if not, write to the Free Software Foundation, Inc.,\n" +" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n\n" +); + return 0; + } + if (optind == argc) { fprintf(stderr, "%s: no input file.\n", argv[0]); return -1; diff --git a/vvp/vvp.man b/vvp/vvp.man index 491cfa4da..3cb2d8ffc 100644 --- a/vvp/vvp.man +++ b/vvp/vvp.man @@ -1,4 +1,4 @@ -.TH vvp 1 "$Date: 2005/01/29 06:28:19 $" Version "$Date: 2005/01/29 06:28:19 $" +.TH vvp 1 "November 19th, 2008" "" "Version 0.9.devel" .SH NAME vvp - Icarus Verilog vvp runtime engine @@ -54,6 +54,9 @@ hold of the simulation just before it starts. .B -v Turn on verbose messages. This will cause information about run time progress to be printed to standard out. +.TP 8 +.B -V +Print the version of the runtime, and exit. .SH EXTENDED ARGUMENTS .PP @@ -151,7 +154,7 @@ iverilog-vpi(1), .SH COPYRIGHT .nf -Copyright \(co 2001-2003 Stephen Williams +Copyright \(co 2001-2008 Stephen Williams This document can be freely redistributed according to the terms of the GNU General Public License version 2.0 From e416fb6486044b5ddca09de145bb970b071da2fd Mon Sep 17 00:00:00 2001 From: Cary R Date: Wed, 19 Nov 2008 16:04:39 -0800 Subject: [PATCH 18/26] Add converter info to VHDL output. This patch adds some converter information to the VHDL output. --- tgt-vhdl/vhdl.cc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tgt-vhdl/vhdl.cc b/tgt-vhdl/vhdl.cc index b2dc42248..f871bec7f 100644 --- a/tgt-vhdl/vhdl.cc +++ b/tgt-vhdl/vhdl.cc @@ -188,6 +188,9 @@ extern "C" int target_design(ivl_design_t des) if (0 == g_errors) { const char *ofname = ivl_design_flag(des, "-o"); ofstream outfile(ofname); + outfile << "-- This VHDL was converted from Verilog using the" << endl + << "-- Icarus Verilog VHDL Code Generator " VERSION + " (" VERSION_TAG ")" << endl << endl; // Make sure we only emit one example of each type of entity set seen_entities; From 4fa22238328247f3e8a040f048ac7251b349b259 Mon Sep 17 00:00:00 2001 From: Cary R Date: Wed, 19 Nov 2008 16:58:38 -0800 Subject: [PATCH 19/26] Fix NULL and STUB -V output. Fix the NULL and STUB target -V output to match the other targets. --- tgt-null/null.c | 12 +++++++----- tgt-stub/stub.c | 10 ++++++---- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/tgt-null/null.c b/tgt-null/null.c index 9bed4a68d..f1810f060 100644 --- a/tgt-null/null.c +++ b/tgt-null/null.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000 Stephen Williams (steve@icarus.com) + * Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com) * * This source code is free software; you can redistribute it * and/or modify it in source code form under the terms of the GNU @@ -17,6 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ +# include "version.h" # include "config.h" # include @@ -27,7 +28,8 @@ # include "ivl_target.h" static const char*version_string = -"Icarus Verilog NULL Code Generator " VERSION "\n" +"Icarus Verilog NULL Code Generator " VERSION " (" VERSION_TAG ")\n\n" +"Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com)\n\n" " This program is free software; you can redistribute it and/or modify\n" " it under the terms of the GNU General Public License as published by\n" " the Free Software Foundation; either version 2 of the License, or\n" @@ -38,9 +40,9 @@ static const char*version_string = " MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" " GNU General Public License for more details.\n" "\n" -" You should have received a copy of the GNU General Public License\n" -" along with this program; if not, write to the Free Software\n" -" Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n" +" You should have received a copy of the GNU General Public License along\n" +" with this program; if not, write to the Free Software Foundation, Inc.,\n" +" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n" ; diff --git a/tgt-stub/stub.c b/tgt-stub/stub.c index 5e352dca3..af99a8a05 100644 --- a/tgt-stub/stub.c +++ b/tgt-stub/stub.c @@ -24,6 +24,7 @@ * understand the behavior of the core as it uses a target module. */ +# include "version.h" # include "config.h" # include "priv.h" # include @@ -32,7 +33,8 @@ # include static const char*version_string = -"Icarus Verilog Stub Target " VERSION "\n" +"Icarus Verilog STUB Code Generator " VERSION " (" VERSION_TAG ")\n\n" +"Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com)\n\n" " This program is free software; you can redistribute it and/or modify\n" " it under the terms of the GNU General Public License as published by\n" " the Free Software Foundation; either version 2 of the License, or\n" @@ -43,9 +45,9 @@ static const char*version_string = " MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" " GNU General Public License for more details.\n" "\n" -" You should have received a copy of the GNU General Public License\n" -" along with this program; if not, write to the Free Software\n" -" Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n" +" You should have received a copy of the GNU General Public License along\n" +" with this program; if not, write to the Free Software Foundation, Inc.,\n" +" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n" ; FILE*out; From 27f4ba2e381bd9e4df825d2adcf66ca2b6313235 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Wed, 19 Nov 2008 21:07:34 -0800 Subject: [PATCH 20/26] Remove the unused CVS ident support in the configure scripts. --- Makefile.in | 2 +- aclocal.m4 | 25 ------------------------- cadpli/Makefile.in | 2 +- cadpli/configure.in | 2 -- configure.in | 2 -- driver-vpi/Makefile.in | 2 +- driver/Makefile.in | 2 +- ivlpp/Makefile.in | 2 +- libveriuser/Makefile.in | 2 +- libveriuser/configure.in | 1 - tgt-fpga/Makefile.in | 2 +- tgt-fpga/configure.in | 2 -- tgt-pal/Makefile.in | 2 +- tgt-stub/Makefile.in | 2 +- tgt-stub/configure.in | 2 -- tgt-vhdl/Makefile.in | 2 +- tgt-vhdl/configure.in | 2 -- tgt-vvp/Makefile.in | 2 +- tgt-vvp/configure.in | 2 -- vpi/Makefile.in | 2 +- vpi/configure.in | 2 -- vvp/Makefile.in | 2 +- vvp/configure.in | 2 -- 23 files changed, 13 insertions(+), 55 deletions(-) diff --git a/Makefile.in b/Makefile.in index 0e385ea58..8c2d66107 100644 --- a/Makefile.in +++ b/Makefile.in @@ -77,7 +77,7 @@ MAN = @MAN@ PS2PDF = @PS2PDF@ GIT = @GIT@ -CPPFLAGS = @ident_support@ @DEFS@ -I. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ +CPPFLAGS = @DEFS@ -I. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ CXXFLAGS = -Wall @CXXFLAGS@ PICFLAGS = @PICFLAG@ LDFLAGS = @rdynamic@ @LDFLAGS@ diff --git a/aclocal.m4 b/aclocal.m4 index 0c140fc0a..5398aacda 100644 --- a/aclocal.m4 +++ b/aclocal.m4 @@ -1,28 +1,3 @@ -# AX_CPP_IDENT -# ------------ -# Check if the C compiler supports #ident -# Define and substitute ident_support if so. -# -# It would be simpler and more consistent with the rest of the autoconf -# structure to AC_DEFINE(HAVE_CPP_IDENT) instead of -# ident_support='-DHAVE_CVS_IDENT=1' and AC_SUBST(ident_support), but that -# change would require all C files in the icarus top level directory to -# put #include before the #ifdef HAVE_CVS_IDENT (and change -# HAVE_CVS_IDENT to HAVE_CPP_IDENT). That would also remove all special -# ident_support handling from the Makefile. Manyana. -# -AC_DEFUN([AX_CPP_IDENT], -[AC_CACHE_CHECK([for ident support in C compiler], ax_cv_cpp_ident, -[AC_TRY_COMPILE([ -#ident "$Id: aclocal.m4,v 1.7 2007/05/16 23:59:12 steve Exp $" -],[while (0) {}], -[AS_VAR_SET(ax_cv_cpp_ident, yes)], -[AS_VAR_SET(ax_cv_cpp_ident, no)])]) -if test $ax_cv_cpp_ident = yes; then - ident_support='-DHAVE_CVS_IDENT=1' -fi -AC_SUBST(ident_support) -])# AC_CPP_IDENT # AX_ENABLE_SUFFIX # ---------------- diff --git a/cadpli/Makefile.in b/cadpli/Makefile.in index 669961ff6..86f1cb4f2 100644 --- a/cadpli/Makefile.in +++ b/cadpli/Makefile.in @@ -39,7 +39,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/cadpli/configure.in b/cadpli/configure.in index fa55d815a..12e1f2601 100644 --- a/cadpli/configure.in +++ b/cadpli/configure.in @@ -58,6 +58,4 @@ AX_C_UNDERSCORES_TRAILING ## end of test for underscores ####################### -AX_CPP_IDENT - AC_OUTPUT(Makefile) diff --git a/configure.in b/configure.in index ab66fb7a8..ff001db97 100644 --- a/configure.in +++ b/configure.in @@ -121,8 +121,6 @@ AX_C_UNDERSCORES_TRAILING ## end of test for underscores ####################### -AX_CPP_IDENT - # XXX disable tgt-fpga for the moment AC_CONFIG_SUBDIRS(vvp vpi tgt-stub tgt-null tgt-vvp tgt-vhdl libveriuser cadpli) diff --git a/driver-vpi/Makefile.in b/driver-vpi/Makefile.in index c484e4e32..46d937906 100644 --- a/driver-vpi/Makefile.in +++ b/driver-vpi/Makefile.in @@ -43,7 +43,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ +CPPFLAGS = -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/driver/Makefile.in b/driver/Makefile.in index f624bd427..8e9c6ee03 100644 --- a/driver/Makefile.in +++ b/driver/Makefile.in @@ -43,7 +43,7 @@ INSTALL_DATA = @INSTALL_DATA@ MAN = @MAN@ PS2PDF = @PS2PDF@ -CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ +CPPFLAGS = -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/ivlpp/Makefile.in b/ivlpp/Makefile.in index c4e0b1ccf..ef4fa0e7f 100644 --- a/ivlpp/Makefile.in +++ b/ivlpp/Makefile.in @@ -42,7 +42,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ +CPPFLAGS = -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/libveriuser/Makefile.in b/libveriuser/Makefile.in index 5c69e5485..7a4591c34 100644 --- a/libveriuser/Makefile.in +++ b/libveriuser/Makefile.in @@ -38,7 +38,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I. -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ RANLIB = @RANLIB@ diff --git a/libveriuser/configure.in b/libveriuser/configure.in index d3a37b8d9..9d2241442 100644 --- a/libveriuser/configure.in +++ b/libveriuser/configure.in @@ -8,7 +8,6 @@ AC_PROG_INSTALL AC_PROG_RANLIB AC_EXEEXT -AX_CPP_IDENT AX_ENABLE_SUFFIX diff --git a/tgt-fpga/Makefile.in b/tgt-fpga/Makefile.in index 0413f258b..ed9b0c96e 100644 --- a/tgt-fpga/Makefile.in +++ b/tgt-fpga/Makefile.in @@ -42,7 +42,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/tgt-fpga/configure.in b/tgt-fpga/configure.in index 5481e1d8f..4abaa5a87 100644 --- a/tgt-fpga/configure.in +++ b/tgt-fpga/configure.in @@ -25,6 +25,4 @@ AX_C_PICFLAG # linker options when building a shared library AX_LD_SHAREDLIB_OPTS -AX_CPP_IDENT - AC_OUTPUT(Makefile) diff --git a/tgt-pal/Makefile.in b/tgt-pal/Makefile.in index c38bb5ee7..3c89e6bc3 100644 --- a/tgt-pal/Makefile.in +++ b/tgt-pal/Makefile.in @@ -38,7 +38,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/tgt-stub/Makefile.in b/tgt-stub/Makefile.in index b77bd6ec9..ecf50b22f 100644 --- a/tgt-stub/Makefile.in +++ b/tgt-stub/Makefile.in @@ -37,7 +37,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I.. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I.. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/tgt-stub/configure.in b/tgt-stub/configure.in index 5f3b050bb..40f724eb9 100644 --- a/tgt-stub/configure.in +++ b/tgt-stub/configure.in @@ -23,6 +23,4 @@ AX_C_PICFLAG # linker options when building a shared library AX_LD_SHAREDLIB_OPTS -AX_CPP_IDENT - AC_OUTPUT(Makefile) diff --git a/tgt-vhdl/Makefile.in b/tgt-vhdl/Makefile.in index 20423541e..d7e32fc0e 100644 --- a/tgt-vhdl/Makefile.in +++ b/tgt-vhdl/Makefile.in @@ -38,7 +38,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ CXXFLAGS = -Wall @CXXFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/tgt-vhdl/configure.in b/tgt-vhdl/configure.in index 52ca76897..88219335a 100644 --- a/tgt-vhdl/configure.in +++ b/tgt-vhdl/configure.in @@ -27,6 +27,4 @@ AX_C_PICFLAG # linker options when building a shared library AX_LD_SHAREDLIB_OPTS -AX_CPP_IDENT - AC_OUTPUT(Makefile) diff --git a/tgt-vvp/Makefile.in b/tgt-vvp/Makefile.in index 4c1076523..476b4458d 100644 --- a/tgt-vvp/Makefile.in +++ b/tgt-vvp/Makefile.in @@ -40,7 +40,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/tgt-vvp/configure.in b/tgt-vvp/configure.in index 9a245752a..91d0fd5d6 100644 --- a/tgt-vvp/configure.in +++ b/tgt-vvp/configure.in @@ -36,6 +36,4 @@ AX_C_PICFLAG # linker options when building a shared library AX_LD_SHAREDLIB_OPTS -AX_CPP_IDENT - AC_OUTPUT(Makefile) diff --git a/vpi/Makefile.in b/vpi/Makefile.in index 77c5b492b..6d45a5043 100644 --- a/vpi/Makefile.in +++ b/vpi/Makefile.in @@ -41,7 +41,7 @@ INSTALL_DATA = @INSTALL_DATA@ LEX = @LEX@ YACC = @YACC@ -CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -I$(srcdir) -I.. @file64_support@ @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I. -I$(srcdir)/.. -I$(srcdir) -I.. @file64_support@ @CPPFLAGS@ @DEFS@ @PICFLAG@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ diff --git a/vpi/configure.in b/vpi/configure.in index bf3d8f775..9b671d539 100644 --- a/vpi/configure.in +++ b/vpi/configure.in @@ -84,6 +84,4 @@ AX_LD_RDYNAMIC # linker options when building a shared library AX_LD_SHAREDLIB_OPTS -AX_CPP_IDENT - AC_OUTPUT(Makefile) diff --git a/vvp/Makefile.in b/vvp/Makefile.in index ad4f066ce..791d64484 100644 --- a/vvp/Makefile.in +++ b/vvp/Makefile.in @@ -50,7 +50,7 @@ YACC = @YACC@ MAN = @MAN@ PS2PDF = @PS2PDF@ -CPPFLAGS = @ident_support@ -I. -I.. -I $(srcdir) -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ +CPPFLAGS = -I. -I.. -I $(srcdir) -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ CXXFLAGS = -Wall @CXXFLAGS@ LDFLAGS = @rdynamic@ @LDFLAGS@ LIBS = @LIBS@ @EXTRALIBS@ diff --git a/vvp/configure.in b/vvp/configure.in index 3ffa8bc4c..7496dfb92 100644 --- a/vvp/configure.in +++ b/vvp/configure.in @@ -106,8 +106,6 @@ AX_LD_RDYNAMIC AX_LD_EXTRALIBS -AX_CPP_IDENT - # If not otherwise specified, set the libdir64 variable # to the same as libdir. AC_MSG_CHECKING(for libdir64 path) From 6f1887bf1c935b025263c53b1ca63796fded409d Mon Sep 17 00:00:00 2001 From: Cary R Date: Thu, 20 Nov 2008 09:17:57 -0800 Subject: [PATCH 21/26] Remover @ident_support@ fro tgt-null/Makefile.in This was missed in the previous patch. --- tgt-null/Makefile.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tgt-null/Makefile.in b/tgt-null/Makefile.in index 5cb577068..7b0cf6b75 100644 --- a/tgt-null/Makefile.in +++ b/tgt-null/Makefile.in @@ -36,7 +36,7 @@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ -CPPFLAGS = @ident_support@ -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ +CPPFLAGS = -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@ @PICFLAG@ CFLAGS = -Wall @CFLAGS@ LDFLAGS = @LDFLAGS@ From 45f2d68d3399a6f363a9444a6411b50b20d53cd0 Mon Sep 17 00:00:00 2001 From: Cary R Date: Thu, 20 Nov 2008 11:29:53 -0800 Subject: [PATCH 22/26] Add verilog to MinGW iverilog-vpi tool When changing where the include files were located the MinGW iverilog-vpi tool was missed. --- driver-vpi/main.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/driver-vpi/main.c b/driver-vpi/main.c index a08260dfb..c4b503d4e 100644 --- a/driver-vpi/main.c +++ b/driver-vpi/main.c @@ -511,20 +511,16 @@ static void setup_ivl_environment() } /* Build up the CFLAGS option string */ - assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS); - append(&gstr.pCFLAGS," -I"); + assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS " -I"); append(&gstr.pCFLAGS,gstr.pIVL); appendBackSlash(&gstr.pCFLAGS); - append(&gstr.pCFLAGS, "\\"); - append(&gstr.pCFLAGS,"include" IVERILOG_SUFFIX); + append(&gstr.pCFLAGS,"\\include\\\\verilog" IVERILOG_SUFFIX); /* Build up the LDFLAGS option string */ assign(&gstr.pLDLIBS,"-L"); append(&gstr.pLDLIBS,gstr.pIVL); appendBackSlash(&gstr.pLDLIBS); - append(&gstr.pLDLIBS, "\\"); - append(&gstr.pLDLIBS,"lib "); - append(&gstr.pLDLIBS,IVERILOG_VPI_LDLIBS); + append(&gstr.pLDLIBS,"\\lib " IVERILOG_VPI_LDLIBS); } /* compile source modules */ From f502d4c8ad41ed32cc59a6a4b962db451cc8b135 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Thu, 20 Nov 2008 21:01:33 -0800 Subject: [PATCH 23/26] Specify support off by default. The specify support has some interesting bugs, and anyhow is rarely used. Leave it OFF by default. --- driver/iverilog.man | 2 +- driver/main.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/iverilog.man b/driver/iverilog.man index 9db60b4d8..57d9e5ab1 100644 --- a/driver/iverilog.man +++ b/driver/iverilog.man @@ -68,7 +68,7 @@ other tools. Enable or disable (default) support for Verilog-AMS. .TP 8 .B -gspecify\fI|\fP-gno-specify -Enable (default) or disable specify block support. When enabled, +Enable or disable (default) specify block support. When enabled, specify block code is elaborated. When disabled, specify blocks are parsed but ignored. Specify blocks are commonly not needed for RTL simulation, and in fact can hurt performance of the diff --git a/driver/main.c b/driver/main.c index e11045794..3b049f278 100644 --- a/driver/main.c +++ b/driver/main.c @@ -108,7 +108,7 @@ const char*targ = "vvp"; const char*depfile = 0; const char*generation = "2005"; -const char*gen_specify = "specify"; +const char*gen_specify = "no-specify"; const char*gen_xtypes = "xtypes"; const char*gen_icarus = "icarus-misc"; const char*gen_io_range_error = "io-range-error"; From bc8b97dbcd10386a5cb897bcd1558cd5128ca605 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Fri, 21 Nov 2008 21:12:40 -0800 Subject: [PATCH 24/26] Pad expression in place When padding expressions, pre-allocate the target space and calculate the sub-expression directly into the target. Then pad from there. This saves a move into the result space. --- tgt-vvp/eval_expr.c | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/tgt-vvp/eval_expr.c b/tgt-vvp/eval_expr.c index 4b0923d13..70a36a625 100644 --- a/tgt-vvp/eval_expr.c +++ b/tgt-vvp/eval_expr.c @@ -1599,7 +1599,7 @@ static struct vector_info draw_concat_expr(ivl_expr_t exp, unsigned wid, if (avec.base != 0) { assert(awid == avec.wid); - fprintf(vvp_out, " %%mov %u, %u, %u;\n", + fprintf(vvp_out, " %%mov %u, %u, %u; Reuse calculated expression\n", res.base+off, avec.base, trans); clr_vector(avec); @@ -1790,17 +1790,27 @@ static struct vector_info draw_pad_expr(ivl_expr_t exp, unsigned wid) struct vector_info subv; struct vector_info res; - subv = draw_eval_expr(ivl_expr_oper1(exp), 0); - if (wid <= subv.wid) { - if (subv.base >= 8) - save_expression_lookaside(subv.base, exp, subv.wid); + ivl_expr_t subexpr = ivl_expr_oper1(exp); + + /* If the sub-expression is at least as wide as the target + width, then instead of pad, we truncate. Evaluate the + expression and return that expression with the width + reduced to what we want. */ + if (wid <= ivl_expr_width(subexpr)) { + subv = draw_eval_expr(subexpr, 0); + assert(subv.wid >= wid); res.base = subv.base; res.wid = wid; + if (subv.base >= 8) + save_expression_lookaside(subv.base, exp, subv.wid); return res; } + /* So now we know that the subexpression is smaller then the + desired result (the usual case) so we build the + result. Evaluate the subexpression into the target buffer, + then pad it as appropriate. */ res.base = allocate_vector(wid); - res.wid = wid; if (res.base == 0) { fprintf(stderr, "%s:%u: vvp.tgt error: " "Unable to allocate %u thread bits " @@ -1809,10 +1819,11 @@ static struct vector_info draw_pad_expr(ivl_expr_t exp, unsigned wid) vvp_errors += 1; } - fprintf(vvp_out, " %%mov %u, %u, %u;\n", - res.base, subv.base, subv.wid); + res.wid = wid; - assert(wid > subv.wid); + subv.base = res.base; + subv.wid = ivl_expr_width(subexpr); + draw_eval_expr_dest(subexpr, subv, 0); if (ivl_expr_signed(exp)) { unsigned idx; @@ -1823,9 +1834,7 @@ static struct vector_info draw_pad_expr(ivl_expr_t exp, unsigned wid) fprintf(vvp_out, " %%mov %u, 0, %u;\n", res.base+subv.wid, res.wid - subv.wid); } - if (subv.base >= 8) - clr_vector(subv); - + save_expression_lookaside(res.base, exp, wid); return res; } From 83a7497912953a34f3f245415fb9d4b0e97f2649 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Sat, 22 Nov 2008 10:45:15 -0800 Subject: [PATCH 25/26] Lor takes advantave of STUFF_OK_47 It is ot uncommon for the arguments to logical or to leave stuff in bit registers 4-7. Allow the lor itself to take advantage of that to save some %mov instructions. --- tgt-vvp/eval_expr.c | 39 +++++++++++++++++++++++++++++++-------- 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/tgt-vvp/eval_expr.c b/tgt-vvp/eval_expr.c index 70a36a625..748ccffa5 100644 --- a/tgt-vvp/eval_expr.c +++ b/tgt-vvp/eval_expr.c @@ -475,7 +475,7 @@ static struct vector_info draw_binary_expr_eq(ivl_expr_t exp, assert(0); } - if ((stuff_ok_flag&STUFF_OK_47) && (wid == 1)) { + if ((stuff_ok_flag&STUFF_OK_47) && (ewid == 1)) { return lv; } @@ -584,7 +584,8 @@ static struct vector_info draw_binary_expr_land(ivl_expr_t exp, unsigned wid) return lv; } -static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid) +static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid, + int stuff_ok_flag) { ivl_expr_t le = ivl_expr_oper1(exp); ivl_expr_t re = ivl_expr_oper2(exp); @@ -607,7 +608,9 @@ static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid) lv = tmp; } - rv = draw_eval_expr(re, STUFF_OK_XZ); + /* The right expression may be left in registers 4-7 because + I'll be using it immediately. */ + rv = draw_eval_expr(re, STUFF_OK_XZ|STUFF_OK_47); /* if the right operand has width, then evaluate the single-bit logical equivalent. */ @@ -637,20 +640,40 @@ static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid) lv.base = 2; } + } else if (lv.base==0) { + lv = rv; } else { fprintf(vvp_out, " %%or %u, %u, 1;\n", rv.base, lv.base); lv = rv; } + } else if (rv.base == 0) { + ; /* Just return lv. */ } else { + if (rv.base >= 8 && lv.base < 8 && !(stuff_ok_flag&STUFF_OK_47)) { + /* If STUFF_OK_47 is false, and rv is not in the + 47 area (and lv is) then plan to or the result + into the rv instead. This can case a %mov later. */ + struct vector_info tmp = lv; + lv = rv; + rv = tmp; + } fprintf(vvp_out, " %%or %u, %u, 1;\n", lv.base, rv.base); - clr_vector(rv); + if (rv.base >= 8) clr_vector(rv); } + if (wid==1 && (lv.base<4 || lv.base>=8 || (stuff_ok_flag&STUFF_OK_47))) + return lv; /* If we only want the single bit result, then we are done. */ - if (wid == 1) + if (wid == 1) { + if (lv.base >= 4 && lv.base < 8) { + unsigned tmp = allocate_vector(1); + fprintf(vvp_out, " %%mov %u, %u, 1;\n", tmp, lv.base); + lv.base = tmp; + } return lv; + } /* Write the result into a zero-padded result. */ { unsigned base = allocate_vector(wid); @@ -663,7 +686,7 @@ static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid) } fprintf(vvp_out, " %%mov %u, %u, 1;\n", base, lv.base); - clr_vector(lv); + if (lv.base >= 8) clr_vector(lv); lv.base = base; lv.wid = wid; fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, wid-1); @@ -1503,7 +1526,8 @@ static struct vector_info draw_binary_expr(ivl_expr_t exp, break; case 'o': /* || (logical or) */ - rv = draw_binary_expr_lor(exp, wid); + rv = draw_binary_expr_lor(exp, wid, stuff_ok_flag); + stuff_ok_used_flag = 1; break; case '&': @@ -1563,7 +1587,6 @@ static struct vector_info draw_concat_expr(ivl_expr_t exp, unsigned wid, vvp_errors += 1; } - /* Get the repeat count. This must be a constant that has been evaluated at compile time. The operands will be repeated to form the result. */ From 4de891d096f2448a346146ab46a39c65aa097092 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Sat, 22 Nov 2008 21:17:05 -0800 Subject: [PATCH 26/26] Support drawing some select expressions in place. Select of signals is natural for evaluating in place, if possible. Doing so can save instructions for certain expressions. --- tgt-vvp/eval_expr.c | 116 ++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 106 insertions(+), 10 deletions(-) diff --git a/tgt-vvp/eval_expr.c b/tgt-vvp/eval_expr.c index 748ccffa5..72f48ae62 100644 --- a/tgt-vvp/eval_expr.c +++ b/tgt-vvp/eval_expr.c @@ -1803,6 +1803,25 @@ static struct vector_info draw_number_expr(ivl_expr_t exp, unsigned wid) return res; } +/* + * This little helper function generates the instructions to pad a + * vector in place. It is assumed that the calling functio has set up + * the first sub_sidth bits of the dest vector, and the signed_flag is + * true if the extension is to be signed. + */ +static void pad_in_place(struct vector_info dest, unsigned sub_width, int signed_flag) +{ + if (signed_flag) { + unsigned idx; + for (idx = sub_width ; idx < dest.wid ; idx += 1) + fprintf(vvp_out, " %%mov %u, %u, 1;\n", + dest.base+idx, dest.base+sub_width-1); + } else { + fprintf(vvp_out, " %%mov %u, 0, %u;\n", + dest.base+sub_width, dest.wid - sub_width); + } +} + /* * The PAD expression takes a smaller node and pads it out to a larger * value. It will zero extend or sign extend depending on the @@ -1848,16 +1867,8 @@ static struct vector_info draw_pad_expr(ivl_expr_t exp, unsigned wid) subv.wid = ivl_expr_width(subexpr); draw_eval_expr_dest(subexpr, subv, 0); - if (ivl_expr_signed(exp)) { - unsigned idx; - for (idx = subv.wid ; idx < res.wid ; idx += 1) - fprintf(vvp_out, " %%mov %u, %u, 1;\n", - res.base+idx, subv.base+subv.wid-1); - } else { - fprintf(vvp_out, " %%mov %u, 0, %u;\n", - res.base+subv.wid, res.wid - subv.wid); - } - + pad_in_place(res, subv.wid, ivl_expr_signed(exp)); + save_expression_lookaside(res.base, exp, wid); return res; } @@ -2261,6 +2272,43 @@ static struct vector_info draw_select_signal(ivl_expr_t sube, return res; } +static void draw_select_signal_dest(ivl_expr_t sube, + ivl_expr_t bit_idx, + struct vector_info dest, + int stuff_ok_flag) +{ + struct vector_info tmp; + ivl_signal_t sig = ivl_expr_signal(sube); + + /* Special case: If the operand is a signal (not an array) and + the part select is coming from the LSB, and the part select + is no larger then the signal itself, then we can load the + value in place, directly. */ + if ((ivl_signal_dimensions(sig) == 0) + && (ivl_expr_width(sube) >= dest.wid) + && number_is_immediate(bit_idx, 32, 0) + && get_number_immediate(bit_idx) == 0) { + unsigned use_word = 0; + fprintf(vvp_out, " %%load/v %u, v%p_%u, %u; Select %u out of %u bits\n", + dest.base, sig, use_word, dest.wid, + dest.wid, ivl_expr_width(sube)); + return; + } + + /* Fallback, just draw the expression and copy the result into + the destination. */ + tmp = draw_select_signal(sube, bit_idx, dest.wid, dest.wid); + assert(tmp.wid == dest.wid); + + fprintf(vvp_out, " %%mov %u, %u, %u; Move signal select into place\n", + dest.base, tmp.base, dest.wid); + + if (tmp.base >= 8) { + save_expression_lookaside(tmp.base, sube, tmp.wid); + clr_vector(tmp); + } +} + static struct vector_info draw_select_expr(ivl_expr_t exp, unsigned wid, int stuff_ok_flag) { @@ -2350,6 +2398,50 @@ static struct vector_info draw_select_expr(ivl_expr_t exp, unsigned wid, return res; } +static void draw_select_expr_dest(ivl_expr_t exp, struct vector_info dest, + int stuff_ok_flag) +{ + struct vector_info tmp; + + ivl_expr_t sube = ivl_expr_oper1(exp); + ivl_expr_t shift= ivl_expr_oper2(exp); + + /* If the shift expression is not present, then this is really + a pad expression, and that can be handled pretty + easily. Evalutate the subexpression into the destination, + then pad in place. */ + if (shift == 0) { + struct vector_info subv; + subv.base = dest.base; + subv.wid = ivl_expr_width(sube); + if (subv.wid > dest.wid) + subv.wid = dest.wid; + + draw_eval_expr_dest(sube, subv, stuff_ok_flag); + + pad_in_place(dest, subv.wid, ivl_expr_signed(exp)); + return; + } + + if (ivl_expr_type(sube) == IVL_EX_SIGNAL) { + draw_select_signal_dest(sube, shift, dest, stuff_ok_flag); + return; + } + + /* Fallback, is to draw the expression by width, and mov it to + the required dest. */ + tmp = draw_select_expr(exp, dest.wid, stuff_ok_flag); + assert(tmp.wid == dest.wid); + + fprintf(vvp_out, " %%mov %u, %u, %u; Move select into place\n", + dest.base, tmp.base, dest.wid); + + if (tmp.base >= 8) { + save_expression_lookaside(tmp.base, exp, tmp.wid); + clr_vector(tmp); + } +} + static struct vector_info draw_ternary_expr(ivl_expr_t exp, unsigned wid) { struct vector_info res, tru, fal, tst; @@ -2690,6 +2782,10 @@ static void draw_eval_expr_dest(ivl_expr_t exp, struct vector_info dest, draw_signal_dest(exp, dest, -1, 0L); return; + case IVL_EX_SELECT: + draw_select_expr_dest(exp, dest, stuff_ok_flag); + return; + default: break; }