From 5a6d07ff9f513fe5bab6806350c113587153dec3 Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Mon, 3 Jan 2011 09:38:08 +0200 Subject: [PATCH] Emit Verilog stubs for entities The verilog includes the module declaration with correct ports in the correct order. Get the port directions correct. --- vhdlpp/Makefile.in | 3 +- vhdlpp/compiler.h | 3 ++ vhdlpp/entity.h | 9 +++++ vhdlpp/entity_elaborate.cc | 80 ++++++++++++++++++++++++++++++++++++++ vhdlpp/main.cc | 7 ++++ 5 files changed, 101 insertions(+), 1 deletion(-) create mode 100644 vhdlpp/entity_elaborate.cc diff --git a/vhdlpp/Makefile.in b/vhdlpp/Makefile.in index a49627be7..d10b5f9d4 100644 --- a/vhdlpp/Makefile.in +++ b/vhdlpp/Makefile.in @@ -51,7 +51,8 @@ CXXFLAGS = @WARNING_FLAGS@ @WARNING_FLAGS_CXX@ @CXXFLAGS@ LDFLAGS = @LDFLAGS@ LIBS = @LIBS@ @EXTRALIBS@ -O = main.o compiler.o entity.o lexor.o lexor_keyword.o parse.o StringHeap.o +O = main.o compiler.o entity.o entity_elaborate.o \ + lexor.o lexor_keyword.o parse.o StringHeap.o all: dep vhdlpp@EXEEXT@ diff --git a/vhdlpp/compiler.h b/vhdlpp/compiler.h index cdef624a2..a1dfe368f 100644 --- a/vhdlpp/compiler.h +++ b/vhdlpp/compiler.h @@ -23,6 +23,9 @@ const int GN_KEYWORD_2008 = 0x0001; +// TRUE if processing is supposed to dump progress to stderr. +extern bool verbose_flag; + extern StringHeapLex lex_strings; #endif diff --git a/vhdlpp/entity.h b/vhdlpp/entity.h index 850b66d55..46e78e33c 100644 --- a/vhdlpp/entity.h +++ b/vhdlpp/entity.h @@ -33,6 +33,9 @@ class InterfacePort { class Entity { + public: + int elaborate(); + public: perm_string name; std::vector ports; @@ -45,6 +48,12 @@ class Entity { */ extern std::map design_entities; +/* + * Elaborate the collected entities, and return the number of + * elaboration errors. + */ +extern int elaborate_entities(void); + /* * Use this function to dump a description of the design entities to a * file. This is for debug, not for any useful purpose. diff --git a/vhdlpp/entity_elaborate.cc b/vhdlpp/entity_elaborate.cc new file mode 100644 index 000000000..8f4fa7d76 --- /dev/null +++ b/vhdlpp/entity_elaborate.cc @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2011 Stephen Williams (steve@icarus.com) + * + * This source code is free software; you can redistribute it + * and/or modify it in source code form under the terms of the GNU + * General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +# include "entity.h" +# include "compiler.h" +# include +# include +# include + +using namespace std; + +int elaborate_entities(void) +{ + int errors = 0; + + for (map::iterator cur = design_entities.begin() + ; cur != design_entities.end() ; ++cur) { + errors += cur->second->elaborate(); + } + + return errors; +} + +int Entity::elaborate() +{ + int errors = 0; + + if (verbose_flag) + cerr << "Elaborate entity " << name << "..." << endl; + + cout << "module " << name; + + // If there are ports, emit them. + if (ports.size() > 0) { + cout << "("; + const char*sep = 0; + for (vector::iterator cur = ports.begin() + ; cur != ports.end() ; ++cur) { + InterfacePort*port = *cur; + + if (sep) cout << sep; + else sep = ", "; + + switch (port->mode) { + case PORT_NONE: // Should not happen + cout << "NO_PORT " << port->name; + break; + case PORT_IN: + cout << "input " << port->name; + break; + case PORT_OUT: + cout << "output " << port->name; + break; + } + } + cout << ")"; + } + + cout << ";" << endl; + + cout << "endmodule" << endl; + + return errors; +} diff --git a/vhdlpp/main.cc b/vhdlpp/main.cc index d4de92378..598187952 100644 --- a/vhdlpp/main.cc +++ b/vhdlpp/main.cc @@ -115,6 +115,13 @@ int main(int argc, char*argv[]) if (dump_design_entities_path) dump_design_entities(dump_design_entities_path); + int elaborate_errors = 0; + elaborate_errors = elaborate_entities(); + if (elaborate_errors > 0) { + fprintf(stderr, "%d errors elaborating design.\n", elaborate_errors); + return 3; + } + lex_strings.cleanup(); return 0; }