diff --git a/compiler.h b/compiler.h index f7eb5f65f..d9b2a439d 100644 --- a/compiler.h +++ b/compiler.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: compiler.h,v 1.9 2002/04/22 00:53:39 steve Exp $" +#ident "$Id: compiler.h,v 1.10 2002/05/24 01:13:00 steve Exp $" #endif # include @@ -79,8 +79,22 @@ extern bool verbose_flag; extern listlibrary_dirs; extern listlibrary_suff; +/* This is the generation of Verilog that the compiler is asked to + support. */ +enum generation_t { + GN_VER1995 = 1, + GN_VER2001 = 2, + GN_SYSVER30 = 3, + GN_DEFAULT = 3 +}; + +extern generation_t generation_flag; + /* * $Log: compiler.h,v $ + * Revision 1.10 2002/05/24 01:13:00 steve + * Support language generation flag -g. + * * Revision 1.9 2002/04/22 00:53:39 steve * Do not allow implicit wires in sensitivity lists. * diff --git a/driver/Makefile.in b/driver/Makefile.in index d8210a61e..b40e596c1 100644 --- a/driver/Makefile.in +++ b/driver/Makefile.in @@ -18,7 +18,7 @@ # 59 Temple Place - Suite 330 # Boston, MA 02111-1307, USA # -#ident "$Id: Makefile.in,v 1.11 2002/02/03 07:05:36 steve Exp $" +#ident "$Id: Makefile.in,v 1.12 2002/05/24 01:13:00 steve Exp $" # # SHELL = /bin/sh @@ -83,8 +83,11 @@ parse.o: parse.c globals.h cflexor.o: cflexor.c cfparse.h cfparse_misc.h globals.h cfparse.o: cfparse.c globals.h cfparse_misc.h -iverilog.pdf: $(srcdir)/iverilog.man - man -t $(srcdir)/iverilog.man | ps2pdf - iverilog.pdf +iverilog.ps: $(srcdir)/iverilog.man + man -t $(srcdir)/iverilog.man > iverilog.ps + +iverilog.pdf: iverilog.ps + ps2pdf iverilog.ps iverilog.pdf ifeq (@WIN32@,yes) INSTALL_DOC = $(prefix)/iverilog.pdf diff --git a/driver/build_string.c b/driver/build_string.c index 4a877524c..654a57f15 100644 --- a/driver/build_string.c +++ b/driver/build_string.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: build_string.c,v 1.7 2002/04/04 05:26:13 steve Exp $" +#ident "$Id: build_string.c,v 1.8 2002/05/24 01:13:00 steve Exp $" #endif # include "config.h" @@ -72,6 +72,12 @@ int build_string(char*output, size_t olen, const char*pattern) olen -= strlen(base); break; + case 'g': + strcpy(output, generation); + output += strlen(generation); + olen -= strlen(generation); + break; + case 'f': if (f_list) { strcpy(output, f_list); @@ -169,6 +175,9 @@ int build_string(char*output, size_t olen, const char*pattern) /* * $Log: build_string.c,v $ + * Revision 1.8 2002/05/24 01:13:00 steve + * Support language generation flag -g. + * * Revision 1.7 2002/04/04 05:26:13 steve * Add dependency generation. * diff --git a/driver/globals.h b/driver/globals.h index 83f75090b..24a3a0dac 100644 --- a/driver/globals.h +++ b/driver/globals.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: globals.h,v 1.11 2002/04/04 05:26:13 steve Exp $" +#ident "$Id: globals.h,v 1.12 2002/05/24 01:13:00 steve Exp $" #endif # include @@ -54,6 +54,9 @@ extern int synth_flag; /* This is the name of the selected target. */ extern const char*targ; + /* This is the language generation flag. */ +extern const char*generation; + /* Add the name to the list of source files. */ extern void process_file_name(const char*name); @@ -82,6 +85,9 @@ extern int build_string(char*out, size_t olen, const char*pattern); /* * $Log: globals.h,v $ + * Revision 1.12 2002/05/24 01:13:00 steve + * Support language generation flag -g. + * * Revision 1.11 2002/04/04 05:26:13 steve * Add dependency generation. * diff --git a/driver/iverilog.man b/driver/iverilog.man index 5149c654b..7d9c27ced 100644 --- a/driver/iverilog.man +++ b/driver/iverilog.man @@ -1,10 +1,10 @@ -.TH iverilog 1 "$Date: 2002/04/24 02:02:31 $" Version "$Date: 2002/04/24 02:02:31 $" +.TH iverilog 1 "$Date: 2002/05/24 01:13:00 $" Version "$Date: 2002/05/24 01:13:00 $" .SH NAME iverilog - Icarus Verilog compiler .SH SYNOPSIS .B iverilog -[-ESVv] [-Cpath] [-ccmdfile] [-Dmacro[=defn]] [-pflag=value] +[-ESVv] [-Cpath] [-ccmdfile] [-g1|-g2|-g3.0] [-Dmacro[=defn]] [-pflag=value] [-Iincludedir] [-mmodule] [-Mfile] [-Nfile] [-ooutputfilename] [-stopmodule] [-ttype] [-Tmin/typ/max] [-Wclass] [-ypath] sourcefile @@ -55,6 +55,15 @@ is the Verilog input, but with file inclusions and macro references expanded and removed. This is useful, for example, to preprocess Verilog source for use by other compilers. .TP 8 +.B -g1\fI|\fP-g2\fI|\fP-g3.0 +Select the Verilog language \fIgeneration\fP to support in the +compiler. This selects between \fIIEEE1364-1995\fP(1), +\fIIEEE1364-2001\fP(2), or \fISystemVerilog 3.0\fP(3.0). Normally, +Icarus Verilog defaults to the latest known generation of the +language. This flag is most useful to restrict the language to a set +supported by tools of specific generations, for compatibility with +other tools. +.TP 8 .B -I\fIincludedir\fP Append directory \fIincludedir\fP to list of directories searched for Verilog include files. The \fB-I\fP switch may be used many times diff --git a/driver/main.c b/driver/main.c index 2e390a923..8aa7bc27a 100644 --- a/driver/main.c +++ b/driver/main.c @@ -16,13 +16,13 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ -#ident "$Id: main.c,v 1.36 2002/04/24 02:02:31 steve Exp $" +#ident "$Id: main.c,v 1.37 2002/05/24 01:13:00 steve Exp $" # include "config.h" const char HELP[] = -"Usage: iverilog [-ESvV] [-B base] [-C path] [-c cmdfile]\n" +"Usage: iverilog [-ESvV] [-B base] [-C path] [-c cmdfile] [-g1|-g2|-g3.0]\n" " [-D macro[=defn]] [-I includedir] [-M depfile] [-m module]\n" " [-N file] [-o filename] [-p flag=value]\n" " [-s topmodule] [-t target] [-T min|typ|max]\n" @@ -89,6 +89,8 @@ const char*npath = 0; const char*targ = "vvp"; const char*depfile = 0; +const char*generation = "-g3.0"; + char warning_flags[16] = ""; char *library_flags = 0; char *library_flags2 = 0; @@ -358,6 +360,30 @@ void process_file_name(const char*name) source_count += 1; } +int process_generation(const char*name) +{ + if (strcmp(name,"1") == 0) + generation = "-g1"; + + else if (strcmp(name,"2") == 0) + generation = "-g2"; + + else if (strcmp(name,"3.0") == 0) + generation = "-g3.0"; + + else { + fprintf(stderr, "Unknown/Unsupported Language generation " + "%s\n", name); + fprintf(stderr, "Supported generations are:\n"); + fprintf(stderr, " 1 -- IEEE1364-1995 (Verilog 1)\n" + " 2 -- IEEE1364-2001 (Verilog 2001)\n" + " 3.0 -- SystemVerilog 3.0\n"); + return 1; + } + + return 0; +} + int main(int argc, char **argv) { const char*config_path = 0; @@ -365,7 +391,7 @@ int main(int argc, char **argv) unsigned ncmd; int e_flag = 0; int version_flag = 0; - int opt, idx; + int opt, idx, rc; char*cp; #ifdef __MINGW32__ @@ -415,7 +441,7 @@ int main(int argc, char **argv) return 1; } - while ((opt = getopt(argc, argv, "B:C:c:D:Ef:hI:M:m:N::o:p:Ss:T:t:vVW:y:Y:")) != EOF) { + while ((opt = getopt(argc, argv, "B:C:c:D:Ef:g:hI:M:m:N::o:p:Ss:T:t:vVW:y:Y:")) != EOF) { switch (opt) { case 'B': @@ -450,6 +476,11 @@ int main(int argc, char **argv) } break; + case 'g': + rc = process_generation(optarg); + if (rc != 0) + return -1; + break; case 'h': fprintf(stderr, "%s\n", HELP); return 1; @@ -669,6 +700,9 @@ int main(int argc, char **argv) /* * $Log: main.c,v $ + * Revision 1.37 2002/05/24 01:13:00 steve + * Support language generation flag -g. + * * Revision 1.36 2002/04/24 02:02:31 steve * add -Wno- arguments to the driver. * diff --git a/iverilog.conf b/iverilog.conf index 8493af62b..a0e5b6259 100644 --- a/iverilog.conf +++ b/iverilog.conf @@ -30,6 +30,8 @@ # # %f Substitute the -f flags from the command line. # +# %g Substitule the -g flag +# # %s Substitute the start module (-s flag) from the user. # # %M Substitute the value of the -M flag. @@ -61,20 +63,20 @@ # be useful and interesting if the -N flag is included. [-tnull -S] -%B/ivl %[v-v] %y %Y %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/null.tgt -Fsynth -Fsyn-rules -- - +%B/ivl %[v-v] %g %y %Y %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/null.tgt -Fsynth -Fsyn-rules -- - [-tnull] -%B/ivl %[v-v] %y %Y %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/null.tgt -- - +%B/ivl %[v-v] %g %y %Y %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/null.tgt -- - # -- # The vvp target generates code that the vvp simulation engine can execute. # These rules support synthesized and non-synthesized variants. [-tvvp -S] -%B/ivl %[v-v] %y %Y %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -fVVP_EXECUTABLE=%B/../../bin/vvp -Fsynth -Fsyn-rules -Fcprop -Fnodangle %f %m -o%o -- - +%B/ivl %[v-v] %g %y %Y %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -fVVP_EXECUTABLE=%B/../../bin/vvp -Fsynth -Fsyn-rules -Fcprop -Fnodangle %f %m -o%o -- - [-tvvp] -%B/ivl %[v-v] %y %Y %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -fVVP_EXECUTABLE=%B/../../bin/vvp -Fcprop -Fnodangle %f %m -o%o -- - +%B/ivl %[v-v] %g %y %Y %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -fVVP_EXECUTABLE=%B/../../bin/vvp -Fcprop -Fnodangle %f %m -o%o -- - # -- # The vvm target uses the string to take the preprocessed code from @@ -83,20 +85,20 @@ # on the result. [-tvvm] -%B/ivl %[v-v] %y %Y %W %s %[N-N%N] %[T-T%T] -tvvm -Fcprop -Fnodangle -fVPI_MODULE_PATH=%B %f %m -o%o.cc -- - +%B/ivl %[v-v] %g %y %Y %W %s %[N-N%N] %[T-T%T] -tvvm -Fcprop -Fnodangle -fVPI_MODULE_PATH=%B %f %m -o%o.cc -- - # This is the XNF code generator. [-txnf] -%B/ivl %y %Y %[v-v] %s %[M-M%M] %[N-N%N] %[T-T%T] -txnf -Fsynth -Fsyn-rules -Fxnfio -Fcprop -Fnodangle -o%o -- - +%B/ivl %y %Y %[v-v] %g %s %[M-M%M] %[N-N%N] %[T-T%T] -txnf -Fsynth -Fsyn-rules -Fxnfio -Fcprop -Fnodangle -o%o -- - # And this is another XNF code generator, under development. [-tfpga] -%B/ivl %y %Y %[v-v] %s %[M-M%M] %[N-N%N] %[T-T%T] %f -tdll -fDLL=%B/fpga.tgt -Fsynth -Fsyn-rules -Fcprop -Fnodangle -o%o -- - +%B/ivl %y %Y %[v-v] %g %s %[M-M%M] %[N-N%N] %[T-T%T] %f -tdll -fDLL=%B/fpga.tgt -Fsynth -Fsyn-rules -Fcprop -Fnodangle -o%o -- - # -- # This is the pal code generator. The target module requires the -fpart= # flag to specify the part type. [-tpal] -%B/ivl %y %Y %[v-v] %s %[M-M%M] %[N-N%N] %[T-T%T] %f -tdll -fDLL=%B/pal.tgt -Fsynth -Fsyn-rules -Fcprop -Fnodangle -o%o -- - +%B/ivl %y %Y %[v-v] %g %s %[M-M%M] %[N-N%N] %[T-T%T] %f -tdll -fDLL=%B/pal.tgt -Fsynth -Fsyn-rules -Fcprop -Fnodangle -o%o -- - diff --git a/main.cc b/main.cc index ecf871071..10c4bc9f9 100644 --- a/main.cc +++ b/main.cc @@ -19,7 +19,7 @@ const char COPYRIGHT[] = * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: main.cc,v 1.54 2002/04/22 00:53:39 steve Exp $" +#ident "$Id: main.cc,v 1.55 2002/05/24 01:13:00 steve Exp $" #endif # include "config.h" @@ -76,6 +76,8 @@ const char VERSION[] = "$Name: $ $State: Exp $"; const char*target = "null"; +generation_t generation_flag = GN_DEFAULT; + map flags; list library_dirs; @@ -112,6 +114,20 @@ static void parm_to_flagmap(const string&flag) flags[key] = value; } +static void process_generation_flag(const char*gen) +{ + if (strcmp(gen,"1") == 0) + generation_flag = GN_VER1995; + + else if (strcmp(gen,"2") == 0) + generation_flag = GN_VER2001; + + else if (strcmp(gen,"3.0") == 0) + generation_flag = GN_SYSVER30; + + else + generation_flag = GN_DEFAULT; +} extern Design* elaborate(list root); @@ -195,7 +211,7 @@ int main(int argc, char*argv[]) min_typ_max_flag = TYP; min_typ_max_warn = 10; - while ((opt = getopt(argc, argv, "F:f:hm:M:N:o:P:p:s:T:t:VvW:Y:y:")) != EOF) switch (opt) { + while ((opt = getopt(argc, argv, "F:f:g:hm:M:N:o:P:p:s:T:t:VvW:Y:y:")) != EOF) switch (opt) { case 'F': { net_func tmp = name_to_net_func(optarg); if (tmp == 0) { @@ -210,6 +226,9 @@ int main(int argc, char*argv[]) case 'f': parm_to_flagmap(optarg); break; + case 'g': + process_generation_flag(optarg); + break; case 'h': help_flag = true; break; @@ -348,7 +367,21 @@ int main(int argc, char*argv[]) if (verbose_flag) { if (times_flag) times(cycles+0); - cout << "PARSING INPUT ..." << endl; + + cout << "Using language generation: "; + switch (generation_flag) { + case GN_VER1995: + cout << "IEEE1364-1995"; + break; + case GN_VER2001: + cout << "IEEE1364-2001"; + break; + case GN_SYSVER30: + cout << "SystemVerilog 3.0"; + break; + } + + cout << endl << "PARSING INPUT ..." << endl; } /* Parse the input. Make the pform. */ @@ -496,6 +529,9 @@ int main(int argc, char*argv[]) /* * $Log: main.cc,v $ + * Revision 1.55 2002/05/24 01:13:00 steve + * Support language generation flag -g. + * * Revision 1.54 2002/04/22 00:53:39 steve * Do not allow implicit wires in sensitivity lists. *