diff --git a/synth2.cc b/synth2.cc
index f877a2215..eee722b47 100644
--- a/synth2.cc
+++ b/synth2.cc
@@ -1533,21 +1533,7 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope,
 		  verinum zero (verinum::V0, rst_drv.len());
 		  verinum ones (verinum::V1, rst_drv.len());
 
-		  if (rst_drv==zero) {
-			  // Don't yet support multiple asynchronous reset inputs.
-			ivl_assert(*this, ! ff_aclr.pin(pin).is_linked());
-
-			ivl_assert(*this, rst->pin_count()==1);
-			connect(ff_aclr.pin(pin), rst->pin(0));
-
-		  } else if (rst_drv==ones) {
-			  // Don't yet support multiple asynchronous set inputs.
-			ivl_assert(*this, ! ff_aset.pin(pin).is_linked());
-
-			ivl_assert(*this, rst->pin_count()==1);
-			connect(ff_aset.pin(pin), rst->pin(0));
-
-		  } else {
+		  if(rst_drv.len() != 1) {
 			NetConcat *set_cc = new NetConcat(scope,
 			                                  scope->local_symbol(),
 			                                  rst_nex->vector_width(),
@@ -1585,6 +1571,12 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope,
 				    connect(set_cc->pin(i+1), rst->pin(0));
 				    connect(rst_cc->pin(i+1), nc->pin(0));
 			      } else {
+				    if(rst_drv[i] != verinum::V0)
+				    {
+					cerr << get_fileline() << ": error: Async initialisation not constant"
+					 << " for FlipFlop reset: " << i << rst_drv << endl;
+					des->errors += 1;
+				    }
 				    connect(set_cc->pin(i+1), nc->pin(0));
 				    connect(rst_cc->pin(i+1), rst->pin(0));
 			      }
@@ -1592,6 +1584,22 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope,
 			connect(ff_aset.pin(pin), set_cc->pin(0));
 			connect(ff_aclr.pin(pin), rst_cc->pin(0));
 		  }
+		  else {
+			if (rst_drv==zero) {
+			      // Don't yet support multiple asynchronous reset inputs.
+			      ivl_assert(*this, ! ff_aclr.pin(pin).is_linked());
+
+			      ivl_assert(*this, rst->pin_count()==1);
+			      connect(ff_aclr.pin(pin), rst->pin(0));
+
+			} else if (rst_drv==ones) {
+			  // Don't yet support multiple asynchronous set inputs.
+			      ivl_assert(*this, ! ff_aset.pin(pin).is_linked());
+
+			      ivl_assert(*this, rst->pin_count()==1);
+			      connect(ff_aset.pin(pin), rst->pin(0));
+			}
+		  }
 	    }
 
 	    return else_->synth_sync(des, scope, ff_clk, ff_ce,