From 36cc374ec980ea1188f55bcbab02dd83b9fdfa22 Mon Sep 17 00:00:00 2001 From: steve Date: Sun, 24 Sep 2000 02:21:53 +0000 Subject: [PATCH] Add support for signal expressions. --- ivl_target.h | 12 +++++++++--- t-dll-api.cc | 19 ++++++++++++++++++- t-dll-expr.cc | 19 ++++++++++++++++++- t-dll.h | 21 +++++++++++++++++++-- tgt-stub/stub.c | 40 ++++++++++++++++++++++++++++++++-------- tgt-verilog/verilog.c | 10 +++++++++- 6 files changed, 105 insertions(+), 16 deletions(-) diff --git a/ivl_target.h b/ivl_target.h index 15c2d8709..2f2225527 100644 --- a/ivl_target.h +++ b/ivl_target.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: ivl_target.h,v 1.10 2000/09/23 05:15:07 steve Exp $" +#ident "$Id: ivl_target.h,v 1.11 2000/09/24 02:21:53 steve Exp $" #endif #ifdef __cplusplus @@ -79,7 +79,9 @@ typedef struct ivl_statement_s*ivl_statement_t; typedef enum ivl_expr_type_e { IVL_EX_NONE = 0, IVL_EX_NUMBER, - IVL_EX_STRING + IVL_EX_SIGNAL, + IVL_EX_STRING, + IVL_EX_SUBSIG, } ivl_expr_type_t; typedef enum ivl_logic_e { @@ -140,8 +142,9 @@ extern const char* ivl_get_root_name(ivl_design_t net); */ extern ivl_expr_type_t ivl_expr_type(ivl_expr_t net); +extern const char* ivl_expr_name(ivl_expr_t net); extern const char* ivl_expr_string(ivl_expr_t net); - +extern unsigned ivl_expr_width(ivl_expr_t net); /* LOGIC * These types and functions support manipulation of logic gates. The @@ -324,6 +327,9 @@ _END_DECL /* * $Log: ivl_target.h,v $ + * Revision 1.11 2000/09/24 02:21:53 steve + * Add support for signal expressions. + * * Revision 1.10 2000/09/23 05:15:07 steve * Add enough tgt-verilog code to support hello world. * diff --git a/t-dll-api.cc b/t-dll-api.cc index cf91a28a7..6d13620ac 100644 --- a/t-dll-api.cc +++ b/t-dll-api.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: t-dll-api.cc,v 1.4 2000/09/23 05:15:07 steve Exp $" +#ident "$Id: t-dll-api.cc,v 1.5 2000/09/24 02:21:53 steve Exp $" #endif # include "t-dll.h" @@ -26,6 +26,8 @@ extern "C" ivl_expr_type_t ivl_expr_type(ivl_expr_t net) { + if (net == 0) + return IVL_EX_NONE; return net->type_; } @@ -39,12 +41,24 @@ extern "C" const char*ivl_get_root_name(ivl_design_t des) return ((const Design*)des)->find_root_scope()->name().c_str(); } +extern "C" const char* ivl_expr_name(ivl_expr_t net) +{ + assert(net->type_ == IVL_EX_SIGNAL); + return net->u_.subsig_.name_; +} + extern "C" const char* ivl_expr_string(ivl_expr_t net) { assert(net->type_ == IVL_EX_STRING); return net->u_.string_.value_; } +extern "C" unsigned ivl_expr_width(ivl_expr_t net) +{ + assert(net); + return net->width_; +} + extern "C" ivl_logic_t ivl_get_logic_type(ivl_net_logic_t net) { switch (net->dev_->type()) { @@ -186,6 +200,9 @@ extern "C" ivl_statement_t ivl_stmt_sub_stmt(ivl_statement_t net) /* * $Log: t-dll-api.cc,v $ + * Revision 1.5 2000/09/24 02:21:53 steve + * Add support for signal expressions. + * * Revision 1.4 2000/09/23 05:15:07 steve * Add enough tgt-verilog code to support hello world. * diff --git a/t-dll-expr.cc b/t-dll-expr.cc index a69584391..043cc11f7 100644 --- a/t-dll-expr.cc +++ b/t-dll-expr.cc @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) & !defined(macintosh) -#ident "$Id: t-dll-expr.cc,v 1.1 2000/09/23 05:15:07 steve Exp $" +#ident "$Id: t-dll-expr.cc,v 1.2 2000/09/24 02:21:53 steve Exp $" #endif # include "t-dll.h" @@ -34,16 +34,33 @@ void dll_target::expr_const(const NetEConst*net) if (net->value().is_string()) { expr_->type_ = IVL_EX_STRING; + expr_->width_= net->expr_width(); expr_->u_.string_.value_ =strdup(net->value().as_string().c_str()); } else { expr_->type_ = IVL_EX_NUMBER; + expr_->width_= net->expr_width(); } } +void dll_target::expr_signal(const NetESignal*net) +{ + assert(expr_ == 0); + + expr_ = (ivl_expr_t)calloc(1, sizeof(struct ivl_expr_s)); + assert(expr_); + + expr_->type_ = IVL_EX_SIGNAL; + expr_->width_= net->expr_width(); + expr_->u_.subsig_.name_ = strdup(net->name().c_str()); +} + /* * $Log: t-dll-expr.cc,v $ + * Revision 1.2 2000/09/24 02:21:53 steve + * Add support for signal expressions. + * * Revision 1.1 2000/09/23 05:15:07 steve * Add enough tgt-verilog code to support hello world. * diff --git a/t-dll.h b/t-dll.h index 0668044be..285628c8f 100644 --- a/t-dll.h +++ b/t-dll.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: t-dll.h,v 1.4 2000/09/23 05:15:07 steve Exp $" +#ident "$Id: t-dll.h,v 1.5 2000/09/24 02:21:53 steve Exp $" #endif # include "target.h" @@ -77,20 +77,34 @@ struct dll_target : public target_t, public expr_scan_t { void proc_while(const NetWhile*); struct ivl_expr_s*expr_; - void expr_const(const NetEConst*net); + void expr_const(const NetEConst*); + void expr_signal(const NetESignal*); }; /* * These are various private declarations used by the t-dll target. */ +/* + * The ivl_expr_t is an opaque reference to one of these + * structures. This structure holds all the information we need about + * an expression node, including its type, the expression width, and + * type specific properties. + */ struct ivl_expr_s { ivl_expr_type_t type_; + unsigned width_; union { struct { char*value_; } string_; + + struct { + char*name_; + ivl_expr_t msb_; + ivl_expr_t lsb_; + } subsig_; } u_; }; @@ -154,6 +168,9 @@ struct ivl_statement_s { /* * $Log: t-dll.h,v $ + * Revision 1.5 2000/09/24 02:21:53 steve + * Add support for signal expressions. + * * Revision 1.4 2000/09/23 05:15:07 steve * Add enough tgt-verilog code to support hello world. * diff --git a/tgt-stub/stub.c b/tgt-stub/stub.c index 18ec65039..f9d5265bf 100644 --- a/tgt-stub/stub.c +++ b/tgt-stub/stub.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: stub.c,v 1.9 2000/09/22 03:58:30 steve Exp $" +#ident "$Id: stub.c,v 1.10 2000/09/24 02:21:53 steve Exp $" #endif /* @@ -113,13 +113,29 @@ int target_net_signal(const char*name, ivl_net_signal_t net) return 0; } +static void show_expression(ivl_expr_t net, unsigned ind) +{ + const ivl_expr_type_t code = ivl_expr_type(net); + + switch (code) { + case IVL_EX_STRING: + fprintf(out, "%*s\n", ind, "", + ivl_expr_string(net), ivl_expr_width(net)); + break; + default: + fprintf(out, "%*s\n", ind, "", + ivl_expr_name(net), ivl_expr_width(net)); + break; + } +} + static void show_statement(ivl_statement_t net, unsigned ind) { const ivl_statement_type_t code = ivl_statement_type(net); switch (code) { case IVL_ST_ASSIGN: - fprintf(out, "%*s? = ?;\n", ind, ""); + fprintf(out, "%*sASSIGN: ? = ?\n", ind, ""); break; case IVL_ST_BLOCK: { @@ -161,9 +177,14 @@ static void show_statement(ivl_statement_t net, unsigned ind) fprintf(out, "%*s/* noop */;\n", ind, ""); break; - case IVL_ST_STASK: - fprintf(out, "%*s%s(...);\n", ind, "", ivl_stmt_name(net)); - break; + case IVL_ST_STASK: { + unsigned idx; + fprintf(out, "%*sCall %s(%u parameters);\n", ind, "", + ivl_stmt_name(net), ivl_stmt_parm_count(net)); + for (idx = 0 ; idx < ivl_stmt_parm_count(net) ; idx += 1) + show_expression(ivl_stmt_parm(net, idx), ind+4); + break; + } case IVL_ST_WAIT: fprintf(out, "%*s@(...)\n", ind, ""); @@ -184,20 +205,23 @@ int target_process(ivl_process_t net) { switch (ivl_get_process_type(net)) { case IVL_PR_INITIAL: - fprintf(out, " initial\n"); + fprintf(out, "initial\n"); break; case IVL_PR_ALWAYS: - fprintf(out, " always\n"); + fprintf(out, "always\n"); break; } - show_statement(ivl_get_process_stmt(net), 8); + show_statement(ivl_get_process_stmt(net), 4); return 0; } /* * $Log: stub.c,v $ + * Revision 1.10 2000/09/24 02:21:53 steve + * Add support for signal expressions. + * * Revision 1.9 2000/09/22 03:58:30 steve * Access to the name of a system task call. * diff --git a/tgt-verilog/verilog.c b/tgt-verilog/verilog.c index 549e47e2e..b41a47ec6 100644 --- a/tgt-verilog/verilog.c +++ b/tgt-verilog/verilog.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #if !defined(WINNT) && !defined(macintosh) -#ident "$Id: verilog.c,v 1.1 2000/09/23 05:15:07 steve Exp $" +#ident "$Id: verilog.c,v 1.2 2000/09/24 02:21:54 steve Exp $" #endif /* @@ -119,10 +119,15 @@ static void show_expression(ivl_expr_t net) return; switch (ivl_expr_type(net)) { + case IVL_EX_STRING: fprintf(out, "\"%s\"", ivl_expr_string(net)); break; + case IVL_EX_SIGNAL: + fprintf(out, "%s", ivl_expr_name(net)); + break; + default: fprintf(out, "..."); } @@ -225,6 +230,9 @@ int target_process(ivl_process_t net) /* * $Log: verilog.c,v $ + * Revision 1.2 2000/09/24 02:21:54 steve + * Add support for signal expressions. + * * Revision 1.1 2000/09/23 05:15:07 steve * Add enough tgt-verilog code to support hello world. *