From 35df445db173180ac0bb17c8d9c708d590a9362b Mon Sep 17 00:00:00 2001 From: Cary R Date: Wed, 22 Aug 2007 09:16:34 -0700 Subject: [PATCH] Initialize all range variables in the constructor to avoid false asserts. This would have never been a problem with the actual circuit generated. The problem was that the assert was checking values that had never been set. The constructor now explicitly sets these values to zero and while I was at it I added a couple more asserts. --- PWire.cc | 3 ++- elab_sig.cc | 4 ++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/PWire.cc b/PWire.cc index 2e45c71a9..fd8ab39f5 100644 --- a/PWire.cc +++ b/PWire.cc @@ -31,7 +31,8 @@ PWire::PWire(const pform_name_t&n, ivl_variable_type_t dt) : hname_(n), type_(t), port_type_(pt), data_type_(dt), signed_(false), isint_(false), port_set_(false), net_set_(false), - error_cnt_(0), lidx_(0), ridx_(0) + port_msb_(0), port_lsb_(0), net_msb_(0), net_lsb_(0), error_cnt_(0), + lidx_(0), ridx_(0) { if (t == NetNet::INTEGER) { type_ = NetNet::REG; diff --git a/elab_sig.cc b/elab_sig.cc index 6d56ad652..788cd7bd9 100644 --- a/elab_sig.cc +++ b/elab_sig.cc @@ -592,7 +592,9 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const nmsb = pmsb; nlsb = plsb; } + if (!port_set_) assert(port_msb_ == 0 && port_lsb_ == 0); if (port_msb_ == 0) assert(port_lsb_ == 0); + if (port_lsb_ == 0) assert(port_msb_ == 0); /* If they exist get the net/etc. definition MSB and LSB */ if (net_set_ && net_msb_ != 0) { @@ -620,7 +622,9 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const delete texpr; } + if (!net_set_) assert(net_msb_ == 0 && net_lsb_ == 0); if (net_msb_ == 0) assert(net_lsb_ == 0); + if (net_lsb_ == 0) assert(net_msb_ == 0); /* We have a port size error */ if (port_set_ && net_set_ && (pmsb != nmsb || plsb != nlsb)) {