diff --git a/net_design.cc b/net_design.cc
index 03929d6cd..62a3b2efb 100644
--- a/net_design.cc
+++ b/net_design.cc
@@ -339,6 +339,14 @@ void NetScope::evaluate_parameter_logic_(Design*des, param_ref_t cur)
 	    unsigned long wid = (msb >= lsb)? msb - lsb : lsb - msb;
 	    wid += 1;
 
+	    /* If we have a real value convert it to an integer. */
+	    if(NetECReal*tmp = dynamic_cast<NetECReal*>(expr)) {
+		  verinum nval(tmp->value().as_long64());
+		  expr = new NetEConst(nval);
+		  expr->set_line(*((*cur).second.expr));
+		  (*cur).second.expr = expr;
+	    }
+
 	    NetEConst*val = dynamic_cast<NetEConst*>(expr);
 	    assert(val);
 
diff --git a/parse.y b/parse.y
index 8e9934611..75886dffc 100644
--- a/parse.y
+++ b/parse.y
@@ -2384,7 +2384,14 @@ parameter_assign_decl
 	param_active_type = IVL_VT_LOGIC;
       }
   | K_integer
-      { param_active_range = 0;
+      { svector<PExpr*>*range_stub = new svector<PExpr*>(2);
+        PExpr*re;
+        re = new PENumber(new verinum(integer_width-1, integer_width));
+        (*range_stub)[0] = re;
+        re = new PENumber(new verinum((uint64_t)0, integer_width));
+        (*range_stub)[1] = re;
+        /* The default range is [31:0] */
+        param_active_range = range_stub;
 	param_active_signed = true;
 	param_active_type = IVL_VT_LOGIC;
       }
@@ -2393,6 +2400,23 @@ parameter_assign_decl
 	param_active_signed = false;
 	param_active_type = IVL_VT_LOGIC;
       }
+  | K_time
+      { svector<PExpr*>*range_stub = new svector<PExpr*>(2);
+        PExpr*re;
+        re = new PENumber(new verinum((uint64_t)63, integer_width));
+        (*range_stub)[0] = re;
+        re = new PENumber(new verinum((uint64_t)0, integer_width));
+        (*range_stub)[1] = re;
+        /* The range is [63:0] */
+        param_active_range = range_stub;
+	param_active_signed = false;
+	param_active_type = IVL_VT_LOGIC;
+      }
+    parameter_assign_list
+      { param_active_range = 0;
+	param_active_signed = false;
+	param_active_type = IVL_VT_LOGIC;
+      }
   | K_real
       { param_active_range = 0;
 	param_active_signed = true;
@@ -2403,6 +2427,16 @@ parameter_assign_decl
 	param_active_signed = false;
 	param_active_type = IVL_VT_LOGIC;
       }
+  | K_realtime
+      { param_active_range = 0;
+	param_active_signed = true;
+	param_active_type = IVL_VT_REAL;
+      }
+    parameter_assign_list
+      { param_active_range = 0;
+	param_active_signed = false;
+	param_active_type = IVL_VT_LOGIC;
+      }
   ;
 
 parameter_assign_list
@@ -2489,7 +2523,14 @@ localparam_assign_decl
 	param_active_type = IVL_VT_LOGIC;
       }
   | K_integer
-      { param_active_range = 0;
+      { svector<PExpr*>*range_stub = new svector<PExpr*>(2);
+        PExpr*re;
+        re = new PENumber(new verinum(integer_width-1, integer_width));
+        (*range_stub)[0] = re;
+        re = new PENumber(new verinum((uint64_t)0, integer_width));
+        (*range_stub)[1] = re;
+        /* The default range is [31:0] */
+        param_active_range = range_stub;
 	param_active_signed = true;
 	param_active_type = IVL_VT_LOGIC;
       }
@@ -2498,6 +2539,23 @@ localparam_assign_decl
 	param_active_signed = false;
 	param_active_type = IVL_VT_LOGIC;
       }
+  | K_time
+      { svector<PExpr*>*range_stub = new svector<PExpr*>(2);
+        PExpr*re;
+        re = new PENumber(new verinum((uint64_t)63, integer_width));
+        (*range_stub)[0] = re;
+        re = new PENumber(new verinum((uint64_t)0, integer_width));
+        (*range_stub)[1] = re;
+        /* The range is [63:0] */
+        param_active_range = range_stub;
+	param_active_signed = false;
+	param_active_type = IVL_VT_LOGIC;
+      }
+    localparam_assign_list
+      { param_active_range = 0;
+	param_active_signed = false;
+	param_active_type = IVL_VT_LOGIC;
+      }
   | K_real
       { param_active_range = 0;
 	param_active_signed = true;
@@ -2508,6 +2566,16 @@ localparam_assign_decl
 	param_active_signed = false;
 	param_active_type = IVL_VT_LOGIC;
       }
+  | K_realtime
+      { param_active_range = 0;
+	param_active_signed = true;
+	param_active_type = IVL_VT_REAL;
+      }
+    localparam_assign_list
+      { param_active_range = 0;
+	param_active_signed = false;
+	param_active_type = IVL_VT_LOGIC;
+      }
   ;
 
 localparam_assign_list
diff --git a/verinum.cc b/verinum.cc
index a69b2d194..0cd787a61 100644
--- a/verinum.cc
+++ b/verinum.cc
@@ -205,7 +205,7 @@ verinum::verinum(int64_t that)
       bits_ = new V[nbits_];
       for (unsigned idx = 0 ;  idx < nbits_ ;  idx += 1) {
 	    bits_[idx] = (that & 1)? V1 : V0;
-	    that /= 2;
+	    that >>= 1;
       }
 }