diff --git a/lexor.lex b/lexor.lex
index 64d6f2e3c..0c4bc92d3 100644
--- a/lexor.lex
+++ b/lexor.lex
@@ -4,7 +4,7 @@
 
 %{
 /*
- * Copyright (c) 1998-2011 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2012 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -377,8 +377,11 @@ TU [munpf]
 		 << "Using SystemVerilog 'N bit vector.  Use at least "
 		 << "-g2005-sv to remove this warning." << endl;
       }
+      generation_t generation_save = generation_flag;
+      generation_flag = GN_VER2005_SV;
       yylval.number = make_unsized_binary(yytext);
-      return BASED_NUMBER; }
+      generation_flag = generation_save;
+      return UNBASED_NUMBER; }
 
 [0-9][0-9_]* {
       yylval.number = make_unsized_dec(yytext);
diff --git a/parse.y b/parse.y
index 6b97c6364..a777700df 100644
--- a/parse.y
+++ b/parse.y
@@ -386,7 +386,7 @@ static void current_function_set_statement(const YYLTYPE&loc, vector<Statement*>
 %token <data_type> TYPE_IDENTIFIER
 %token <discipline> DISCIPLINE_IDENTIFIER
 %token <text>   PATHPULSE_IDENTIFIER
-%token <number> BASED_NUMBER DEC_NUMBER
+%token <number> BASED_NUMBER DEC_NUMBER UNBASED_NUMBER
 %token <realtime> REALTIME
 %token K_PLUS_EQ K_MINUS_EQ K_INCR K_DECR
 %token K_LE K_GE K_EG K_EQ K_NE K_CEQ K_CNE K_LP K_LS K_RS K_RSS K_SG
@@ -1231,6 +1231,12 @@ number  : BASED_NUMBER
         | DEC_NUMBER BASED_NUMBER
 	     { $$ = pform_verinum_with_size($1,$2, @2.text, @2.first_line);
 	       based_size = 0; }
+        | UNBASED_NUMBER
+	     { $$ = $1; based_size = 0;}
+        | DEC_NUMBER UNBASED_NUMBER
+	     { yyerror(@1, "error: Unbased SystemVerilog literal cannot have "
+	                   "a size.");
+	       $$ = $1; based_size = 0;}
 	;
 
 open_range_list /* IEEE1800-2005 A.2.11 */