diff --git a/elab_expr.cc b/elab_expr.cc
index 28f0595d0..508617b35 100644
--- a/elab_expr.cc
+++ b/elab_expr.cc
@@ -1558,8 +1558,7 @@ NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
 	      // If the part select covers exactly the entire
 	      // vector, then do not bother with it. Return the
 	      // signal itself.
-	    long l = net->sig()->sb_to_idx(lsv);
-	    if (l >= 0 && (unsigned) l == (wid-1) && wid == net->vector_width())
+	    if (net->sig()->sb_to_idx(lsv) == (wid-1) && wid == net->vector_width())
 		  return net;
 
 	      // Otherwise, make a part select that covers the right range.