From 2abfef68ff53e45f4110c4db90f8a8c7467b127e Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Sat, 1 Jan 2022 11:00:15 +0100 Subject: [PATCH] tgt-vvp: Fix load skip for assignment operator to array entry The vvp `%load/vec4a` instruction will skip the load if vvp flag 4 is set and return 'x. This is meant for handling the case where the index is undefined. For assignment operators on array entries, when the index is an immediate value, vvp flag 4 is not cleared before the load instruction. If a previous instruction set flag 4 it load yield 'x. E.g. for the following sequence `x[0]` should be `11`, but will be `'x`. ``` integer x[10]; logic a = 1'b0; x[0] = 10; if (a == 0) begin x[0] += 1; end ``` Properly clear the flag before the load instruction to handle this correctly. Signed-off-by: Lars-Peter Clausen --- tgt-vvp/stmt_assign.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tgt-vvp/stmt_assign.c b/tgt-vvp/stmt_assign.c index 65ccc831c..754722646 100644 --- a/tgt-vvp/stmt_assign.c +++ b/tgt-vvp/stmt_assign.c @@ -161,6 +161,7 @@ static void get_vec_from_lval_slice(ivl_lval_t lval, struct vec_slice_info*slice if (use_word < ivl_signal_array_count(sig)) { fprintf(vvp_out, " %%ix/load 3, %lu, 0;\n", use_word); + fprintf(vvp_out, " %%flag_set/imm 4, 0;\n"); fprintf(vvp_out, " %%load/vec4a v%p, 3;\n", sig); } else { assert(wid <= 32);