diff --git a/PExpr.cc b/PExpr.cc
index 614ff34b8..7ee5f9298 100644
--- a/PExpr.cc
+++ b/PExpr.cc
@@ -152,7 +152,7 @@ bool PECallFunction::has_aa_term(Design*des, NetScope*scope) const
 }
 
 PEConcat::PEConcat(const svector<PExpr*>&p, PExpr*r)
-: parms_(p), repeat_(r)
+: parms_(p), tested_widths_(p.count()), repeat_(r)
 {
 }
 
diff --git a/PExpr.h b/PExpr.h
index 3d6be4ab0..e043da23a 100644
--- a/PExpr.h
+++ b/PExpr.h
@@ -21,6 +21,7 @@
 
 # include  <string>
 # include  <vector>
+# include  <valarray>
 # include  "netlist.h"
 # include  "verinum.h"
 # include  "LineInfo.h"
@@ -181,7 +182,10 @@ class PEConcat : public PExpr {
 				     bool bidirectional_flag) const;
     private:
       svector<PExpr*>parms_;
+      std::valarray<unsigned>tested_widths_;
+
       PExpr*repeat_;
+
 };
 
 /*
diff --git a/elab_expr.cc b/elab_expr.cc
index e4c998ff5..6c32fc4c9 100644
--- a/elab_expr.cc
+++ b/elab_expr.cc
@@ -1366,8 +1366,10 @@ unsigned PEConcat::test_width(Design*des, NetScope*scope,
       expr_type_ = IVL_VT_LOGIC;
 
       unsigned count_width = 0;
-      for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1)
-	    count_width += parms_[idx]->test_width(des, scope, 0, 0, expr_type__, unsized_flag);
+      for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
+	    tested_widths_[idx] = parms_[idx]->test_width(des, scope, 0, 0, expr_type__, unsized_flag);
+	    count_width += tested_widths_[idx];
+      }
 
       if (repeat_) {
 	      // The repeat expression is self-determined and its own type.
@@ -1462,7 +1464,8 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope,
 	    }
 
 	    assert(parms_[idx]);
-	    NetExpr*ex = elab_and_eval(des, scope, parms_[idx], 0, 0);
+	    NetExpr*ex = elab_and_eval(des, scope, parms_[idx],
+				       tested_widths_[idx], 0);
 	    if (ex == 0) continue;
 
 	    ex->set_line(*parms_[idx]);
@@ -2789,6 +2792,12 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope,
 			cerr << get_fileline() << ": debug: Short-circuit "
 			        "elaborate TRUE clause of ternary."
 			     << endl;
+		  if (use_wid <= 0) {
+			cerr << get_fileline() << ": internal error: "
+			     << "Unexpected use_wid=" << use_wid
+			     << " processing short-circuit TRUE clause"
+			     << " of expression: " << *this << endl;
+		  }
 		  ivl_assert(*this, use_wid > 0);
 		  NetExpr*tru = elab_and_eval(des, scope, tru_, use_wid);
 		  return pad_to_width(tru, use_wid);
@@ -2801,6 +2810,12 @@ NetExpr*PETernary::elaborate_expr(Design*des, NetScope*scope,
 			cerr << get_fileline() << ": debug: Short-circuit "
 			        "elaborate FALSE clause of ternary."
 			<< endl;
+		  if (use_wid <= 0) {
+			cerr << get_fileline() << ": internal error: "
+			     << "Unexpected use_wid=" << use_wid
+			     << " processing short-circuit FALSE clause"
+			     << " of expression: " << *this << endl;
+		  }
 		  ivl_assert(*this, use_wid > 0);
 		  NetExpr*fal = elab_and_eval(des, scope, fal_, use_wid);
 		  return pad_to_width(fal, use_wid);
diff --git a/pform.cc b/pform.cc
index ef3ceacd4..a737a33b4 100644
--- a/pform.cc
+++ b/pform.cc
@@ -1447,11 +1447,11 @@ void pform_makewire(const vlltype&li, perm_string name,
 	    bool rc = cur->set_wire_type(type);
 	    if (rc == false) {
 		  ostringstream msg;
-		  msg << name << " definition conflicts with "
-		      << "definition at " << cur->get_fileline()
+		  msg << name << " " << type
+		      << " definition conflicts with " << cur->get_wire_type()
+		      << " definition at " << cur->get_fileline()
 		      << ".";
 		  VLerror(msg.str().c_str());
-		  cerr << "XXXX type=" << type <<", curtype=" << cur->get_wire_type() << endl;
 	    }
 
       }
@@ -1460,9 +1460,11 @@ void pform_makewire(const vlltype&li, perm_string name,
       if (! cur) {
 	    new_wire_flag = true;
 	    cur = new PWire(name, type, pt, dt);
+	    FILE_NAME(cur, li.text, li.first_line);
       }
 
-      FILE_NAME(cur, li.text, li.first_line);
+      if (type != NetNet::IMPLICIT)
+	    FILE_NAME(cur, li.text, li.first_line);
 
       bool flag;
       switch (dt) {
diff --git a/scripts/MAKE_SNAPSHOT.sh b/scripts/MAKE_SNAPSHOT.sh
index aacf28ac6..cb26bc9ca 100644
--- a/scripts/MAKE_SNAPSHOT.sh
+++ b/scripts/MAKE_SNAPSHOT.sh
@@ -45,7 +45,7 @@ if [ -e $destdir/$prefix ]; then
 fi
 
 echo "Exporting $tag to $destdir/$prefix..."
-git-archive --prefix="$prefix/" $tag | ( cd "$destdir" && tar xf - )
+git archive --prefix="$prefix/" $tag | ( cd "$destdir" && tar xf - )
 
 versionh="$destdir/$prefix/version.h"
 echo "Create $versionh ..."
diff --git a/tgt-vhdl/scope.cc b/tgt-vhdl/scope.cc
index 179abfbc9..5b15d6074 100644
--- a/tgt-vhdl/scope.cc
+++ b/tgt-vhdl/scope.cc
@@ -131,6 +131,7 @@ static string visible_nexus_signal_name(nexus_private_t *priv, vhdl_scope *scope
 void draw_nexus(ivl_nexus_t nexus)
 {
    nexus_private_t *priv = new nexus_private_t;
+   int nexus_signal_width = -1;
    priv->const_driver = NULL;
    
    int nptrs = ivl_nexus_ptrs(nexus);
@@ -144,6 +145,8 @@ void draw_nexus(ivl_nexus_t nexus)
          vhdl_scope *scope = find_scope_for_signal(sig);
          unsigned pin = ivl_nexus_ptr_pin(nexus_ptr);
          link_scope_to_nexus_signal(priv, scope, sig, pin);
+
+         nexus_signal_width = ivl_signal_width(sig);
       }
    }
 
@@ -188,7 +191,17 @@ void draw_nexus(ivl_nexus_t nexus)
          else {
             // Create a temporary signal to connect the nexus
             // TODO: we could avoid this for IVL_LPM_PART_PV
-            vhdl_type *type = vhdl_type::type_for(ivl_lpm_width(lpm),
+
+            // If we already know how wide the temporary should be
+            // (i.e. because we've seen a signal it's connected to)
+            // then use that, otherwise use the width of the LPM
+            int lpm_temp_width;
+            if (nexus_signal_width != -1)
+               lpm_temp_width = nexus_signal_width;
+            else
+               lpm_temp_width = ivl_lpm_width(lpm);
+            
+            vhdl_type *type = vhdl_type::type_for(lpm_temp_width,
                                                   ivl_lpm_signed(lpm) != 0);
             ostringstream ss;
             ss << "LPM" << ivl_lpm_basename(lpm);
diff --git a/tgt-vhdl/stmt.cc b/tgt-vhdl/stmt.cc
index 0e86ebf6c..c319abb34 100644
--- a/tgt-vhdl/stmt.cc
+++ b/tgt-vhdl/stmt.cc
@@ -608,30 +608,36 @@ int draw_casezx(vhdl_procedural *proc, stmt_container *container,
 
          vhdl_binop_expr *all =
             new vhdl_binop_expr(VHDL_BINOP_AND, vhdl_type::boolean());
+         bool just_dont_care = true;
          for (unsigned i = 0; i < ivl_expr_width(net); i++) {
             switch (bits[i]) {
+            case 'x':
+               if (ivl_statement_type(stmt) == IVL_ST_CASEZ) break;
             case '?':
             case 'z':
-            case 'x':
                // Ignore it
-               break;
-            default:
-               {
-                  // Generate a comparison for this bit position
-                  vhdl_binop_expr *cmp =
-                     new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean());
-
-                  vhdl_type *type = vhdl_type::nunsigned(ivl_expr_width(net));
-                  vhdl_var_ref *lhs =
-                     new vhdl_var_ref(test->get_name().c_str(), type);
-                  lhs->set_slice(new vhdl_const_int(i));
-
-                  cmp->add_expr(lhs);
-                  cmp->add_expr(new vhdl_const_bit(bits[i]));
-
-                  all->add_expr(cmp);
-               }
+               continue;
             }
+
+            // Generate a comparison for this bit position
+            vhdl_binop_expr *cmp =
+               new vhdl_binop_expr(VHDL_BINOP_EQ, vhdl_type::boolean());
+
+            vhdl_type *type = vhdl_type::nunsigned(ivl_expr_width(net));
+            vhdl_var_ref *lhs =
+               new vhdl_var_ref(test->get_name().c_str(), type);
+            lhs->set_slice(new vhdl_const_int(i));
+
+            cmp->add_expr(lhs);
+            cmp->add_expr(new vhdl_const_bit(bits[i]));
+
+            all->add_expr(cmp);
+            just_dont_care = false;
+         }
+
+         // If there are no bits comparisons then just put a True
+         if (just_dont_care) {
+            all->add_expr(new vhdl_const_bool(true));
          }
 
          if (result)
diff --git a/verilog.spec b/verilog.spec
index 568e8594d..b4492160a 100644
--- a/verilog.spec
+++ b/verilog.spec
@@ -1,6 +1,6 @@
 #norootforbuild
 #
-%define rev_date 20080905
+%define rev_date 20081118
 #
 #
 Summary: Icarus Verilog
@@ -41,7 +41,7 @@ rm -rf $RPM_BUILD_ROOT
 
 %files
 
-%attr(-,root,root) %doc COPYING README.txt BUGS.txt QUICK_START.txt ieee1364-notes.txt mingw.txt swift.txt netlist.txt t-dll.txt vpi.txt tgt-fpga/fpga.txt cadpli/cadpli.txt
+%attr(-,root,root) %doc COPYING README.txt BUGS.txt QUICK_START.txt ieee1364-notes.txt mingw.txt swift.txt netlist.txt t-dll.txt vpi.txt cadpli/cadpli.txt
 %attr(-,root,root) %doc examples/*
 
 %attr(-,root,root) %{_mandir}/man1/iverilog.1.gz
@@ -64,6 +64,7 @@ rm -rf $RPM_BUILD_ROOT
 %attr(-,root,root) %{_libdir}/ivl/vvp-s.conf
 %attr(-,root,root) %{_libdir}/ivl/vhdl.tgt
 %attr(-,root,root) %{_libdir}/ivl/vhdl.conf
+%attr(-,root,root) %{_libdir}/ivl/vhdl-s.conf
 %attr(-,root,root) %{_libdir}/ivl/system.sft
 %attr(-,root,root) %{_libdir}/ivl/system.vpi
 %attr(-,root,root) %{_libdir}/ivl/va_math.sft
@@ -75,13 +76,16 @@ rm -rf $RPM_BUILD_ROOT
 %attr(-,root,root) %{_libdir}/libveriuser.a
 %attr(-,root,root) %{_libdir}/ivl/include/constants.vams
 %attr(-,root,root) %{_libdir}/ivl/include/disciplines.vams
-%attr(-,root,root) /usr/include/ivl_target.h
-%attr(-,root,root) /usr/include/vpi_user.h
-%attr(-,root,root) /usr/include/acc_user.h
-%attr(-,root,root) /usr/include/veriuser.h
-%attr(-,root,root) /usr/include/_pli_types.h
+%attr(-,root,root) /usr/include/verilog/ivl_target.h
+%attr(-,root,root) /usr/include/verilog/vpi_user.h
+%attr(-,root,root) /usr/include/verilog/acc_user.h
+%attr(-,root,root) /usr/include/verilog/veriuser.h
+%attr(-,root,root) /usr/include/verilog/_pli_types.h
 
 %changelog -n verilog
+* Tue Nov 18 2008 - steve@icarus.com
+- New snapshot 20080905
+
 * Fri Sep 03 2008 - steve@icarus.com
 - New snapshot 20080905
 
diff --git a/vvp/words.cc b/vvp/words.cc
index 1afb75338..4537e2368 100644
--- a/vvp/words.cc
+++ b/vvp/words.cc
@@ -270,8 +270,6 @@ void compile_netw_real(char*label, char*array_label, unsigned long array_addr,
                        int msb, int lsb,
                        unsigned argc, struct symb_s*argv)
 {
-      cerr << "XXXX compile_netw_real: label=" << label
-	   << ", array_label=" << array_label << endl;
       __compile_real(label, 0, array_label, array_addr,
                      msb, lsb, false, argc, argv);
 }