From 12db3340ccbc4f50a9907309629f16af6f9bf68c Mon Sep 17 00:00:00 2001
From: steve <steve>
Date: Wed, 29 Nov 2000 01:34:17 +0000
Subject: [PATCH]  Typo writing I pins to AND gates in compare.

---
 t-xnf.cc | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/t-xnf.cc b/t-xnf.cc
index 4d6b9bc20..7cc0f306c 100644
--- a/t-xnf.cc
+++ b/t-xnf.cc
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: t-xnf.cc,v 1.36 2000/11/22 21:18:20 steve Exp $"
+#ident "$Id: t-xnf.cc,v 1.37 2000/11/29 01:34:17 steve Exp $"
 #endif
 
 /* XNF BACKEND
@@ -227,8 +227,8 @@ bool target_xnf::start_design(const Design*des)
 	    ncf_.open(ncfpath.c_str());
 
       out_ << "LCANET,6" << endl;
-      out_ << "PROG,verilog,0.2PRE,\"Icarus Verilog\"" << endl;
-      ncf_ << "# Generated by Icarus Verilog 0.2PRE" << endl;
+      out_ << "PROG,verilog,$Name:  $,\"Icarus Verilog\"" << endl;
+      ncf_ << "# Generated by Icarus Verilog $Name:  $" << endl;
 
       if (des->get_flag("part") != "") {
 	    out_ << "PART," << des->get_flag("part") << endl;
@@ -615,10 +615,10 @@ void target_xnf::lpm_compare_eq_(ostream&os, const NetCompare*dev)
 	    draw_pin(os, "O", dev->pin_AEB());
 	    for (unsigned idx = 0 ;  idx < dev->width() ;  idx += 5) {
 		  if ((idx+1) == dev->width())
-			os << "    PIN, I" << idx/5 << ", I " << mname
+			os << "    PIN, I" << idx/5 << ", I, " << mname
 			   << "/bit<" << idx << ">" << endl;
 		  else
-			os << "    PIN, I" << idx/5 << ", I " << mname
+			os << "    PIN, I" << idx/5 << ", I, " << mname
 			   << "/nbit<" << idx << ">" << endl;
 	    }
 	    os << "END" << endl;
@@ -887,6 +887,9 @@ extern const struct target tgt_xnf = { "xnf", &target_xnf_obj };
 
 /*
  * $Log: t-xnf.cc,v $
+ * Revision 1.37  2000/11/29 01:34:17  steve
+ *  Typo writing I pins to AND gates in compare.
+ *
  * Revision 1.36  2000/11/22 21:18:20  steve
  *  Connect the CE if it is linked at all.
  *