From 090ae5fa568c50038f5b2aa6942023a14c018420 Mon Sep 17 00:00:00 2001
From: Nick Gasson <nick@nickg.me.uk>
Date: Fri, 8 Aug 2008 19:47:20 +0100
Subject: [PATCH] Catch case where signal with same name in task and module

This fixes task3.14C
---
 tgt-vhdl/scope.cc | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/tgt-vhdl/scope.cc b/tgt-vhdl/scope.cc
index 2b2c4e604..c52106561 100644
--- a/tgt-vhdl/scope.cc
+++ b/tgt-vhdl/scope.cc
@@ -577,6 +577,12 @@ static int draw_task(ivl_scope_t scope, ivl_scope_t parent)
       
       string signame(make_safe_name(sig));
 
+      // Check this signal isn't declared in the outer scope
+      if (ent->get_arch()->get_scope()->have_declared(signame)) {
+         signame += "_";
+         signame += taskname;
+      }
+
       vhdl_signal_decl *decl = new vhdl_signal_decl(signame.c_str(), sigtype);
 
       ostringstream ss;