12 lines
188 B
Coq
12 lines
188 B
Coq
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module muxN
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#(parameter WID = 4, parameter SWID = 2)
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(input wire [WID-1:0] D,
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input wire [SWID-1:0] S,
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output reg Q
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/* */);
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always @* Q = D[S];
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endmodule // add
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