diff --git a/docs/index.html b/docs/index.html
index 4b96aa3..e30ff1c 100644
--- a/docs/index.html
+++ b/docs/index.html
@@ -2,6 +2,7 @@
 <h1>Project IceStorm</h1>
 
 <p>
+<b>2015-07-19:</b> Released support for 8k chips. Moved IceStorm sourcecode to GitHub.<br/>
 <b>2015-05-27:</b> We have a working fully Open Source flow with <a href="http://www.clifford.at/yosys/">Yosys</a> and <a href="https://github.com/cseed/arachne-pnr">Arachne-pnr</a>! Video: <a href="http://youtu.be/yUiNlmvVOq8">http://youtu.be/yUiNlmvVOq8</a><br/>
 <b>2015-04-13:</b> Complete rewrite of IceUnpack, added IcePack, some major documentation updates<br/>
 <b>2015-03-22:</b> First public release and short YouTube video demonstrating our work: <a href="http://youtu.be/u1ZHcSNDQMM">http://youtu.be/u1ZHcSNDQMM</a>
diff --git a/icebox/icebox_html.py b/icebox/icebox_html.py
index dbd2e5d..53cbdb2 100755
--- a/icebox/icebox_html.py
+++ b/icebox/icebox_html.py
@@ -22,7 +22,9 @@ import icebox
 import getopt, sys, os, re
 
 chipname = "iCE40 HX1K"
+chipdbfile = "chipdb-1k.txt"
 outdir = None
+mode8k = False
 tx, ty = 0, 0
 
 def usage():
@@ -30,10 +32,11 @@ def usage():
     print("  -x tile_x_coordinate")
     print("  -y tile_y_coordinate")
     print("  -d outdir")
+    print("  -8")
     sys.exit(0)
 
 try:
-    opts, args = getopt.getopt(sys.argv[1:], "x:y:d:")
+    opts, args = getopt.getopt(sys.argv[1:], "x:y:d:8")
 except:
     usage()
 
@@ -44,6 +47,10 @@ for o, a in opts:
         ty = int(a)
     elif o == "-d":
         outdir = a
+    elif o == "-8":
+        mode8k = True
+        chipname = "iCE40 HX8K"
+        chipdbfile = "chipdb-8k.txt"
     else:
         usage()
 
@@ -51,29 +58,56 @@ if len(args) != 0:
     usage()
 
 ic = icebox.iceconfig()
-ic.setup_empty_1k()
 
 mktiles = set()
 
-for x in range(1, 13):
-    mktiles.add((x, 0))
-    mktiles.add((x, 17))
+if mode8k:
+    ic.setup_empty_8k()
 
-for x in range(0, 6) + range(8, 14):
-    mktiles.add((x, 1))
-    mktiles.add((x, 16))
+    for x in range(1, 3) + range(8-2, 8+3) + range(15, 19) + range(25-2, 25+3) + range(33-2, 33):
+        mktiles.add((x, 0))
+        mktiles.add((x, 33))
 
-for x in range(0, 5) + range(9, 14):
-    mktiles.add((x, 2))
-    mktiles.add((x, 15))
+    for x in range(0, 3) + range(8-1, 8+2) + range(25-1, 25+2) + range(33-2, 34):
+        mktiles.add((x, 1))
+        mktiles.add((x, 32))
 
-for y in range(7, 11):
-    mktiles.add((0, y))
-    mktiles.add((13, y))
+    for x in range(0, 2) + range(8-1, 8+2) + range(25-1, 25+2) + range(34-2, 34):
+        mktiles.add((x, 2))
+        mktiles.add((x, 31))
 
-for x in range(6, 8):
-    for y in range(8, 10):
-        mktiles.add((x, y))
+    for x in [0, 33]:
+        mktiles.add((x, 15))
+        mktiles.add((x, 16))
+        mktiles.add((x, 17))
+        mktiles.add((x, 18))
+
+    for x in [16, 17]:
+        mktiles.add((x, 16))
+        mktiles.add((x, 17))
+
+else:
+    ic.setup_empty_1k()
+
+    for x in range(1, 13):
+        mktiles.add((x, 0))
+        mktiles.add((x, 17))
+
+    for x in range(0, 6) + range(8, 14):
+        mktiles.add((x, 1))
+        mktiles.add((x, 16))
+
+    for x in range(0, 5) + range(9, 14):
+        mktiles.add((x, 2))
+        mktiles.add((x, 15))
+
+    for y in range(7, 11):
+        mktiles.add((0, y))
+        mktiles.add((13, y))
+
+    for x in range(6, 8):
+        for y in range(8, 10):
+            mktiles.add((x, y))
 
 expand_count=[0]
 
@@ -96,7 +130,7 @@ def print_index():
 and providing simple tools for analyzing and creating bitstream files. This is work in progress.</i>""")
 
     print("""<p>This documentation is auto-generated by <tt>icebox_html.py</tt> from IceBox.<br/>
-A machine-readable form of the database can be downloaded <a href="chipdb.txt">here</a>.</p>""")
+A machine-readable form of the database can be downloaded <a href="%s">here</a>.</p>""" % chipdbfile)
 
     print("""<p>The iCE40 FPGA fabric is organized into tiles. The configuration bits
 themself have the same meaning in all tiles of the same type. But the way the tiles
@@ -112,7 +146,12 @@ in iCE40 FPGAs.</p>""")
     for y in range(ic.max_y, -1, -1):
         print("<tr>")
         for x in range(ic.max_x + 1):
-            print('<td style="width:50px; height:50px;" align="center" valign="center"', end="")
+            if mode8k:
+                fontsize="8px"
+                print('<td style="width:25px; height:20px;" align="center" valign="center"', end="")
+            else:
+                fontsize="10px"
+                print('<td style="width:40px; height:40px;" align="center" valign="center"', end="")
             if ic.tile_pos(x, y) == None:
                 print('>&nbsp;</td>')
             elif (x, y) in mktiles:
@@ -120,13 +159,13 @@ in iCE40 FPGAs.</p>""")
                 if ic.tile_type(x, y) == "LOGIC": color = "#eae"
                 if ic.tile_type(x, y) == "RAMB": color = "#eea"
                 if ic.tile_type(x, y) == "RAMT": color = "#eea"
-                print('bgcolor="%s"><small><a style="color:#000; text-decoration:none" href="tile_%d_%d.html"><b>%s<br/>(%d %d)</b></a></small></td>' % (color, x, y, ic.tile_type(x, y), x, y))
+                print('bgcolor="%s"><span style="font-size:%s"><a style="color:#000; text-decoration:none" href="tile_%d_%d.html"><b>%s<br/>(%d %d)</b></a></span></td>' % (color, fontsize, x, y, ic.tile_type(x, y), x, y))
             else:
                 if ic.tile_type(x, y) == "IO": color = "#8aa"
                 if ic.tile_type(x, y) == "LOGIC": color = "#a8a"
                 if ic.tile_type(x, y) == "RAMB": color = "#aa8"
                 if ic.tile_type(x, y) == "RAMT": color = "#aa8"
-                print('bgcolor="%s"><small>%s<br/>(%d %d)</small></td>' % (color, ic.tile_type(x, y), x, y))
+                print('bgcolor="%s"><span style="font-size:%s">%s<br/>(%d %d)</span></td>' % (color, fontsize, ic.tile_type(x, y), x, y))
         print("</tr>")
     print("</table></p>")
 
@@ -526,8 +565,8 @@ if outdir is not None:
                 sys.stdout = open("%s/tile_%d_%d.html" % (outdir, x, y), "w")
                 print_tile(x, y)
 
-    print("Writing %s/chipdb.txt..." % outdir, file=stdout)
-    os.system("python icebox_chipdb.py > %s/chipdb.txt" % outdir)
+    print("Writing %s/%s..." % (outdir, chipdbfile), file=stdout)
+    os.system("python icebox_chipdb.py > %s/%s" % (outdir, chipdbfile))
 
     sys.stdout = stdout