diff --git a/docs/index.html b/docs/index.html
index caf7152..15bbebe 100644
--- a/docs/index.html
+++ b/docs/index.html
@@ -29,8 +29,15 @@
 <p>
 Project IceStorm aims at reverse engineering and documenting the bitstream
 format of Lattice iCE40 FPGAs and providing simple tools for analyzing and
-creating bitstream files. The focus of the project is on the iCE40 1K and
-8K chips. (Most of the work was done on HX1K-TQ144 and HX8K-CT256 parts.)
+creating bitstream files. The IceStorm flow (<a
+href="http://www.clifford.at/yosys/">Yosys</a>, <a
+href="https://github.com/cseed/arachne-pnr">Arachne-pnr</a>, and IceStorm) is a
+fully open source Verilog-to-Bitstream flow for iCE40 FPGAs.
+</p>
+
+<p>
+The focus of the project is on the iCE40 LP/HX 1K/4K/8K chips. (Most of the
+work was done on HX1K-TQ144 and HX8K-CT256 parts.)
 </p>
 
 <h2>Why the Lattice iCE40?</h2>
@@ -232,7 +239,7 @@ create an IceStorm ASCII file for the placed and routed design.
 </p>
 
 <p>
-<i>The IcePack/IceUnpack, IceBox, and IceProg are written by Clifford Wolf. IcePack/IceUnpack is based on a reference implementation provided by Mathias Lasser. IceMulti is written by Marcus Comstedt.</i>
+<i>IcePack/IceUnpack, IceBox, IceProg, IceTime, and IcePLL are written by Clifford Wolf. IcePack/IceUnpack is based on a reference implementation provided by Mathias Lasser. IceMulti is written by Marcus Comstedt.</i>
 </p>
 
 <h2>Where do I get support or meet other IceStorm users?</h2>