-Project IceStorm aims at documenting the bitstream format of Lattice iCE40 -FPGAs and providing simple tools for analyzing and creating bitstream files. -At the moment the focus of the project is on the HX1K-TQ144 and HX8K-CT256 -devices, but most of the information is device-independent. +Project IceStorm aims at reverse engineering and documenting the bitstream +format of Lattice iCE40 FPGAs and providing simple tools for analyzing and +creating bitstream files. At the moment the focus of the project is on the +HX1K-TQ144 and HX8K-CT256 devices, but most of the information is +device-independent.
-We have enough bits mapped that we can create a functional Verilog model for almost all -bitstreams generated by Lattice iCEcube2 for the iCE40 HX1K-TQ144 and the iCE40 HX8K-CT256. +We have enough bits mapped that we can create a functional Verilog model for +almost all bitstreams generated by Lattice iCEcube2 for the iCE40 HX1K-TQ144 +and the iCE40 HX8K-CT256, and can create bitstreams for this parts using our +own tool-chain. +
+ ++The next milestones for the project are timing analysis and support for more +parts from the iCE40 family.