From 7bf910315b307b76aeae6e3f6a99a2d9d8453b07 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sat, 3 Jan 2026 06:02:59 -0800 Subject: [PATCH] Changing interface of several commands. --- src/base/abci/abc.c | 127 ++++++++++++++++++++++++++------------- src/base/main/mainReal.c | 2 +- src/base/wln/wlnCom.c | 23 +++++-- 3 files changed, 105 insertions(+), 47 deletions(-) diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 4eee95227..ba15d37e0 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -42495,6 +42495,71 @@ usage: return 1; } +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +static Gia_Man_t * Abc_ReadAigerOrVerilogFile( char * pFileName, char * pTopModule, int * pAbc_ReadAigerOrVerilogFileStatus ) +{ + FILE * pFile; + Gia_Man_t * pGia; + char * pTemp; + int fVerilog, fSystemVerilog; + + *pAbc_ReadAigerOrVerilogFileStatus = 0; + if ( pFileName == NULL ) + return NULL; + + // fix the wrong symbol + for ( pTemp = pFileName; *pTemp; pTemp++ ) + if ( *pTemp == '>' ) + *pTemp = '\\'; + if ( (pFile = fopen( pFileName, "r" )) == NULL ) + { + Abc_Print( -1, "Cannot open input file \"%s\". ", pFileName ); + if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".aig", NULL, NULL, NULL, NULL )) ) + Abc_Print( 1, "Did you mean \"%s\"?", pFileName ); + Abc_Print( 1, "\n" ); + *pAbc_ReadAigerOrVerilogFileStatus = 1; + return NULL; + } + fclose( pFile ); + + fSystemVerilog = Extra_FileIsType( pFileName, ".sv", NULL, NULL ); + fVerilog = fSystemVerilog || Extra_FileIsType( pFileName, ".v", NULL, NULL ); + if ( fVerilog ) + { + char pCommand[2000]; + int RetValue; + snprintf( pCommand, sizeof(pCommand), + "yosys -qp \"read_verilog %s%s; hierarchy %s%s; flatten; proc; opt; async2sync; opt; setundef -undriven -zero; techmap; memory -nomap; memory_map; dffunmap; opt_clean; opt_expr; aigmap; write_aiger -symbols _temp_.aig\"", + fSystemVerilog ? "-sv " : "", pFileName, pTopModule ? "-top " : "-auto-top", pTopModule ? pTopModule : "" ); +#if defined(__wasm) + RetValue = 1; +#else + RetValue = system( pCommand ); +#endif + if ( RetValue != 0 ) + { + Abc_Print( -1, "Yosys command failed: \"%s\".\n", pCommand ); + return NULL; + } + pFileName = "_temp_.aig"; + } + + pGia = Gia_AigerRead( pFileName, 0, 0, 0 ); + if ( pGia == NULL ) + Abc_Print( -1, "Reading AIGER from file \"%s\" has failed.\n", pFileName ); + return pGia; +} + /**Function************************************************************* Synopsis [] @@ -42510,13 +42575,13 @@ int Abc_CommandAbc9Cec( Abc_Frame_t * pAbc, int argc, char ** argv ) { extern void Cec_ManPrintCexSummary( Gia_Man_t * p, Abc_Cex_t * pCex, Cec_ParCec_t * pPars ); Cec_ParCec_t ParsCec, * pPars = &ParsCec; - FILE * pFile; Gia_Man_t * pGias[2] = {NULL, NULL}, * pMiter; - char ** pArgvNew; + char ** pArgvNew, * pTopModule = NULL; int c, nArgcNew, fUseSim = 0, fUseNewX = 0, fUseNewY = 0, fMiter = 0, fDualOutput = 0, fDumpMiter = 0, fSavedSpec = 0; + int Abc_ReadAigerOrVerilogFileStatus = 0; Cec_ManCecSetDefaultParams( pPars ); Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "CTnmdbasxytvwh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "CTMnmdbasxytvwh" ) ) != EOF ) { switch ( c ) { @@ -42542,6 +42607,15 @@ int Abc_CommandAbc9Cec( Abc_Frame_t * pAbc, int argc, char ** argv ) if ( pPars->TimeLimit < 0 ) goto usage; break; + case 'M': + if ( globalUtilOptind >= argc ) + { + Abc_Print( -1, "Command line switch \"-M\" should be followed by a file name.\n" ); + goto usage; + } + pTopModule = argv[globalUtilOptind]; + globalUtilOptind++; + break; case 'n': pPars->fNaive ^= 1; break; @@ -42659,29 +42733,13 @@ int Abc_CommandAbc9Cec( Abc_Frame_t * pAbc, int argc, char ** argv ) } if ( nArgcNew == 2 ) { - char * pFileNames[2] = { pArgvNew[0], pArgvNew[1] }, * pTemp; + char * pFileNames[2] = { pArgvNew[0], pArgvNew[1] }; int n; for ( n = 0; n < 2; n++ ) { - // fix the wrong symbol - for ( pTemp = pFileNames[n]; *pTemp; pTemp++ ) - if ( *pTemp == '>' ) - *pTemp = '\\'; - if ( (pFile = fopen( pFileNames[n], "r" )) == NULL ) - { - Abc_Print( -1, "Cannot open input file \"%s\". ", pFileNames[n] ); - if ( (pFileNames[n] = Extra_FileGetSimilarName( pFileNames[n], ".aig", NULL, NULL, NULL, NULL )) ) - Abc_Print( 1, "Did you mean \"%s\"?", pFileNames[n] ); - Abc_Print( 1, "\n" ); - return 1; - } - fclose( pFile ); - pGias[n] = Gia_AigerRead( pFileNames[n], 0, 0, 0 ); + pGias[n] = Abc_ReadAigerOrVerilogFile( pFileNames[n], pTopModule, &Abc_ReadAigerOrVerilogFileStatus ); if ( pGias[n] == NULL ) - { - Abc_Print( -1, "Reading AIGER from file \"%s\" has failed.\n", pFileNames[n] ); - return 0; - } + return Abc_ReadAigerOrVerilogFileStatus; } } else if ( fSavedSpec ) @@ -42696,7 +42754,7 @@ int Abc_CommandAbc9Cec( Abc_Frame_t * pAbc, int argc, char ** argv ) } else { - char * FileName, * pTemp; + char * FileName; if ( pAbc->pGia == NULL ) { Abc_Print( -1, "Abc_CommandAbc9Cec(): There is no current AIG.\n" ); @@ -42715,25 +42773,9 @@ int Abc_CommandAbc9Cec( Abc_Frame_t * pAbc, int argc, char ** argv ) } FileName = pAbc->pGia->pSpec; } - // fix the wrong symbol - for ( pTemp = FileName; *pTemp; pTemp++ ) - if ( *pTemp == '>' ) - *pTemp = '\\'; - if ( (pFile = fopen( FileName, "r" )) == NULL ) - { - Abc_Print( -1, "Cannot open input file \"%s\". ", FileName ); - if ( (FileName = Extra_FileGetSimilarName( FileName, ".aig", NULL, NULL, NULL, NULL )) ) - Abc_Print( 1, "Did you mean \"%s\"?", FileName ); - Abc_Print( 1, "\n" ); - return 1; - } - fclose( pFile ); - pGias[1] = Gia_AigerRead( FileName, 0, 0, 0 ); + pGias[1] = Abc_ReadAigerOrVerilogFile( FileName, pTopModule, &Abc_ReadAigerOrVerilogFileStatus ); if ( pGias[1] == NULL ) - { - Abc_Print( -1, "Reading AIGER has failed.\n" ); - return 0; - } + return Abc_ReadAigerOrVerilogFileStatus; } pPars->pNameSpec = pGias[0] ? (pGias[0]->pSpec ? pGias[0]->pSpec : pGias[0]->pName) : NULL; pPars->pNameImpl = pGias[1] ? (pGias[1]->pSpec ? pGias[1]->pSpec : pGias[1]->pName) : NULL; @@ -42843,10 +42885,11 @@ int Abc_CommandAbc9Cec( Abc_Frame_t * pAbc, int argc, char ** argv ) return 0; usage: - Abc_Print( -2, "usage: &cec [-CT num] [-nmdbasxytvwh]\n" ); + Abc_Print( -2, "usage: &cec [-CT num] [-M str] [-nmdbasxytvwh]\n" ); Abc_Print( -2, "\t new combinational equivalence checker\n" ); Abc_Print( -2, "\t-C num : the max number of conflicts at a node [default = %d]\n", pPars->nBTLimit ); Abc_Print( -2, "\t-T num : approximate runtime limit in seconds [default = %d]\n", pPars->TimeLimit ); + Abc_Print( -2, "\t-M str : top module name if Verilog file(s) are used [default = %d]\n", pPars->TimeLimit ); Abc_Print( -2, "\t-n : toggle using naive SAT-based checking [default = %s]\n", pPars->fNaive? "yes":"no"); Abc_Print( -2, "\t-m : toggle miter vs. two circuits [default = %s]\n", fMiter? "miter":"two circuits"); Abc_Print( -2, "\t-d : toggle using dual output miter [default = %s]\n", fDualOutput? "yes":"no"); diff --git a/src/base/main/mainReal.c b/src/base/main/mainReal.c index b838824ba..3c5d67b3f 100644 --- a/src/base/main/mainReal.c +++ b/src/base/main/mainReal.c @@ -293,7 +293,7 @@ int Abc_RealMain( int argc, char * argv[] ) pAbc->pGia = Gia_ManFromBridge( stdin, NULL ); } else if ( fBatch!=INTERACTIVE && fBatch!=BATCH_QUIET && fBatch!=BATCH_QUIET_THEN_INTERACTIVE && Vec_StrSize(sCommandUsr)>0 ) - Abc_Print( 1, "\n======== ABC command line \"%s\"\n", Vec_StrArray(sCommandUsr) ); + Abc_Print( 1, "======== ABC command line \"%s\"\n", Vec_StrArray(sCommandUsr) ); if ( fBatch!=INTERACTIVE ) { diff --git a/src/base/wln/wlnCom.c b/src/base/wln/wlnCom.c index 6ba90a804..1b76fab8f 100644 --- a/src/base/wln/wlnCom.c +++ b/src/base/wln/wlnCom.c @@ -102,6 +102,7 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv ) char * pDefines = NULL; char * pLibrary = NULL; int fBlast = 0; + int fDontBlast = 0; int fInvert = 0; int fTechMap = 1; int fLibInDir = 0; @@ -110,7 +111,7 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv ) int fSetUndef = 0; int c, fVerbose = 0; Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "TDLbisumlcvh" ) ) != EOF ) + while ( ( c = Extra_UtilGetopt( argc, argv, "TMDLbdisumlcvh" ) ) != EOF ) { switch ( c ) { @@ -123,6 +124,15 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv ) pTopModule = argv[globalUtilOptind]; globalUtilOptind++; break; + case 'M': + if ( globalUtilOptind >= argc ) + { + Abc_Print( -1, "Command line switch \"-M\" should be followed by a file name.\n" ); + goto usage; + } + pTopModule = argv[globalUtilOptind]; + globalUtilOptind++; + break; case 'D': if ( globalUtilOptind >= argc ) { @@ -144,6 +154,9 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv ) case 'b': fBlast ^= 1; break; + case 'd': + fDontBlast ^= 1; + break; case 'i': fInvert ^= 1; break; @@ -203,7 +216,7 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv ) } Abc_FrameReplaceCurrentNetwork( pAbc, pNtk ); } - else if ( fBlast ) + else if ( !fDontBlast ) { Gia_Man_t * pNew = NULL; if ( !strcmp( Extra_FileNameExtension(pFileName), "v" ) ) @@ -237,12 +250,14 @@ int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv ) } return 0; usage: - Abc_Print( -2, "usage: %%yosys [-T ] [-D ] [-L ] [-bisumlcvh] \n" ); + Abc_Print( -2, "usage: %%yosys [-TM ] [-D ] [-L ] [-bdisumlcvh] \n" ); Abc_Print( -2, "\t reads Verilog or SystemVerilog using Yosys\n" ); Abc_Print( -2, "\t-T : specify the top module name (default uses \"-auto-top\")\n" ); + Abc_Print( -2, "\t-M : specify the top module name (default uses \"-auto-top\") (equivalent to \"-T\")\n" ); Abc_Print( -2, "\t-D : specify defines to be used by Yosys (default \"not used\")\n" ); Abc_Print( -2, "\t-L : specify the Liberty library to read a mapped design (default \"not used\")\n" ); - Abc_Print( -2, "\t-b : toggle bit-blasting the design into an AIG using Yosys [default = %s]\n", fBlast? "yes": "no" ); + Abc_Print( -2, "\t-b : toggle bit-blasting the design into an AIG using Yosys (this switch has no effect)\n" ); + Abc_Print( -2, "\t-d : toggle bit-blasting the design into an AIG using Yosys [default = %s]\n", !fDontBlast? "yes": "no" ); Abc_Print( -2, "\t-i : toggle inverting the outputs (useful for miters) [default = %s]\n", fInvert? "yes": "no" ); Abc_Print( -2, "\t-s : toggle no structural hashing during bit-blasting [default = %s]\n", fSkipStrash? "no strash": "strash" ); Abc_Print( -2, "\t-m : toggle using \"techmap\" to blast operators [default = %s]\n", fTechMap? "yes": "no" );