diff --git a/User-Documentation.md b/User-Documentation.md
index c7760ac..2ecf5a2 100644
--- a/User-Documentation.md
+++ b/User-Documentation.md
@@ -177,4 +177,5 @@ The summary under `TEST CALIBRATION` are the results from the **internal** read/
 
 This will run the DDR3 controller at 333 MHz (3 ns clock period) which is the [maximum clock period for Arty-S7](https://digilent.com/reference/programmable-logic/arty-s7/reference-manual). Upload the bitstream to Arty-S7, after around 2 seconds the 4 LEDS should light up.
 
+- The [10Gb Ethernet Switch](https://github.com/ZipCPU/eth10g) project utilizes this DDR3 controller for accessing a single-rank DDR3 module (8 lanes of x8 DDR3).