################################################################################
##
## Filename:	Makefile
## {{{
## Project:	10Gb Ethernet switch
##
## Purpose:
##
## Creator:	Dan Gisselquist, Ph.D.
##		Gisselquist Technology, LLC
##
################################################################################
## }}}
## Copyright (C) 2023, Gisselquist Technology, LLC
## {{{
## This file is part of the ETH10G project.
##
## The ETH10G project contains free software and gateware, licensed under the
## Apache License, Version 2.0 (the "License").  You may not use this project,
## or this file, except in compliance with the License.  You may obtain a copy
## of the License at
## }}}
##	http://www.apache.org/licenses/LICENSE-2.0
## {{{
## Unless required by applicable law or agreed to in writing, files
## distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
## WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
## License for the specific language governing permissions and limitations
## under the License.
##
################################################################################
##
## }}}
all:	test design.h
YYMMDD=`date +%Y%m%d`
CXX   := g++
FBDIR := .
VDIRFB:= $(FBDIR)/obj_dir
VOBJ  := obj_dir
CPUDR := cpu
BASE  := main

.DELETE_ON_ERROR:
.PHONY: test
test: $(VOBJ)/V$(BASE)__ALL.a
SUBMAKE := $(MAKE) --no-print-directory -C $(VOBJ) -f
ifeq ($(VERILATOR_ROOT),)
VERILATOR := verilator
else
VERILATOR := $(VERILATOR_ROOT)/bin/verilator
endif
VFLAGS = -Wall -Wno-TIMESCALEMOD -Wno-SYNCASYNCNET --MMD -O3 --trace -Mdir $(VDIRFB) $(AUTOVDIRS) -y wb2axip -cc

-include make.inc

.PHONY: main
main: $(VOBJ)/Vmain__ALL.a

## Generic pattern(s)
## {{{
$(VOBJ)/V$(BASE)__ALL.a: $(VOBJ)/V$(BASE).h
$(VOBJ)/V$(BASE).mk:  $(VOBJ)/V$(BASE).cpp
$(VOBJ)/V$(BASE).cpp: $(VOBJ)/V$(BASE).h
builddate.v $(VOBJ)/V$(BASE).h: $(VFLIST)
	perl ../mkdatev.pl > builddate.v
	cp builddate.v ../$(YYMMDD)-build.v
	$(VERILATOR) $(VFLAGS) $(BASE).v
## }}}

$(VOBJ)/V%__ALL.a: $(VOBJ)/V%.mk
	+$(SUBMAKE) V$*.mk

$(VOBJ)/V%.h: $(FBDIR)/%.v
	$(VERILATOR) $(VFLAGS) $*.v

$(VOBJ)/V%.cpp: $(VOBJ)/V%.h
$(VOBJ)/V%.mk:  $(VOBJ)/V%.h
$(VOBJ)/V%.h: $(FBDIR)/%.v

## .PHONY: design.h isn't phony
## {{{
design.h: main.v builddate.v
	@echo "Building design.h"
	@echo "// " > $@
	@echo "// Do not edit this file, it is automatically generated!" >> $@
	@echo "// To generate this file, \"make design.h\" in the rtl directory." >> $@
	@echo "// " >> $@
	@echo "#ifndef DESIGN_H" >> $@
	@echo "#define DESIGN_H" >> $@
	@echo >> $@
	@grep "^\`" main.v | grep -v default_nettype		\
		| grep -v include				\
		| grep -v timescale				\
		| sed -e '{ s/^`/#/ }'				\
		| sed -e ' s/^#elsif/#elif/'			\
		| sed -e ' s/main.v/design.h/' >> $@
	@echo >> $@
	@grep "^\`" builddate.v | grep -v default_nettype	\
		| grep -v include				\
		| grep -v timescale				\
		| sed -e '{ s/^`/#/ }'				\
		| sed -e ' s/^#elsif/#elif/'			\
		| sed -e " s/32.h/0x/"				\
		| sed -e ' s/^\/\/.*$$//' >> $@
	@echo >> $@
	@echo "#endif // DESIGN_H" >> $@
## }}}

.PHONY: archive
## {{{
archive:
	tar --transform s,^,$(YYMMDD)-rtl/, -chjf $(YYMMDD)-rtl.tjz Makefile *.v cpu/*.v
## }}}

.PHONY: clean
## {{{
clean:
	rm -rf $(VDIRFB)/*.mk
	rm -rf $(VDIRFB)/*.cpp
	rm -rf $(VDIRFB)/*.h
	rm -rf $(VDIRFB)/
	rm -rf $(VOBJ)/ design.h
## }}}

#
# Note Verilator's dependency created information, and include it here if we
# can
DEPS := $(wildcard $(VOBJ)/*.d)
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(DEPS),)
include $(DEPS)
endif
endif