diff --git a/ddr3_dimm_micron_sim_behav.wcfg b/ddr3_dimm_micron_sim_behav.wcfg
index a747b74..2bd5231 100644
--- a/ddr3_dimm_micron_sim_behav.wcfg
+++ b/ddr3_dimm_micron_sim_behav.wcfg
@@ -11,15 +11,15 @@
-
-
-
+
+
+
-
-
+
+
-
+
Model File
label
@@ -87,6 +87,11 @@
odt
odt
+
+ command_used[63:0]
+ command_used[63:0]
+ ASCIIRADIX
+
cs_n
cs_n
@@ -145,6 +150,50 @@
o_ddr3_clk_n
o_ddr3_clk_n
+
+ Bank Track
+ label
+
+
+ delay_before_read_counter_q[7:0][3:0]
+ delay_before_read_counter_q[7:0][3:0]
+
+
+ delay_before_precharge_counter_q[7:0][3:0]
+ delay_before_precharge_counter_q[7:0][3:0]
+
+
+ delay_before_activate_counter_q[7:0][3:0]
+ delay_before_activate_counter_q[7:0][3:0]
+
+
+ delay_before_write_counter_q[7:0][3:0]
+ delay_before_write_counter_q[7:0][3:0]
+
+
+ bank_status_q[7:0]
+ bank_status_q[7:0]
+
+
+ bank_active_row_q[7:0][13:0]
+ bank_active_row_q[7:0][13:0]
+
+
+ stage1_pending
+ stage1_pending
+
+
+ stage2_pending
+ stage2_pending
+
+
+ stage1_we
+ stage1_we
+
+
+ stage2_we
+ stage2_we
+
DDR3 Controller
label