diff --git a/testbench/ddr3.sv b/testbench/ddr3.sv
index d5e3c16..c6f1fba 100644
--- a/testbench/ddr3.sv
+++ b/testbench/ddr3.sv
@@ -138,7 +138,7 @@ module ddr3 (
     parameter feature_truebl4 = 0;
     parameter feature_odt_hi = 0;
     parameter PERTCKAVG=TDLLK;
-    parameter FLY_BY_DELAY = 1600, DQ_DELAY = 0;
+    parameter FLY_BY_DELAY = 0, DQ_DELAY = 0;
     
     // text macros
     `define DQ_PER_DQS DQ_BITS/DQS_BITS