PASS: basic setup
PASS: sta_crpr_enabled = 1
PASS: sta_crpr_enabled = 0
PASS: sta_crpr_enabled re-enabled
PASS: sta_crpr_mode = same_pin
PASS: sta_crpr_mode = same_transition
PASS: read sta_crpr_mode = same_transition
PASS: sta_cond_default_arcs_enabled = 1
PASS: sta_cond_default_arcs_enabled = 0
PASS: read sta_cond_default_arcs_enabled = 0
PASS: sta_gated_clock_checks_enabled = 1
PASS: sta_gated_clock_checks_enabled = 0
PASS: read sta_gated_clock_checks_enabled = 0
PASS: sta_internal_bidirect_instance_paths_enabled = 1
PASS: sta_internal_bidirect_instance_paths_enabled = 0
PASS: read sta_internal_bidirect_instance_paths_enabled = 0
PASS: sta_bidirect_net_paths_enabled = 1
PASS: sta_bidirect_net_paths_enabled = 0
PASS: read sta_bidirect_net_paths_enabled = 0
PASS: sta_clock_through_tristate_enabled = 1
PASS: sta_clock_through_tristate_enabled = 0
PASS: read sta_clock_through_tristate_enabled = 0
PASS: sta_preset_clear_arcs_enabled = 1
PASS: sta_preset_clear_arcs_enabled = 0
PASS: read sta_preset_clear_arcs_enabled = 0
PASS: sta_recovery_removal_checks_enabled = 1
PASS: sta_recovery_removal_checks_enabled = 0
PASS: read sta_recovery_removal_checks_enabled = 0
PASS: sta_dynamic_loop_breaking = 1
PASS: sta_dynamic_loop_breaking = 0
PASS: read sta_dynamic_loop_breaking = 0
PASS: sta_input_port_default_clock = 1
PASS: sta_input_port_default_clock = 0
PASS: read sta_input_port_default_clock = 0
PASS: sta_propagate_all_clocks = 1
PASS: sta_propagate_all_clocks = 0
PASS: read sta_propagate_all_clocks = 0
PASS: sta_propagate_gated_clock_enable = 1
PASS: sta_propagate_gated_clock_enable = 0
PASS: read sta_propagate_gated_clock_enable = 0
PASS: pocv test completed (may skip if SSTA not compiled)
PASS: sta_report_default_digits = 4
PASS: sta_report_default_digits = 2 (restored)
No paths found.
PASS: final report_checks
ALL PASSED