Warning 415: sdc_write_disabled_groups.tcl line 1, set_clock_sense is deprecated as of SDC 2.1. Use set_sense -type clock.
Warning 415: sdc_write_disabled_groups.tcl line 1, set_clock_sense is deprecated as of SDC 2.1. Use set_sense -type clock.
Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
Endpoint: out1 (output port clocked by clk1)
Path Group: grp_reg
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock clk1 (rise edge)
   0.50    0.50   clock network delay (propagated)
   0.00    0.50 ^ reg2/CK (DFF_X1)
   0.08    0.58 ^ reg2/Q (DFF_X1)
   0.00    0.58 ^ out1 (out)
           0.58   data arrival time

  10.00   10.00   clock clk1 (rise edge)
   0.30   10.30   clock network delay (propagated)
   0.00   10.30   clock reconvergence pessimism
  -3.00    7.30   output external delay
           7.30   data required time
---------------------------------------------------------
           7.30   data required time
          -0.58   data arrival time
---------------------------------------------------------
           6.72   slack (MET)


Startpoint: in3 (input port clocked by clk2)
Endpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
Path Group: clk1
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock clk2 (rise edge)
   0.00    0.00   clock network delay (ideal)
   2.00    2.00 v input external delay
   0.00    2.00 v in3 (in)
   0.05    2.05 v or1/ZN (OR2_X1)
   0.03    2.08 ^ nor1/ZN (NOR2_X1)
   0.00    2.08 ^ reg2/D (DFF_X1)
           2.08   data arrival time

  10.00   10.00   clock clk1 (rise edge)
   0.30   10.30   clock network delay (propagated)
  -0.28   10.02   inter-clock uncertainty
   0.00   10.02   clock reconvergence pessimism
          10.02 ^ reg2/CK (DFF_X1)
  -0.03    9.99   library setup time
           9.99   data required time
---------------------------------------------------------
           9.99   data required time
          -2.08   data arrival time
---------------------------------------------------------
           7.91   slack (MET)


Startpoint: reg3 (rising edge-triggered flip-flop clocked by clk2)
Endpoint: out2 (output port clocked by clk2)
Path Group: clk2
Path Type: max

  Delay    Time   Description
---------------------------------------------------------
   0.00    0.00   clock clk2 (rise edge)
   0.00    0.00   clock network delay (propagated)
   0.00    0.00 ^ reg3/CK (DFF_X1)
   0.08    0.08 ^ reg3/Q (DFF_X1)
   0.00    0.08 ^ out2 (out)
           0.08   data arrival time

  20.00   20.00   clock clk2 (rise edge)
   0.00   20.00   clock network delay (ideal)
   0.00   20.00   clock reconvergence pessimism
  -3.00   17.00   output external delay
          17.00   data required time
---------------------------------------------------------
          17.00   data required time
          -0.08   data arrival time
---------------------------------------------------------
          16.92   slack (MET)