// OpenSTA, Static Timing Analyzer // Copyright (c) 2024, Parallax Software, Inc. // // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation, either version 3 of the License, or // (at your option) any later version. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program. If not, see . #pragma once #include "Map.hh" #include "Set.hh" #include "Vector.hh" #include "LibertyClass.hh" #include "NetworkClass.hh" #include "MinMaxValues.hh" #include "PinPair.hh" namespace sta { class Sdc; class Clock; class ClockEdge; class CycleAccting; class InputDelay; class OutputDelay; class FalsePath; class PathDelay; class MultiCyclePath; class FilterPath; class GroupPath; class ExceptionFromTo; class ExceptionFrom; class ExceptionThru; class ExceptionTo; class ExceptionPt; class InputDrive; class MinMax; class MinMaxAll; class RiseFallMinMax; class DisabledInstancePorts; class DisabledCellPorts; class ExceptionPath; class DataCheck; class Wireload; class ClockLatency; class ClockInsertion; class ClockGroups; class PortDelay; enum class AnalysisType { single, bc_wc, ocv }; enum class ExceptionPathType { false_path, loop, multi_cycle, path_delay, group_path, filter, any}; enum class ClockSense { positive, negative, stop }; typedef std::pair ClockPair; class ClockIndexLess { public: bool operator()(const Clock *clk1, const Clock *clk2) const; }; typedef Vector FloatSeq; typedef Vector IntSeq; typedef Vector ClockSeq; typedef std::vector ConstClockSeq; typedef Set ClockSet; typedef std::set ConstClockSet; typedef ClockSet ClockGroup; typedef Vector PinSetSeq; typedef MinMax SetupHold; typedef MinMaxAll SetupHoldAll; typedef Vector ExceptionThruSeq; typedef Set LibertyPortPairSet; typedef Map DisabledInstancePortsMap; typedef Map DisabledCellPortsMap; typedef MinMaxValues ClockUncertainties; typedef Set ExceptionPathSet; typedef PinPair EdgePins; typedef PinPairSet EdgePinsSet; typedef Map LogicValueMap; class ClockSetLess { public: bool operator()(const ClockSet *set1, const ClockSet *set2) const; }; typedef Set ClockGroupSet; // For Search. class ExceptionState; class ExceptionStateLess { public: bool operator()(const ExceptionState *state1, const ExceptionState *state2) const; }; class ExceptionPath; typedef Set ExceptionStateSet; enum class CrprMode { same_pin, same_transition }; // Constraint applies to clock or data paths. enum class PathClkOrData { clk, data }; const int path_clk_or_data_count = 2; enum class TimingDerateType { cell_delay, cell_check, net_delay }; constexpr int timing_derate_type_count = 3; enum class TimingDerateCellType { cell_delay, cell_check }; constexpr int timing_derate_cell_type_count = 2; } // namespace