From fe70638d8336d686564dda2c910d2dbad273c9fe Mon Sep 17 00:00:00 2001 From: James Cherry Date: Thu, 25 Jan 2024 13:20:24 -0700 Subject: [PATCH] ParallelDelayCalc for 1 drvr Signed-off-by: James Cherry --- dcalc/ParallelDelayCalc.cc | 19 +++++++++++++++++++ dcalc/ParallelDelayCalc.hh | 5 +++++ 2 files changed, 24 insertions(+) diff --git a/dcalc/ParallelDelayCalc.cc b/dcalc/ParallelDelayCalc.cc index 24f043b2..27522150 100644 --- a/dcalc/ParallelDelayCalc.cc +++ b/dcalc/ParallelDelayCalc.cc @@ -36,6 +36,25 @@ ParallelDelayCalc::gateDelays(ArcDcalcArgSeq &dcalc_args, float load_cap, const LoadPinIndexMap &load_pin_index_map, const DcalcAnalysisPt *dcalc_ap) +{ + if (dcalc_args.size() == 1) { + ArcDcalcArg &dcalc_arg = dcalc_args[0]; + ArcDcalcResult dcalc_result = gateDelay(dcalc_arg.drvrPin(), dcalc_arg.arc(), + dcalc_arg.inSlew(), + load_cap, dcalc_arg.parasitic(), + load_pin_index_map, dcalc_ap); + ArcDcalcResultSeq dcalc_results; + dcalc_results.push_back(dcalc_result); + return dcalc_results; + } + return gateDelaysParallel(dcalc_args, load_cap, load_pin_index_map, dcalc_ap); +} + +ArcDcalcResultSeq +ParallelDelayCalc::gateDelaysParallel(ArcDcalcArgSeq &dcalc_args, + float load_cap, + const LoadPinIndexMap &load_pin_index_map, + const DcalcAnalysisPt *dcalc_ap) { size_t drvr_count = dcalc_args.size(); ArcDcalcResultSeq dcalc_results(drvr_count); diff --git a/dcalc/ParallelDelayCalc.hh b/dcalc/ParallelDelayCalc.hh index b5ca9640..7f361218 100644 --- a/dcalc/ParallelDelayCalc.hh +++ b/dcalc/ParallelDelayCalc.hh @@ -32,6 +32,11 @@ public: float load_cap, const LoadPinIndexMap &load_pin_index_map, const DcalcAnalysisPt *dcalc_ap) override; +protected: + ArcDcalcResultSeq gateDelaysParallel(ArcDcalcArgSeq &dcalc_args, + float load_cap, + const LoadPinIndexMap &load_pin_index_map, + const DcalcAnalysisPt *dcalc_ap); }; } // namespace