From fdba9eb279ae353abc16ff9be62d2097f6235182 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Wed, 23 Nov 2022 22:17:07 -0800 Subject: [PATCH] power activity thru regs caps at 1/clk_period Signed-off-by: James Cherry --- include/sta/PowerClass.hh | 2 ++ power/Power.cc | 21 ++++++++++++++++++--- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/include/sta/PowerClass.hh b/include/sta/PowerClass.hh index 3482b9f0..dbfeb168 100644 --- a/include/sta/PowerClass.hh +++ b/include/sta/PowerClass.hh @@ -38,7 +38,9 @@ public: float duty, PwrActivityOrigin origin); float activity() const { return activity_; } + void setActivity(float activity); float duty() const { return duty_; } + void setDuty(float duty); PwrActivityOrigin origin() { return origin_; } const char *originName() const; void set(float activity, diff --git a/power/Power.cc b/power/Power.cc index 0144ea3d..5a7e62e3 100644 --- a/power/Power.cc +++ b/power/Power.cc @@ -572,10 +572,13 @@ Power::seedRegOutputActivities(const Instance *reg, const Pin *out_pin = network_->findPin(reg, output); if (!hasUserActivity(out_pin)) { PwrActivity activity = evalActivity(seq->data(), reg); + // Register output activity cannnot exceed one transition per clock cycle, + // but latch output can. + if (seq->isRegister() + && activity.activity() > 1.0) + activity.setActivity(1.0); if (invert) - activity.set(activity.activity(), - 1.0 - activity.duty(), - activity.origin()); + activity.setDuty(1.0 - activity.duty()); setSeqActivity(reg, output, activity); } } @@ -1190,6 +1193,18 @@ PwrActivity::PwrActivity() : check(); } +void +PwrActivity::setActivity(float activity) +{ + activity_ = activity; +} + +void +PwrActivity::setDuty(float duty) +{ + duty_ = duty; +} + void PwrActivity::set(float activity, float duty,