diff --git a/dcalc/test/cpp/TestDcalc.cc b/dcalc/test/cpp/TestDcalc.cc
index d7082f0d..e7ea6466 100644
--- a/dcalc/test/cpp/TestDcalc.cc
+++ b/dcalc/test/cpp/TestDcalc.cc
@@ -4263,6 +4263,7 @@ TEST_F(NangateDcalcTest, DmpExtremeLoads) {
   ASSERT_NE(out_port, nullptr);
 
   Scene *corner = sta_->cmdScene();
+  (void)corner;
   float loads[] = {0.00001f, 0.1f, 1.0f, 5.0f, 10.0f};
   Slack prev_slack = 0.0f;
   bool first = true;
@@ -4315,6 +4316,7 @@ TEST_F(NangateDcalcTest, DmpCombinedExtremes) {
   ASSERT_NE(in_port, nullptr);
 
   Scene *corner = sta_->cmdScene();
+  (void)corner;
 
   // Large load + fast slew
   sta_->setPortExtPinCap(out_port, RiseFallBoth::riseFall(),
@@ -4348,6 +4350,7 @@ TEST_F(NangateDcalcTest, TwoPoleExtremeLoads) {
   ASSERT_NE(out_port, nullptr);
 
   Scene *corner = sta_->cmdScene();
+  (void)corner;
   float loads[] = {0.00001f, 0.1f, 1.0f, 5.0f, 10.0f};
   for (float load : loads) {
     sta_->setPortExtPinCap(out_port, RiseFallBoth::riseFall(),
@@ -4532,6 +4535,7 @@ TEST_F(MultiDriverDcalcTest, DmpCeffLoadSweep) {
   ASSERT_NE(out_port, nullptr);
 
   Scene *corner = sta_->cmdScene();
+  (void)corner;
   float loads[] = {0.001f, 0.005f, 0.01f, 0.05f, 0.1f};
   Slack prev_slack = 1e30f;  // Start with large positive value
   for (float load : loads) {
@@ -4593,6 +4597,7 @@ TEST_F(MultiDriverDcalcTest, IncrementalLoadChanges) {
   Instance *top = network->topInstance();
   Cell *top_cell = network->cell(top);
   Scene *corner = sta_->cmdScene();
+  (void)corner;
 
   const char *output_ports[] = {"out1", "out2", "out3"};
   for (const char *pname : output_ports) {
diff --git a/liberty/test/cpp/TestLibertyStaBasics.cc b/liberty/test/cpp/TestLibertyStaBasics.cc
index e0886203..e1dbe9ac 100644
--- a/liberty/test/cpp/TestLibertyStaBasics.cc
+++ b/liberty/test/cpp/TestLibertyStaBasics.cc
@@ -40,8 +40,9 @@ static void expectStaLibertyCoreState(Sta *sta, LibertyLibrary *lib)
   EXPECT_NE(sta->cmdSdc(), nullptr);
   EXPECT_NE(sta->report(), nullptr);
   EXPECT_FALSE(sta->scenes().empty());
-  if (!sta->scenes().empty())
+  if (!sta->scenes().empty()) {
     EXPECT_GE(sta->scenes().size(), 1);
+  }
   EXPECT_NE(sta->cmdScene(), nullptr);
   EXPECT_NE(lib, nullptr);
 }
@@ -303,6 +304,7 @@ TEST_F(StaLibertyTest, TimingArcSetCondDefault) {
   TimingArcSet *arcset = arcsets[0];
   // Just call the getter for coverage
   bool is_default = arcset->isCondDefault();
+  (void)is_default;
   // is_default value depends on cell type
 }
 
@@ -314,10 +316,15 @@ TEST_F(StaLibertyTest, TimingArcSetSdfCond) {
   TimingArcSet *arcset = arcsets[0];
   // SDF condition getters - may be empty for simple arcs
   const std::string &sdf_cond = arcset->sdfCond();
+  (void)sdf_cond;
   const std::string &sdf_start = arcset->sdfCondStart();
+  (void)sdf_start;
   const std::string &sdf_end = arcset->sdfCondEnd();
+  (void)sdf_end;
   const std::string &mode_name = arcset->modeName();
+  (void)mode_name;
   const std::string &mode_value = arcset->modeValue();
+  (void)mode_value;
   // sdf_cond may be empty for simple arcs
   // sdf_start may be empty for simple arcs
   // sdf_end may be empty for simple arcs
@@ -353,6 +360,7 @@ TEST_F(StaLibertyTest, TimingArcProperties) {
 
   // Test model
   TimingModel *model = arc->model();
+  (void)model;
   // model may be null depending on cell type
 }
 
@@ -431,6 +439,7 @@ TEST_F(StaLibertyTest, LibraryPortProperties) {
 
   // Test capacitanceIsOneValue
   bool one_val = a->capacitanceIsOneValue();
+  (void)one_val;
   // one_val value depends on cell type
 
   // Test driveResistance
@@ -467,8 +476,11 @@ TEST_F(StaLibertyTest, PortClockFlags) {
     LibertyPort *ck = dff->findLibertyPort("CK");
     if (ck) {
       bool is_clk = ck->isClock();
+      (void)is_clk;
       bool is_reg_clk = ck->isRegClk();
+      (void)is_reg_clk;
       bool is_check_clk = ck->isCheckClk();
+      (void)is_check_clk;
       // is_clk tested implicitly (bool accessor exercised)
       // is_reg_clk tested implicitly (bool accessor exercised)
       // is_check_clk tested implicitly (bool accessor exercised)
@@ -476,6 +488,7 @@ TEST_F(StaLibertyTest, PortClockFlags) {
     LibertyPort *q = dff->findLibertyPort("Q");
     if (q) {
       bool is_reg_out = q->isRegOutput();
+      (void)is_reg_out;
       // is_reg_out tested implicitly (bool accessor exercised)
     }
   }
@@ -600,7 +613,9 @@ TEST_F(StaLibertyTest, PortRelatedPorts) {
   LibertyPort *a = buf->findLibertyPort("A");
   ASSERT_NE(a, nullptr);
   LibertyPort *ground_port = a->relatedGroundPort();
+  (void)ground_port;
   LibertyPort *power_port = a->relatedPowerPort();
+  (void)power_port;
   // ground_port may be null for simple cells
   // power_port may be null for simple cells
 }
@@ -638,6 +653,7 @@ TEST_F(StaLibertyTest, PortReceiverModel) {
   LibertyPort *a = buf->findLibertyPort("A");
   ASSERT_NE(a, nullptr);
   const ReceiverModel *rm = a->receiverModel();
+  (void)rm;
   // rm may be null depending on cell type
 }
 
@@ -659,6 +675,7 @@ TEST_F(StaLibertyTest, CellInternalPowers) {
     }
     // relatedPgPin may be nullptr
     LibertyPort *pgpin = pwr.relatedPgPin();
+    (void)pgpin;
     // pgpin may be null for simple arcs
     EXPECT_EQ(pwr.libertyCell(), buf);
   }
@@ -679,6 +696,7 @@ TEST_F(StaLibertyTest, CellDontUse) {
   LibertyCell *buf = lib_->findLibertyCell("BUF_X1");
   ASSERT_NE(buf, nullptr);
   bool dont_use = buf->dontUse();
+  (void)dont_use;
   // dont_use value depends on cell type
 }
 
@@ -1031,6 +1049,7 @@ TEST_F(StaLibertyTest, CellScaleFactors) {
   LibertyCell *buf = lib_->findLibertyCell("BUF_X1");
   ASSERT_NE(buf, nullptr);
   ScaleFactors *sf = buf->scaleFactors();
+  (void)sf;
   // sf may be null depending on cell type
 }
 
@@ -1045,6 +1064,7 @@ TEST_F(StaLibertyTest, CellOcvDerate) {
   LibertyCell *buf = lib_->findLibertyCell("BUF_X1");
   ASSERT_NE(buf, nullptr);
   OcvDerate *derate = buf->ocvDerate();
+  (void)derate;
   // derate may be null depending on cell type
 }
 
@@ -2170,10 +2190,12 @@ TEST_F(StaLibertyTest, PortRegClkAndOutput) {
   LibertyPort *clk = dff->findLibertyPort("CK");
   ASSERT_NE(clk, nullptr);
   bool is_reg_clk = clk->isRegClk();
+  (void)is_reg_clk;
   // is_reg_clk value depends on cell type
   LibertyPort *q = dff->findLibertyPort("Q");
   ASSERT_NE(q, nullptr);
   bool is_reg_out = q->isRegOutput();
+  (void)is_reg_out;
   // is_reg_out value depends on cell type
 }
 
@@ -2183,6 +2205,7 @@ TEST_F(StaLibertyTest, PortLatchData) {
   LibertyPort *d = dlh->findLibertyPort("D");
   ASSERT_NE(d, nullptr);
   bool is_latch_data = d->isLatchData();
+  (void)is_latch_data;
   // is_latch_data value depends on cell type
 }
 
@@ -2281,6 +2304,7 @@ TEST_F(StaLibertyTest, CellHasInternalPorts) {
   LibertyCell *buf = lib_->findLibertyCell("BUF_X1");
   ASSERT_NE(buf, nullptr);
   bool hip = buf->hasInternalPorts();
+  (void)hip;
   // hip value depends on cell type
 }
 
@@ -3252,8 +3276,9 @@ TEST_F(StaLibertyTest, CellHasSequentials2) {
   ASSERT_NE(buf, nullptr);
   EXPECT_FALSE(buf->hasSequentials());
   LibertyCell *dff = lib_->findLibertyCell("DFF_X1");
-  if (dff)
+  if (dff) {
     EXPECT_TRUE(dff->hasSequentials());
+  }
 }
 
 TEST_F(StaLibertyTest, CellTimingArcSets2) {
diff --git a/liberty/test/cpp/TestLibertyStaBasicsB.cc b/liberty/test/cpp/TestLibertyStaBasicsB.cc
index c74696f9..2601fcab 100644
--- a/liberty/test/cpp/TestLibertyStaBasicsB.cc
+++ b/liberty/test/cpp/TestLibertyStaBasicsB.cc
@@ -40,8 +40,9 @@ static void expectStaLibertyCoreState(Sta *sta, LibertyLibrary *lib)
   EXPECT_NE(sta->cmdSdc(), nullptr);
   EXPECT_NE(sta->report(), nullptr);
   EXPECT_FALSE(sta->scenes().empty());
-  if (!sta->scenes().empty())
+  if (!sta->scenes().empty()) {
     EXPECT_GE(sta->scenes().size(), 1);
+  }
   EXPECT_NE(sta->cmdScene(), nullptr);
   EXPECT_NE(lib, nullptr);
 }
@@ -860,6 +861,7 @@ TEST_F(StaLibertyTest, CellFootprint2) {
   LibertyCell *buf = lib_->findLibertyCell("BUF_X1");
   ASSERT_NE(buf, nullptr);
   const std::string &fp = buf->footprint();
+  (void)fp;
   // fp may be empty for simple arcs
 }
 
@@ -1433,6 +1435,7 @@ TEST(R6_FuncExprTest, PortExprCheckSizeOne) {
   // Port with size 1 should return true for checkSize(1)
   // (depends on port->size())
   bool result = port_expr->checkSize(1);
+  (void)result;
   // Just exercise the code path
   // result tested implicitly (bool accessor exercised)
   delete port_expr;
@@ -1462,7 +1465,7 @@ TEST(R6_FuncExprTest, HasPortMatching) {
   FuncExpr *expr_a = FuncExpr::makePort(port_a);
   EXPECT_TRUE(expr_a->hasPort(port_a));
   EXPECT_FALSE(expr_a->hasPort(port_b));
-  expr_a; // deleteSubexprs removed
+  (void)expr_a; // deleteSubexprs removed
 }
 
 TEST(R6_FuncExprTest, LessPortExprs) {
@@ -1478,8 +1481,8 @@ TEST(R6_FuncExprTest, LessPortExprs) {
   bool r1 = FuncExpr::less(expr_a, expr_b);
   bool r2 = FuncExpr::less(expr_b, expr_a);
   EXPECT_NE(r1, r2);
-  expr_a; // deleteSubexprs removed
-  expr_b; // deleteSubexprs removed
+  (void)expr_a; // deleteSubexprs removed
+  (void)expr_b; // deleteSubexprs removed
 }
 
 TEST(R6_FuncExprTest, EquivPortExprs) {
@@ -1490,8 +1493,8 @@ TEST(R6_FuncExprTest, EquivPortExprs) {
   FuncExpr *expr1 = FuncExpr::makePort(port_a);
   FuncExpr *expr2 = FuncExpr::makePort(port_a);
   EXPECT_TRUE(FuncExpr::equiv(expr1, expr2));
-  expr1; // deleteSubexprs removed
-  expr2; // deleteSubexprs removed
+  (void)expr1; // deleteSubexprs removed
+  (void)expr2; // deleteSubexprs removed
 }
 
 ////////////////////////////////////////////////////////////////
@@ -2255,6 +2258,7 @@ TEST_F(StaLibertyTest, CellFootprint3) {
   LibertyCell *buf = lib_->findLibertyCell("BUF_X1");
   ASSERT_NE(buf, nullptr);
   const std::string &fp = buf->footprint();
+  (void)fp;
   // May be empty for simple arcs
 }
 
@@ -2271,6 +2275,7 @@ TEST_F(StaLibertyTest, CellUserFunctionClass2) {
   LibertyCell *buf = lib_->findLibertyCell("BUF_X1");
   ASSERT_NE(buf, nullptr);
   const std::string &ufc = buf->userFunctionClass();
+  (void)ufc;
   // ufc may be empty for simple arcs
 }
 
@@ -2690,7 +2695,7 @@ TEST_F(StaLibertyTest, FuncExprMakeNot) {
   EXPECT_EQ(not_expr->left(), port_expr);
   std::string s = not_expr->to_string();
   EXPECT_FALSE(s.empty());
-  not_expr; // deleteSubexprs removed
+  (void)not_expr; // deleteSubexprs removed
 }
 
 // FuncExpr::makeAnd
@@ -2707,7 +2712,7 @@ TEST_F(StaLibertyTest, FuncExprMakeAnd) {
   EXPECT_EQ(and_expr->op(), FuncExpr::Op::and_);
   std::string s = and_expr->to_string();
   EXPECT_FALSE(s.empty());
-  and_expr; // deleteSubexprs removed
+  (void)and_expr; // deleteSubexprs removed
 }
 
 // FuncExpr::makeOr
@@ -2722,7 +2727,7 @@ TEST_F(StaLibertyTest, FuncExprMakeOr) {
   FuncExpr *right = FuncExpr::makePort(a2);
   FuncExpr *or_expr = FuncExpr::makeOr(left, right);
   EXPECT_EQ(or_expr->op(), FuncExpr::Op::or_);
-  or_expr; // deleteSubexprs removed
+  (void)or_expr; // deleteSubexprs removed
 }
 
 // FuncExpr::makeXor
@@ -2735,7 +2740,7 @@ TEST_F(StaLibertyTest, FuncExprMakeXor) {
   FuncExpr *right = FuncExpr::makePort(a);
   FuncExpr *xor_expr = FuncExpr::makeXor(left, right);
   EXPECT_EQ(xor_expr->op(), FuncExpr::Op::xor_);
-  xor_expr; // deleteSubexprs removed
+  (void)xor_expr; // deleteSubexprs removed
 }
 
 // FuncExpr::makeZero and makeOne
@@ -2772,8 +2777,9 @@ TEST_F(StaLibertyTest, FuncExprHasPort) {
   ASSERT_NE(a, nullptr);
   FuncExpr *expr = FuncExpr::makePort(a);
   EXPECT_TRUE(expr->hasPort(a));
-  if (zn)
+  if (zn) {
     EXPECT_FALSE(expr->hasPort(zn));
+  }
   delete expr;
 }
 
@@ -2786,7 +2792,7 @@ TEST_F(StaLibertyTest, FuncExprPortTimingSense) {
   FuncExpr *not_expr = FuncExpr::makeNot(FuncExpr::makePort(a));
   TimingSense sense = not_expr->portTimingSense(a);
   EXPECT_EQ(sense, TimingSense::negative_unate);
-  not_expr; // deleteSubexprs removed
+  (void)not_expr; // deleteSubexprs removed
 }
 
 // FuncExpr::copy
@@ -2905,8 +2911,9 @@ TEST_F(StaLibertyTest, PortIsClock2) {
   ASSERT_NE(ck, nullptr);
   EXPECT_TRUE(ck->isClock());
   LibertyPort *d = dff->findLibertyPort("D");
-  if (d)
+  if (d) {
     EXPECT_FALSE(d->isClock());
+  }
 }
 
 // LibertyPort::setIsClock
@@ -3047,6 +3054,7 @@ TEST_F(StaLibertyTest, TimingArcSetIsCondDefault) {
   ASSERT_GT(arcsets.size(), 0u);
   // Default should be false or true depending on library
   bool cd = arcsets[0]->isCondDefault();
+  (void)cd;
   // cd value depends on cell type
 }
 
@@ -3326,6 +3334,7 @@ TEST_F(StaLibertyTest, PortCapacitanceIsOneValue2) {
   LibertyPort *a = buf->findLibertyPort("A");
   ASSERT_NE(a, nullptr);
   bool one_val = a->capacitanceIsOneValue();
+  (void)one_val;
   // one_val value depends on cell type
 }
 
@@ -3384,6 +3393,9 @@ TEST_F(StaLibertyTest, ScaleFactorTypeRiseFallSuffix) {
   bool rfs = scaleFactorTypeRiseFallSuffix(ScaleFactorType::cell);
   bool rfp = scaleFactorTypeRiseFallPrefix(ScaleFactorType::cell);
   bool lhs = scaleFactorTypeLowHighSuffix(ScaleFactorType::cell);
+  (void)rfs;
+  (void)rfp;
+  (void)lhs;
   // rfs tested implicitly (bool accessor exercised)
   // rfp tested implicitly (bool accessor exercised)
   // lhs tested implicitly (bool accessor exercised)
diff --git a/liberty/test/cpp/TestLibertyStaCallbacks.cc b/liberty/test/cpp/TestLibertyStaCallbacks.cc
index dc696358..70f3502f 100644
--- a/liberty/test/cpp/TestLibertyStaCallbacks.cc
+++ b/liberty/test/cpp/TestLibertyStaCallbacks.cc
@@ -42,8 +42,9 @@ static void expectStaLibertyCoreState(Sta *sta, LibertyLibrary *lib)
   EXPECT_NE(sta->cmdSdc(), nullptr);
   EXPECT_NE(sta->report(), nullptr);
   EXPECT_FALSE(sta->scenes().empty());
-  if (!sta->scenes().empty())
+  if (!sta->scenes().empty()) {
     EXPECT_GE(sta->scenes().size(), 1);
+  }
   EXPECT_NE(sta->cmdScene(), nullptr);
   EXPECT_NE(lib, nullptr);
 }
@@ -3847,8 +3848,9 @@ library(test_r11_bus) {
       if (bus_port) {
         // findLibertyMember on bus port
         LibertyPort *member = bus_port->findLibertyMember(0);
-        if (member)
+        if (member) {
           EXPECT_NE(member, nullptr);
+        }
       }
     }
   }
diff --git a/network/test/cpp/TestNetworkB.cc b/network/test/cpp/TestNetworkB.cc
index 7a1203ce..d9aeddc9 100644
--- a/network/test/cpp/TestNetworkB.cc
+++ b/network/test/cpp/TestNetworkB.cc
@@ -1536,6 +1536,7 @@ TEST_F(ConcreteNetworkLinkedTest, MakeTermAndTermName) {
     // Exercises ConcreteTerm::name()
     // Exercise Term accessors
     Net *tnet_check = network_.net(term);
+    (void)tnet_check;
     // Exercises NetworkNameAdapter::id(Term)
     ObjectId tid = network_.id(term);
     EXPECT_GE(tid, 0u);
@@ -1711,6 +1712,7 @@ TEST_F(NetworkAdapterTest, AdapterMakeNet2) {
 TEST_F(NetworkAdapterTest, AdapterConnect2) {
   Instance *top = sdc_net_->topInstance();
   Net *net = sdc_net_->makeNet("r7_adapter_conn_net", top);
+  (void)net;
   // makeInstance requires LibertyCell, get it from the network
   LibertyCell *lib_cell = sdc_net_->findLibertyCell("INV_X1");
   if (lib_cell) {
diff --git a/sdc/test/cpp/TestSdcStaDesign.cc b/sdc/test/cpp/TestSdcStaDesign.cc
index 64603201..e7744b5b 100644
--- a/sdc/test/cpp/TestSdcStaDesign.cc
+++ b/sdc/test/cpp/TestSdcStaDesign.cc
@@ -184,6 +184,7 @@ TEST_F(SdcDesignTest, CycleAcctingSourceTargetCycle) {
 TEST_F(SdcInitTest, ExceptionThruAsString) {
   ASSERT_NO_THROW(( [&](){
   Sdc *sdc = sta_->cmdSdc();
+  (void)sdc;
   Network *network = sta_->cmdNetwork();
   // Create ExceptionThru with no objects
   ExceptionThru *thru = new ExceptionThru(nullptr, nullptr, nullptr,
@@ -230,6 +231,7 @@ TEST_F(SdcInitTest, ExceptionFromHash) {
 
 TEST_F(SdcInitTest, ExceptionPathMergeable) {
   Sdc *sdc = sta_->cmdSdc();
+  (void)sdc;
   FalsePath *fp1 = new FalsePath(nullptr, nullptr, nullptr,
                                  MinMaxAll::all(), true, "");
   FalsePath *fp2 = new FalsePath(nullptr, nullptr, nullptr,
@@ -507,6 +509,7 @@ TEST_F(SdcDesignTest, WriteSdcWithDerating) {
 TEST_F(SdcDesignTest, WriteSdcWithDisable) {
   Graph *graph = sta_->graph();
   Network *network = sta_->cmdNetwork();
+  (void)network;
   Pin *pin = findPin("r1/D");
   if (pin && graph) {
     Vertex *v = graph->pinLoadVertex(pin);
@@ -608,6 +611,7 @@ TEST_F(SdcDesignTest, SdcClockLatencyEdge) {
   Sdc *sdc = sta_->cmdSdc();
   Graph *graph = sta_->graph();
   Network *network = sta_->cmdNetwork();
+  (void)network;
   Pin *pin = findPin("r1/CK");
   if (pin && graph) {
     Vertex *v = graph->pinLoadVertex(pin);
diff --git a/sdc/test/cpp/TestSdcStaInit.cc b/sdc/test/cpp/TestSdcStaInit.cc
index 41ad4e3d..23c065cc 100644
--- a/sdc/test/cpp/TestSdcStaInit.cc
+++ b/sdc/test/cpp/TestSdcStaInit.cc
@@ -35,31 +35,6 @@
 
 namespace sta {
 
-static std::string
-readTextFile(const char *filename)
-{
-  std::ifstream in(filename);
-  if (!in.is_open())
-    return "";
-  return std::string((std::istreambuf_iterator<char>(in)),
-                     std::istreambuf_iterator<char>());
-}
-
-static size_t
-countSubstring(const std::string &text,
-               const std::string &needle)
-{
-  if (needle.empty())
-    return 0;
-  size_t count = 0;
-  size_t pos = 0;
-  while ((pos = text.find(needle, pos)) != std::string::npos) {
-    ++count;
-    pos += needle.size();
-  }
-  return count;
-}
-
 ////////////////////////////////////////////////////////////////
 // SDC tests that require full Sta initialization
 ////////////////////////////////////////////////////////////////
@@ -1904,8 +1879,9 @@ TEST_F(SdcInitTest, DeratingFactorsIsOneValue2) {
   bool is_one_value;
   float value;
   df.isOneValue(EarlyLate::early(), is_one_value, value);
-  if (is_one_value)
+  if (is_one_value) {
     EXPECT_FLOAT_EQ(value, 0.9f);
+  }
 }
 
 // DeratingFactors isOneValue per clk_data
@@ -1917,8 +1893,9 @@ TEST_F(SdcInitTest, DeratingFactorsIsOneValueClkData2) {
   float value;
   df.isOneValue(PathClkOrData::clk, EarlyLate::early(),
                 is_one_value, value);
-  if (is_one_value)
+  if (is_one_value) {
     EXPECT_FLOAT_EQ(value, 0.95f);
+  }
 }
 
 // DeratingFactorsGlobal
@@ -2034,8 +2011,9 @@ TEST_F(SdcInitTest, DeratingFactorsCellIsOneValue2) {
   bool is_one;
   float val;
   dfc.isOneValue(EarlyLate::early(), is_one, val);
-  if (is_one)
+  if (is_one) {
     EXPECT_FLOAT_EQ(val, 0.95f);
+  }
 }
 
 // DeratingFactorsNet