diff --git a/sdc/Sdc.cc b/sdc/Sdc.cc index 1df2bfa6..1219b86a 100644 --- a/sdc/Sdc.cc +++ b/sdc/Sdc.cc @@ -6128,6 +6128,17 @@ Sdc::annotateDisables(bool annotate) annotateGraphDisabled(pin, annotate); } + if (!disabled_lib_ports_.empty()) { + VertexIterator vertex_iter(graph_); + while (vertex_iter.hasNext()) { + Vertex *vertex = vertex_iter.next(); + Pin *pin = vertex->pin(); + LibertyPort *port = network_->libertyPort(pin); + if (disabled_lib_ports_.hasKey(port)) + annotateGraphDisabled(pin, annotate); + } + } + Instance *top_inst = network_->topInstance(); PortSet::Iterator port_iter(disabled_ports_); while (port_iter.hasNext()) { diff --git a/search/CheckSlewLimits.cc b/search/CheckSlewLimits.cc index 2908c753..2d96be62 100644 --- a/search/CheckSlewLimits.cc +++ b/search/CheckSlewLimits.cc @@ -137,7 +137,8 @@ CheckSlewLimits::checkSlews1(const Pin *pin, { Vertex *vertex, *bidirect_drvr_vertex; sta_->graph()->pinVertices(pin, vertex, bidirect_drvr_vertex); - if (!vertex->isDisabledConstraint()) + if (vertex + && !vertex->isDisabledConstraint()) checkSlews1(vertex, corner, min_max, corner1, rf, slew, limit, slack); if (bidirect_drvr_vertex diff --git a/tcl/StaTcl.i b/tcl/StaTcl.i index 1e0d6874..d52589ae 100644 --- a/tcl/StaTcl.i +++ b/tcl/StaTcl.i @@ -5242,6 +5242,7 @@ find_cells_matching(const char *pattern, } // Library methods %extend LibertyLibrary { +const char *name() { return self->name(); } LibertyCell * find_liberty_cell(const char *name) @@ -5326,6 +5327,7 @@ find_ports_matching(const char *pattern, } // Cell methods %extend LibertyCell { +const char *name() { return self->name(); } bool is_leaf() { return self->isLeaf(); } LibertyLibrary *liberty_library() { return self->libertyLibrary(); } Cell *cell() { return reinterpret_cast(self); } @@ -5883,6 +5885,8 @@ is_clock() return search->isClock(self); } +bool is_disabled_constraint() { return self->isDisabledConstraint(); } + } // Vertex methods %extend Edge {