From c81f0c169d15896eece4b1ecc9fd7dfba3fac041 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Mon, 22 Jun 2026 16:54:27 -0700 Subject: [PATCH] cleanup Signed-off-by: James Cherry --- dcalc/GraphDelayCalc.cc | 66 ++++++++++++++++++++--------------------- power/Power.cc | 28 ++++++++++------- search/Genclks.cc | 11 +++---- 3 files changed, 55 insertions(+), 50 deletions(-) diff --git a/dcalc/GraphDelayCalc.cc b/dcalc/GraphDelayCalc.cc index 6fac6faa..6c821dab 100644 --- a/dcalc/GraphDelayCalc.cc +++ b/dcalc/GraphDelayCalc.cc @@ -248,7 +248,7 @@ GraphDelayCalc::delayInvalid(Vertex *vertex) { debugPrint(debug_, "delay_calc", 2, "delay invalid {}", vertex->to_string(this)); - if (graph_ && incremental_) { + if (incremental_) { invalid_delays_.insert(vertex); // Invalidate driver that triggers dcalc for multi-driver nets. MultiDrvrNet *multi_drvr = multiDrvrNet(vertex); @@ -338,40 +338,38 @@ FindVertexDelays::visit(Vertex *vertex) void GraphDelayCalc::findDelays(Level level) { - if (arc_delay_calc_) { - Stats stats(debug_, report_); - int dcalc_count = 0; - debugPrint(debug_, "delay_calc", 1, "find delays to level {}", level); - if (!delays_seeded_) { - iter_->clear(); - seedRootSlews(); - delays_seeded_ = true; - } - else - iter_->ensureSize(); - if (incremental_) - seedInvalidDelays(); - - if (!iter_->empty()) { - FindVertexDelays visitor(this); - dcalc_count += iter_->visitParallel(level, &visitor); - } - - // Timing checks require slews at both ends of the arc, - // so find their delays after all slews are known. - for (Edge *check_edge : invalid_check_edges_) - findCheckEdgeDelays(check_edge, arc_delay_calc_); - invalid_check_edges_.clear(); - - for (Edge *latch_edge : invalid_latch_edges_) - findLatchEdgeDelays(latch_edge); - invalid_latch_edges_.clear(); - - delays_exist_ = true; - incremental_ = true; - debugPrint(debug_, "delay_calc", 1, "found {} delays", dcalc_count); - stats.report("Delay calc"); + Stats stats(debug_, report_); + int dcalc_count = 0; + debugPrint(debug_, "delay_calc", 1, "find delays to level {}", level); + if (!delays_seeded_) { + iter_->clear(); + seedRootSlews(); + delays_seeded_ = true; } + else + iter_->ensureSize(); + if (incremental_) + seedInvalidDelays(); + + if (!iter_->empty()) { + FindVertexDelays visitor(this); + dcalc_count += iter_->visitParallel(level, &visitor); + } + + // Timing checks require slews at both ends of the arc, + // so find their delays after all slews are known. + for (Edge *check_edge : invalid_check_edges_) + findCheckEdgeDelays(check_edge, arc_delay_calc_); + invalid_check_edges_.clear(); + + for (Edge *latch_edge : invalid_latch_edges_) + findLatchEdgeDelays(latch_edge); + invalid_latch_edges_.clear(); + + delays_exist_ = true; + incremental_ = true; + debugPrint(debug_, "delay_calc", 1, "found {} delays", dcalc_count); + stats.report("Delay calc"); } void diff --git a/power/Power.cc b/power/Power.cc index 0d7a4848..0296093e 100644 --- a/power/Power.cc +++ b/power/Power.cc @@ -554,9 +554,12 @@ ActivitySrchPred::searchThru(Edge *edge, { const Sdc *sdc = mode->sdc(); const TimingRole *role = edge->role(); - return !(edge->role()->isTimingCheck() || sdc->isDisabledConstraint(edge) - || sdc->isDisabledCondDefault(edge) || edge->isBidirectInstPath() - || edge->isDisabledLoop() || role == TimingRole::regClkToQ() + return !(edge->role()->isTimingCheck() + || sdc->isDisabledConstraint(edge) + || sdc->isDisabledCondDefault(edge) + || edge->isBidirectInstPath() + || edge->isDisabledLoop() + || role == TimingRole::regClkToQ() || role->isLatchDtoQ()); } @@ -744,9 +747,9 @@ PropActivityVisitor::setActivityCheck(const Pin *pin, max_change_ = duty_delta; max_change_pin_ = pin; } - bool changed = density_delta > change_tolerance_ || duty_delta > change_tolerance_ - || activity.origin() != prev_activity.origin(); - ; + bool changed = density_delta > change_tolerance_ + || duty_delta > change_tolerance_ + || activity.origin() != prev_activity.origin(); power_->setActivity(pin, activity); return changed; } @@ -903,8 +906,9 @@ Power::ensureActivities(const Scene *scene) // unless it has been set by command. if (input_activity_.origin() == PwrActivityOrigin::unknown) { float min_period = clockMinPeriod(scene_->mode()->sdc()); - float density = - 0.1 / (min_period != 0.0 ? min_period : units_->timeUnit()->scale()); + if (min_period == 0.0) + min_period = units_->timeUnit()->scale(); + float density = 0.1 / min_period; input_activity_.set(density, 0.5, PwrActivityOrigin::input); } ActivitySrchPred activity_srch_pred(this); @@ -916,7 +920,7 @@ Power::ensureActivities(const Scene *scene) // Propagate activiities through registers. InstanceSet regs = std::move(visitor.visitedRegs()); int pass = 1; - while (!regs.empty() && pass < max_activity_passes_) { + while (!regs.empty() && pass <= max_activity_passes_) { visitor.init(); for (const Instance *reg : regs) // Propagate activiities across register D->Q. @@ -925,8 +929,10 @@ Power::ensureActivities(const Scene *scene) // combinational logic. bfs.visit(levelize_->maxLevel(), &visitor); regs = std::move(visitor.visitedRegs()); - debugPrint(debug_, "power_activity", 1, "Pass {} change {:.2f} {}", pass, - visitor.maxChange(), network_->pathName(visitor.maxChangePin())); + debugPrint(debug_, "power_activity", 1, "Pass {} change {:.2f} {}", + pass, + visitor.maxChange(), + network_->pathName(visitor.maxChangePin())); pass++; } } diff --git a/search/Genclks.cc b/search/Genclks.cc index caaee7ba..03d53d74 100644 --- a/search/Genclks.cc +++ b/search/Genclks.cc @@ -669,11 +669,12 @@ Genclks::makeTag(const Clock *gclk, state = state->nextState(); ExceptionStateSet *states = new ExceptionStateSet(); states->insert(state); - const ClkInfo *clk_info = search_->findClkInfo( - scene, master_clk->edge(master_rf), master_pin, true, nullptr, true, nullptr, - insert, 0.0, nullptr, min_max, nullptr); - return search_->findTag(scene, master_rf, min_max, clk_info, false, nullptr, false, - states, true, nullptr); + const ClkInfo *clk_info = search_->findClkInfo(scene, master_clk->edge(master_rf), + master_pin, true, nullptr, true, + nullptr, insert, 0.0, nullptr, + min_max, nullptr); + return search_->findTag(scene, master_rf, min_max, clk_info, false, nullptr, + false, states, true, nullptr); } class GenClkArrivalSearchPred : public EvalPred