From b9116bd56db39ea2f7453773edf418d34d986867 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Wed, 7 Jul 2021 16:57:34 -0700 Subject: [PATCH] read_verilog no warn on pg_pin connections --- verilog/VerilogReader.cc | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/verilog/VerilogReader.cc b/verilog/VerilogReader.cc index 8a32ec32..0cdd6670 100644 --- a/verilog/VerilogReader.cc +++ b/verilog/VerilogReader.cc @@ -1889,10 +1889,16 @@ VerilogReader::makeNamedInstPins(Cell *cell, } } else { - linkWarn(201, parent_module->filename(), mod_inst->line(), - "instance %s port %s not found.", - verilogName(mod_inst), - port_name); + LibertyPgPort *pg_port = nullptr; + LibertyCell *lib_cell = network_->libertyCell(cell); + if (lib_cell) + pg_port = lib_cell->findPgPort(port_name); + // Do not warn about connections to pg ports (which are ignored). + if (pg_port == nullptr) + linkWarn(201, parent_module->filename(), mod_inst->line(), + "instance %s port %s not found.", + verilogName(mod_inst), + port_name); } } }