From ae12d4082890847214ac627dd191e15ff29556f6 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Wed, 26 Feb 2025 16:08:13 -0800 Subject: [PATCH] write_verilog wire dcls for NC w/o liberty resolves #221 Signed-off-by: James Cherry --- verilog/VerilogWriter.cc | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/verilog/VerilogWriter.cc b/verilog/VerilogWriter.cc index 57bece2a..6fe3485a 100644 --- a/verilog/VerilogWriter.cc +++ b/verilog/VerilogWriter.cc @@ -508,19 +508,15 @@ VerilogWriter::findPortNCcount(const Instance *inst, const Port *port) { int nc_count = 0; - LibertyPort *lib_port = network_->libertyPort(port); - if (lib_port) { - Cell *cell = network_->cell(inst); - LibertyPortMemberIterator member_iter(lib_port); - while (member_iter.hasNext()) { - LibertyPort *lib_member = member_iter.next(); - Port *member = network_->findPort(cell, lib_member->name()); - Pin *pin = network_->findPin(inst, member); - if (pin == nullptr - || network_->net(pin) == nullptr) - nc_count++; - } + PortMemberIterator *member_iter = network_->memberIterator(port); + while (member_iter->hasNext()) { + Port *member = member_iter->next(); + Pin *pin = network_->findPin(inst, member); + if (pin == nullptr + || network_->net(pin) == nullptr) + nc_count++; } + delete member_iter; return nc_count; }