From 265e7f2d1019a6e941120570bd67f010ef906e87 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Sat, 1 Nov 2025 13:25:32 -0700 Subject: [PATCH 1/8] get_filter comment Signed-off-by: James Cherry --- test/get_filter.tcl | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/test/get_filter.tcl b/test/get_filter.tcl index 4bc0f896..ea17f599 100644 --- a/test/get_filter.tcl +++ b/test/get_filter.tcl @@ -1,6 +1,4 @@ -# Test get_* -filter - -# Read in design and libraries +# get_* -filter read_liberty asap7_small.lib.gz read_verilog reg1_asap7.v link_design top From 9f3123cff1118bb9110b1c2c972d370275b2350d Mon Sep 17 00:00:00 2001 From: James Cherry Date: Mon, 3 Nov 2025 16:29:44 -0700 Subject: [PATCH 2/8] readme Signed-off-by: James Cherry --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index fbc6d378..4037af40 100644 --- a/README.md +++ b/README.md @@ -190,7 +190,7 @@ following command builds a Docker image. ``` cd OpenSTA -docker build --file Dockerfile.ubuntu22.04 --tag opensta . +docker build --file Dockerfile.ubuntu22.04 --tag opensta_ubuntu22.04 . ``` To run a docker container using the OpenSTA image, use the -v option From 423c12c8f9d66ad0093f58a5c997b241394b334b Mon Sep 17 00:00:00 2001 From: Drew Lewis Date: Mon, 3 Nov 2025 18:53:17 -0500 Subject: [PATCH 3/8] Add local tag caches to PathVisitors (#316) * Add tag caches to PathVisitor and Search for visit_parallel Signed-off-by: Drew Lewis * Apply clang-format * Update to avoid Search storing caches and touching Bfs.cc Signed-off-by: Drew Lewis * Update to avoid Search storing caches and touching Bfs.cc Signed-off-by: Drew Lewis * Fixed long lines and moved nullptr assignment to constructors Signed-off-by: Drew Lewis --------- Signed-off-by: Drew Lewis --- include/sta/Search.hh | 47 ++++++++++--------- search/Search.cc | 104 ++++++++++++++++++++++++++---------------- 2 files changed, 90 insertions(+), 61 deletions(-) diff --git a/include/sta/Search.hh b/include/sta/Search.hh index 627a4e0e..17504a24 100644 --- a/include/sta/Search.hh +++ b/include/sta/Search.hh @@ -256,7 +256,8 @@ public: Edge *edge, const RiseFall *to_rf, const MinMax *min_max, - const PathAnalysisPt *path_ap); + const PathAnalysisPt *path_ap, + TagSet *tag_cache = nullptr); Tag *thruClkTag(Path *from_path, Vertex *from_vertex, Tag *from_tag, @@ -325,13 +326,14 @@ public: const RiseFall *to_rf); Tag *findTag(const RiseFall *rf, - const PathAnalysisPt *path_ap, - const ClkInfo *tag_clk, - bool is_clk, - InputDelay *input_delay, - bool is_segment_start, - ExceptionStateSet *states, - bool own_states); + const PathAnalysisPt *path_ap, + const ClkInfo *tag_clk, + bool is_clk, + InputDelay *input_delay, + bool is_segment_start, + ExceptionStateSet *states, + bool own_states, + TagSet *tag_cache = nullptr); void reportTags() const; void reportClkInfos() const; const ClkInfo *findClkInfo(const ClockEdge *clk_edge, @@ -515,19 +517,20 @@ protected: void findAllArrivals(bool thru_latches); void findArrivals1(Level level); Tag *mutateTag(Tag *from_tag, - const Pin *from_pin, - const RiseFall *from_rf, - bool from_is_clk, - const ClkInfo *from_clk_info, - const Pin *to_pin, - const RiseFall *to_rf, - bool to_is_clk, - bool to_is_reg_clk, - bool to_is_segment_start, - const ClkInfo *to_clk_info, - InputDelay *to_input_delay, - const MinMax *min_max, - const PathAnalysisPt *path_ap); + const Pin *from_pin, + const RiseFall *from_rf, + bool from_is_clk, + const ClkInfo *from_clk_info, + const Pin *to_pin, + const RiseFall *to_rf, + bool to_is_clk, + bool to_is_reg_clk, + bool to_is_segment_start, + const ClkInfo *to_clk_info, + InputDelay *to_input_delay, + const MinMax *min_max, + const PathAnalysisPt *path_ap, + TagSet *tag_cache = nullptr); ExceptionPath *exceptionTo(const Path *path, const Pin *pin, const RiseFall *rf, @@ -706,6 +709,7 @@ public: const StaState *sta); virtual void visitFaninPaths(Vertex *to_vertex); virtual void visitFanoutPaths(Vertex *from_vertex); + void initTagCache(); protected: // Return false to stop visiting. @@ -752,6 +756,7 @@ protected: const MinMax *min_max, const PathAnalysisPt *path_ap) = 0; SearchPred *pred_; + std::unique_ptr tag_cache_; }; // Visitor called during forward search to record an diff --git a/search/Search.cc b/search/Search.cc index 6fd4c14c..15dd5d8d 100644 --- a/search/Search.cc +++ b/search/Search.cc @@ -1149,7 +1149,9 @@ ArrivalVisitor::init(bool always_to_endpoints, VertexVisitor * ArrivalVisitor::copy() const { - return new ArrivalVisitor(always_to_endpoints_, pred_, this); + auto visitor = new ArrivalVisitor(always_to_endpoints_, pred_, this); + visitor->initTagCache(); + return visitor; } ArrivalVisitor::~ArrivalVisitor() @@ -2035,17 +2037,25 @@ Search::inputDelayTag(const Pin *pin, PathVisitor::PathVisitor(const StaState *sta) : StaState(sta), - pred_(sta->search()->evalPred()) + pred_(sta->search()->evalPred()), + tag_cache_(nullptr) { } PathVisitor::PathVisitor(SearchPred *pred, const StaState *sta) : StaState(sta), - pred_(pred) + pred_(pred), + tag_cache_(nullptr) { } +void +PathVisitor::initTagCache() +{ + tag_cache_ = std::make_unique(128, TagSet::hasher(this), TagSet::key_equal(this)); +} + void PathVisitor::visitFaninPaths(Vertex *to_vertex) { @@ -2233,8 +2243,8 @@ PathVisitor::visitFromPath(const Pin *from_pin, to_clk_info, to_pin, to_rf, min_max, path_ap); if (to_tag) - to_tag = search_->thruTag(to_tag, edge, to_rf, min_max, path_ap); - from_arrival = search_->clkPathArrival(from_path, from_clk_info, + to_tag = search_->thruTag(to_tag, edge, to_rf, min_max, path_ap, tag_cache_.get()); + from_arrival = search_->clkPathArrival(from_path, from_clk_info, clk_edge, min_max, path_ap); to_arrival = from_arrival + arc_delay; } @@ -2249,7 +2259,7 @@ PathVisitor::visitFromPath(const Pin *from_pin, latches_->latchOutArrival(from_path, arc, edge, path_ap, to_tag, arc_delay, to_arrival); if (to_tag) - to_tag = search_->thruTag(to_tag, edge, to_rf, min_max, path_ap); + to_tag = search_->thruTag(to_tag, edge, to_rf, min_max, path_ap, tag_cache_.get()); } } else if (from_tag->isClock()) { @@ -2288,7 +2298,7 @@ PathVisitor::visitFromPath(const Pin *from_pin, else { if (!(sdc_->isPathDelayInternalFromBreak(to_pin) || sdc_->isPathDelayInternalToBreak(from_pin))) { - to_tag = search_->thruTag(from_tag, edge, to_rf, min_max, path_ap); + to_tag = search_->thruTag(from_tag, edge, to_rf, min_max, path_ap, tag_cache_.get()); arc_delay = search_->deratedDelay(from_vertex, arc, edge, false, path_ap); if (!delayInf(arc_delay)) to_arrival = from_arrival + arc_delay; @@ -2450,10 +2460,11 @@ Search::clkInfoWithCrprClkPath(const ClkInfo *from_clk_info, // Return nullptr if the result tag completes a false path. Tag * Search::thruTag(Tag *from_tag, - Edge *edge, - const RiseFall *to_rf, - const MinMax *min_max, - const PathAnalysisPt *path_ap) + Edge *edge, + const RiseFall *to_rf, + const MinMax *min_max, + const PathAnalysisPt *path_ap, + TagSet *tag_cache) { const Pin *from_pin = edge->from(graph_)->pin(); Vertex *to_vertex = edge->to(graph_); @@ -2462,9 +2473,10 @@ Search::thruTag(Tag *from_tag, const ClkInfo *from_clk_info = from_tag->clkInfo(); bool to_is_reg_clk = to_vertex->isRegClk(); Tag *to_tag = mutateTag(from_tag, from_pin, from_rf, false, from_clk_info, - to_pin, to_rf, false, to_is_reg_clk, false, - // input delay is not propagated. - from_clk_info, nullptr, min_max, path_ap); + to_pin, to_rf, false, to_is_reg_clk, false, + // input delay is not propagated. + from_clk_info, nullptr, min_max, path_ap, + tag_cache); return to_tag; } @@ -2617,19 +2629,20 @@ Search::thruClkInfo(Path *from_path, // Find the tag for a path going from from_tag thru edge to to_pin. Tag * Search::mutateTag(Tag *from_tag, - const Pin *from_pin, - const RiseFall *from_rf, - bool from_is_clk, - const ClkInfo *from_clk_info, - const Pin *to_pin, - const RiseFall *to_rf, - bool to_is_clk, - bool to_is_reg_clk, - bool to_is_segment_start, - const ClkInfo *to_clk_info, - InputDelay *to_input_delay, - const MinMax *min_max, - const PathAnalysisPt *path_ap) + const Pin *from_pin, + const RiseFall *from_rf, + bool from_is_clk, + const ClkInfo *from_clk_info, + const Pin *to_pin, + const RiseFall *to_rf, + bool to_is_clk, + bool to_is_reg_clk, + bool to_is_segment_start, + const ClkInfo *to_clk_info, + InputDelay *to_input_delay, + const MinMax *min_max, + const PathAnalysisPt *path_ap, + TagSet *tag_cache) { ExceptionStateSet *new_states = nullptr; ExceptionStateSet *from_states = from_tag->states(); @@ -2713,8 +2726,8 @@ Search::mutateTag(Tag *from_tag, if (new_states) return findTag(to_rf, path_ap, to_clk_info, to_is_clk, - from_tag->inputDelay(), to_is_segment_start, - new_states, true); + from_tag->inputDelay(), to_is_segment_start, new_states, + true, tag_cache); else { // No state change. if (to_clk_info == from_clk_info @@ -2724,9 +2737,8 @@ Search::mutateTag(Tag *from_tag, && from_tag->inputDelay() == to_input_delay) return from_tag; else - return findTag(to_rf, path_ap, to_clk_info, to_is_clk, - to_input_delay, to_is_segment_start, - from_states, false); + return findTag(to_rf, path_ap, to_clk_info, to_is_clk, to_input_delay, + to_is_segment_start, from_states, false, tag_cache); } } @@ -2972,16 +2984,22 @@ Search::tagCount() const Tag * Search::findTag(const RiseFall *rf, - const PathAnalysisPt *path_ap, - const ClkInfo *clk_info, - bool is_clk, - InputDelay *input_delay, - bool is_segment_start, - ExceptionStateSet *states, - bool own_states) + const PathAnalysisPt *path_ap, + const ClkInfo *clk_info, + bool is_clk, + InputDelay *input_delay, + bool is_segment_start, + ExceptionStateSet *states, + bool own_states, + TagSet *tag_cache) { Tag probe(0, rf->index(), path_ap->index(), clk_info, is_clk, input_delay, is_segment_start, states, false, this); + if (tag_cache) { + auto tag = tag_cache->findKey(&probe); + if (tag) + return tag; + } LockGuard lock(tag_lock_); Tag *tag = tag_set_->findKey(&probe); if (tag == nullptr) { @@ -3019,6 +3037,10 @@ Search::findTag(const RiseFall *rf, } if (own_states) delete states; + + if (tag_cache) + tag_cache->insert(tag); + return tag; } @@ -3540,7 +3562,9 @@ RequiredVisitor::~RequiredVisitor() VertexVisitor * RequiredVisitor::copy() const { - return new RequiredVisitor(this); + auto visitor = new RequiredVisitor(this); + visitor->initTagCache(); + return visitor; } void From f6523bd9c6a5a2a461b4d5478b62b274753fc5fb Mon Sep 17 00:00:00 2001 From: James Cherry Date: Tue, 4 Nov 2025 09:45:20 -0700 Subject: [PATCH 4/8] rm unique_ptr, default args Signed-off-by: James Cherry --- include/sta/Search.hh | 19 ++++++++------ search/Genclks.cc | 2 +- search/Latches.cc | 2 +- search/PathEnum.cc | 2 +- search/Search.cc | 61 +++++++++++++++++++++++++------------------ 5 files changed, 50 insertions(+), 36 deletions(-) diff --git a/include/sta/Search.hh b/include/sta/Search.hh index 17504a24..cc3eb057 100644 --- a/include/sta/Search.hh +++ b/include/sta/Search.hh @@ -257,7 +257,7 @@ public: const RiseFall *to_rf, const MinMax *min_max, const PathAnalysisPt *path_ap, - TagSet *tag_cache = nullptr); + TagSet *tag_cache); Tag *thruClkTag(Path *from_path, Vertex *from_vertex, Tag *from_tag, @@ -333,7 +333,7 @@ public: bool is_segment_start, ExceptionStateSet *states, bool own_states, - TagSet *tag_cache = nullptr); + TagSet *tag_cache); void reportTags() const; void reportClkInfos() const; const ClkInfo *findClkInfo(const ClockEdge *clk_edge, @@ -530,7 +530,7 @@ protected: InputDelay *to_input_delay, const MinMax *min_max, const PathAnalysisPt *path_ap, - TagSet *tag_cache = nullptr); + TagSet *tag_cache); ExceptionPath *exceptionTo(const Path *path, const Pin *pin, const RiseFall *rf, @@ -704,12 +704,13 @@ class PathVisitor : public VertexVisitor, public StaState { public: // Uses search->evalPred() for search predicate. - explicit PathVisitor(const StaState *sta); + PathVisitor(const StaState *sta); PathVisitor(SearchPred *pred, + bool make_tag_cache, const StaState *sta); + virtual ~PathVisitor(); virtual void visitFaninPaths(Vertex *to_vertex); virtual void visitFanoutPaths(Vertex *from_vertex); - void initTagCache(); protected: // Return false to stop visiting. @@ -756,7 +757,7 @@ protected: const MinMax *min_max, const PathAnalysisPt *path_ap) = 0; SearchPred *pred_; - std::unique_ptr tag_cache_; + TagSet *tag_cache_; }; // Visitor called during forward search to record an @@ -764,7 +765,7 @@ protected: class ArrivalVisitor : public PathVisitor { public: - explicit ArrivalVisitor(const StaState *sta); + ArrivalVisitor(const StaState *sta); virtual ~ArrivalVisitor(); // Initialize the visitor. // Defaults pred to search->eval_pred_. @@ -838,12 +839,14 @@ protected: class RequiredVisitor : public PathVisitor { public: - explicit RequiredVisitor(const StaState *sta); + RequiredVisitor(const StaState *sta); virtual ~RequiredVisitor(); virtual VertexVisitor *copy() const; virtual void visit(Vertex *vertex); protected: + RequiredVisitor(bool make_tag_cache, + const StaState *sta); // Return false to stop visiting. virtual bool visitFromToPath(const Pin *from_pin, Vertex *from_vertex, diff --git a/search/Genclks.cc b/search/Genclks.cc index 7b72c8e6..e002c4c7 100644 --- a/search/Genclks.cc +++ b/search/Genclks.cc @@ -716,7 +716,7 @@ Genclks::makeTag(const Clock *gclk, nullptr, insert, 0.0, nullptr, path_ap, nullptr); return search_->findTag(master_rf, path_ap, clk_info, false, - nullptr, false, states, true); + nullptr, false, states, true, nullptr); } class GenClkArrivalSearchPred : public EvalPred diff --git a/search/Latches.cc b/search/Latches.cc index 7d746e25..73ffa95c 100644 --- a/search/Latches.cc +++ b/search/Latches.cc @@ -395,7 +395,7 @@ Latches::latchOutArrival(const Path *data_path, en_clk_edge->transition(), MinMax::max(), false, states)) q_tag = search_->findTag(q_rf, path_ap, q_clk_info, false, - nullptr, false, states, true); + nullptr, false, states, true, nullptr); } return; } diff --git a/search/PathEnum.cc b/search/PathEnum.cc index 46b6f020..bce85521 100644 --- a/search/PathEnum.cc +++ b/search/PathEnum.cc @@ -686,7 +686,7 @@ PathEnum::updatePathHeadDelays(PathSeq &paths, tag->isClock(), tag->inputDelay(), tag->isSegmentStart(), - tag->states(), false); + tag->states(), false, nullptr); path->setTag(updated_tag); } debugPrint(debug_, "path_enum", 5, "update arrival %s %s %s -> %s", diff --git a/search/Search.cc b/search/Search.cc index 15dd5d8d..a05bebc9 100644 --- a/search/Search.cc +++ b/search/Search.cc @@ -147,7 +147,7 @@ DynLoopSrchPred::hasPendingLoopPaths(Edge *edge, PathAPIndex path_ap_index = from_tag->pathAPIndex(); PathAnalysisPt *path_ap = corners->findPathAnalysisPt(path_ap_index); Tag *to_tag = search->thruTag(from_tag, edge, RiseFall::rise(), - path_ap->pathMinMax(), path_ap); + path_ap->pathMinMax(), path_ap, nullptr); if (to_tag && (prev_tag_group == nullptr || !prev_tag_group->hasTag(from_tag))) @@ -1106,7 +1106,7 @@ Search::findArrivalsSeed() //////////////////////////////////////////////////////////////// ArrivalVisitor::ArrivalVisitor(const StaState *sta) : - PathVisitor(nullptr, sta) + PathVisitor(nullptr, false, sta) { init0(); init(true); @@ -1116,7 +1116,7 @@ ArrivalVisitor::ArrivalVisitor(const StaState *sta) : ArrivalVisitor::ArrivalVisitor(bool always_to_endpoints, SearchPred *pred, const StaState *sta) : - PathVisitor(pred, sta) + PathVisitor(pred, true, sta) { init0(); init(always_to_endpoints, pred); @@ -1149,9 +1149,7 @@ ArrivalVisitor::init(bool always_to_endpoints, VertexVisitor * ArrivalVisitor::copy() const { - auto visitor = new ArrivalVisitor(always_to_endpoints_, pred_, this); - visitor->initTagCache(); - return visitor; + return new ArrivalVisitor(always_to_endpoints_, pred_, this); } ArrivalVisitor::~ArrivalVisitor() @@ -1621,7 +1619,8 @@ Search::seedClkArrival(const Pin *pin, // Only false_paths -from apply to clock tree pins. ExceptionStateSet *states = nullptr; sdc_->exceptionFromClkStates(pin,rf,clk,rf,min_max,states); - Tag *tag = findTag(rf, path_ap, clk_info, true, nullptr, false, states, true); + Tag *tag = findTag(rf, path_ap, clk_info, true, nullptr, false, states, + true, nullptr); Arrival arrival(clk_edge->time() + insertion); tag_bldr->setArrival(tag, arrival); } @@ -1659,7 +1658,8 @@ Search::clkDataTag(const Pin *pin, || sdc_->isPropagatedClock(pin)); const ClkInfo *clk_info = findClkInfo(clk_edge, pin, is_propagated, insertion, path_ap); - return findTag(rf, path_ap, clk_info, false, nullptr, false, states, true); + return findTag(rf, path_ap, clk_info, false, nullptr, false, states, + true, nullptr); } else return nullptr; @@ -2020,7 +2020,7 @@ Search::inputDelayTag(const Pin *pin, false, nullptr, clk_insertion, clk_latency, clk_uncertainties, path_ap, nullptr); tag = findTag(rf, path_ap, clk_info, false, input_delay, is_segment_start, - states, true); + states, true, nullptr); } if (tag) { @@ -2028,7 +2028,7 @@ Search::inputDelayTag(const Pin *pin, // Check for state changes on existing tag exceptions (pending -thru pins). tag = mutateTag(tag, pin, rf, false, clk_info, pin, rf, false, false, is_segment_start, clk_info, - input_delay, min_max, path_ap); + input_delay, min_max, path_ap, nullptr); } return tag; } @@ -2036,24 +2036,28 @@ Search::inputDelayTag(const Pin *pin, //////////////////////////////////////////////////////////////// PathVisitor::PathVisitor(const StaState *sta) : + StaState(sta), pred_(sta->search()->evalPred()), - tag_cache_(nullptr) + tag_cache_( nullptr) { } PathVisitor::PathVisitor(SearchPred *pred, + bool make_tag_cache, const StaState *sta) : + StaState(sta), pred_(pred), - tag_cache_(nullptr) + tag_cache_(make_tag_cache + ? new TagSet(128, TagSet::hasher(sta), TagSet::key_equal(sta)) + : nullptr) { } -void -PathVisitor::initTagCache() +PathVisitor::~PathVisitor() { - tag_cache_ = std::make_unique(128, TagSet::hasher(this), TagSet::key_equal(this)); + delete tag_cache_; } void @@ -2243,7 +2247,7 @@ PathVisitor::visitFromPath(const Pin *from_pin, to_clk_info, to_pin, to_rf, min_max, path_ap); if (to_tag) - to_tag = search_->thruTag(to_tag, edge, to_rf, min_max, path_ap, tag_cache_.get()); + to_tag = search_->thruTag(to_tag, edge, to_rf, min_max, path_ap, tag_cache_); from_arrival = search_->clkPathArrival(from_path, from_clk_info, clk_edge, min_max, path_ap); to_arrival = from_arrival + arc_delay; @@ -2259,7 +2263,7 @@ PathVisitor::visitFromPath(const Pin *from_pin, latches_->latchOutArrival(from_path, arc, edge, path_ap, to_tag, arc_delay, to_arrival); if (to_tag) - to_tag = search_->thruTag(to_tag, edge, to_rf, min_max, path_ap, tag_cache_.get()); + to_tag = search_->thruTag(to_tag, edge, to_rf, min_max, path_ap, tag_cache_); } } else if (from_tag->isClock()) { @@ -2298,7 +2302,7 @@ PathVisitor::visitFromPath(const Pin *from_pin, else { if (!(sdc_->isPathDelayInternalFromBreak(to_pin) || sdc_->isPathDelayInternalToBreak(from_pin))) { - to_tag = search_->thruTag(from_tag, edge, to_rf, min_max, path_ap, tag_cache_.get()); + to_tag = search_->thruTag(from_tag, edge, to_rf, min_max, path_ap, tag_cache_); arc_delay = search_->deratedDelay(from_vertex, arc, edge, false, path_ap); if (!delayInf(arc_delay)) to_arrival = from_arrival + arc_delay; @@ -2408,7 +2412,7 @@ Search::fromUnclkedInputTag(const Pin *pin, && (!require_exception || states)) { const ClkInfo *clk_info = findClkInfo(nullptr, nullptr, false, 0.0, path_ap); return findTag(rf, path_ap, clk_info, false, nullptr, - is_segment_start, states, true); + is_segment_start, states, true, nullptr); } return nullptr; } @@ -2429,7 +2433,8 @@ Search::fromRegClkTag(const Pin *from_pin, min_max, states)) { // Hack for filter -from reg/Q. sdc_->filterRegQStates(to_pin, to_rf, min_max, states); - return findTag(to_rf, path_ap, clk_info, false, nullptr, false, states, true); + return findTag(to_rf, path_ap, clk_info, false, nullptr, false, states, + true, nullptr); } else return nullptr; @@ -2510,7 +2515,7 @@ Search::thruClkTag(Path *from_path, arc_delay_min_max_eq, min_max, path_ap); Tag *to_tag = mutateTag(from_tag,from_pin,from_rf,from_is_clk,from_clk_info, to_pin, to_rf, to_is_clk, to_is_reg_clk, false, - to_clk_info, nullptr, min_max, path_ap); + to_clk_info, nullptr, min_max, path_ap, nullptr); return to_tag; } @@ -2996,7 +3001,7 @@ Search::findTag(const RiseFall *rf, Tag probe(0, rf->index(), path_ap->index(), clk_info, is_clk, input_delay, is_segment_start, states, false, this); if (tag_cache) { - auto tag = tag_cache->findKey(&probe); + Tag *tag = tag_cache->findKey(&probe); if (tag) return tag; } @@ -3553,6 +3558,14 @@ RequiredVisitor::RequiredVisitor(const StaState *sta) : { } +RequiredVisitor::RequiredVisitor(bool make_tag_cache, + const StaState *sta) : + PathVisitor(sta->search()->evalPred(), make_tag_cache, sta), + required_cmp_(new RequiredCmp), + visit_path_ends_(new VisitPathEnds(sta)) +{ +} + RequiredVisitor::~RequiredVisitor() { delete required_cmp_; @@ -3562,9 +3575,7 @@ RequiredVisitor::~RequiredVisitor() VertexVisitor * RequiredVisitor::copy() const { - auto visitor = new RequiredVisitor(this); - visitor->initTagCache(); - return visitor; + return new RequiredVisitor(true, this); } void From 97b711c7c49c32a1d5469c2706a8d981fe406b4f Mon Sep 17 00:00:00 2001 From: James Cherry Date: Tue, 4 Nov 2025 12:30:55 -0700 Subject: [PATCH 5/8] report -unique_edges_to_endpoint commit d8bb65d6e87cf95b3eada82b315351867b50fa01 Author: James Cherry Date: Tue Nov 4 12:25:56 2025 -0700 report -unique_edges_to_endpoint doc Signed-off-by: James Cherry commit 2979eda02f4f2fb38da4a5df9e9ece0d00951b6f Author: James Cherry Date: Mon Nov 3 11:51:02 2025 -0700 redirect report_check_types Signed-off-by: James Cherry commit 55960d4a63a999fc08f311c53fb053e4d54d1029 Author: James Cherry Date: Mon Nov 3 11:28:15 2025 -0700 report -unique_edges_to_endpoint Signed-off-by: James Cherry commit 8c56b5c2c08f546fee02e017a87cd94480dbabfc Author: James Cherry Date: Sun Nov 2 16:05:28 2025 -0700 PathEnum cleanup Signed-off-by: James Cherry commit c02b96a9c7b6e7c9ce99ee76a211f365bcda7428 Author: James Cherry Date: Sun Nov 2 11:16:34 2025 -0700 PathEnum cleanup Signed-off-by: James Cherry Signed-off-by: James Cherry --- doc/ChangeLog.txt | 5 + doc/OpenSTA.fodt | 2329 +++++++++++++++++++------------------- doc/OpenSTA.pdf | Bin 1429579 -> 1424501 bytes include/sta/PathGroup.hh | 9 + include/sta/Search.hh | 13 +- include/sta/Sta.hh | 7 +- search/PathEnum.cc | 118 +- search/PathEnum.hh | 5 +- search/PathGroup.cc | 54 +- search/Search.cc | 40 +- search/Search.i | 3 +- search/Search.tcl | 11 +- search/Sta.cc | 13 +- 13 files changed, 1330 insertions(+), 1277 deletions(-) diff --git a/doc/ChangeLog.txt b/doc/ChangeLog.txt index 65ce152a..bd554c93 100644 --- a/doc/ChangeLog.txt +++ b/doc/ChangeLog.txt @@ -12,6 +12,11 @@ build directory instead of `app/`. The set_max_delay and set_min_delay commands now support the -probe option. With -probe these commands do not break paths at internal (non-startpoint) pins. +The report_checks command now supports a -unique_edges_to_endpoint option +to remove paths through identical pins and rise/fall edges. + + report_checks [-unique_edges_to_endpoint] + Release 2.6.1 2025/03/30 ------------------------- diff --git a/doc/OpenSTA.fodt b/doc/OpenSTA.fodt index cd7ae9d9..84751fab 100644 --- a/doc/OpenSTA.fodt +++ b/doc/OpenSTA.fodt @@ -1,10 +1,10 @@ - Parallax STA documentationJames Cherry4822025-03-17T12:59:52.4638705382010-07-31T21:07:002025-09-03T16:07:18.577431000P117DT14H37M47SLibreOffice/25.2.2.2$MacOSX_AARCH64 LibreOffice_project/7370d4be9e3cf6031a51beef54ff3bda878e3facPDF files: James CherryJames Cherry12.00000falsefalsefalsefalse + Parallax STA documentationJames Cherry4832025-03-17T12:59:52.4638705382010-07-31T21:07:002025-11-04T12:25:14.489956000P117DT14H41M24SLibreOffice/25.8.1.1$MacOSX_AARCH64 LibreOffice_project/54047653041915e595ad4e45cccea684809c77b5PDF files: James CherryJames Cherry12.00000falsefalsefalsefalse - 700804 + 981699 0 30224 17736 @@ -13,12 +13,12 @@ view2 - 19479 - 714065 + 16529 + 988826 0 - 700804 + 981699 30222 - 718538 + 999434 0 1 false @@ -29,6 +29,7 @@ true false false + false @@ -44,6 +45,7 @@ false false + false false false false @@ -87,7 +89,7 @@ false true false - 25749756 + 25757696 0 false @@ -105,6 +107,7 @@ false true false + false true false @@ -128,6 +131,7 @@ 1 false true + false true high-resolution @@ -194,13 +198,13 @@ - + - + @@ -210,7 +214,7 @@ - + @@ -4368,7 +4372,7 @@ - + @@ -4493,22 +4497,22 @@ - + - + - + - + @@ -4521,633 +4525,644 @@ - + - + + - - + - + - - + + + - - + - - + + + - - + + - - - - - + - - - + + + + + - + - - + + - - + + - + - + - - + + + - - + + + + + + + + + + + + + - - - - - - - - - - - - + + + + + + + + + + + + - + - + - + - - - - - - - - - - - - - + + - - + + - + - + - - + + - - - + + - - + + + - + + + + + + + + + + + + - + - + - + - + - + - - - - - - - - - - - - + - + - - - + + - + - - + + + - + - + - - + + - + - + - - - + + + + + + + + + + + + + + - + - + - + - + - - - - - - - - - - - - - + - + - + - + - + + - + + + + + + + + + + + + - - - - - - - - - - - - - + - + - - + + - - + + - + + + + + + + + + + + + + - + - + - + - + - + - + - + - + - + - + - + - - - - - - - - - - - - + + + + + + + + + + + + - + - + - + - + - + - + - + - + - + - + - + - - - - - - - - - - - - + - - - + + + + + + + + + + + + + + - + - + - + - - - - - - - - - - - - - + - + - + - - + + + - - + + + - + - + + + + + + + - - - - - - - - + - + - - - - - + + + + - + - + + + + + + + + + + + + + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - - - - - - - - - - - - - + + + + + + + + + + + + + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + @@ -5439,149 +5454,149 @@ - - - - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + + + + @@ -6323,24 +6338,24 @@ Variables80 - Command Line Arguments + Command Line Arguments The command line arguments for sta are shown below. sta -help show help and exit -version show version and exit -no_init do not read ~/.sta -no_splash do not print the splash message -threads count|max use count threads -exit exit after reading cmd_file cmd_file source cmd_file When OpenSTA starts up, commands are first read from the user initialization file ~/.sta if it exists. If a TCL command file cmd_file is specified on the command line, commands are read from the file and executed before entering an interactive TCL command interpreter. If -exit is specified the application exits after reading cmd_file. Use the TCL exit command to exit the application. The –threads option specifies how many parallel threads to use. Use –threads max to use one thread per processor. - Example Command Scripts + Example Command Scripts To read a design into OpenSTA use the read_liberty command to read Liberty library files. Next, read hierarchical structural Verilog files with the read_verilog command. The link_design command links the Verilog to the Liberty timing cells. Any number of Liberty and Verilog files can be read before linking the design. Delays used for timing analysis are calculated using the Liberty timing models. If no parasitics are read only the pin capacitances of the timing models are used in delay calculation. Use the read_spef command to read parasitics from an extractor, or read_sdf to use delays calculated by an external delay calculator. Timing constraints can be entered as TCL commands or read using the read_sdc command. The units used by OpenSTA for all command arguments and reports are taken from the first Liberty file that is read. Use the set_cmd_units command to override the default units. - Timing Analysis using SDF + Timing Analysis using SDF A sample command file that reads a library and a Verilog netlist and reports timing checks is shown below. read_liberty example1_slow.libread_verilog example1.vlink_design topread_sdf example1.sdfcreate_clock -name clk -period 10 {clk1 clk2 clk3}set_input_delay -clock clk 0 {in1 in2}report_checks This example can be found in examples/sdf_delays.tcl. - Timing Analysis with Multiple Process Corners + Timing Analysis with Multiple Process Corners An example command script using three process corners and +/-10% min/max derating is shown below. define_corners wc typ bcread_liberty -corner wc example1_slow.libread_liberty -corner typ example1_typ.libread_liberty -corner bc example1_fast.libread_verilog example1.vlink_design topset_timing_derate -early 0.9set_timing_derate -late 1.1create_clock -name clk -period 10 {clk1 clk2 clk3}set_input_delay -clock clk 0 {in1 in2}report_checks -path_delay min_maxreport_checks -corner typ This example can be found in examples/spef_parasitics.tcl. Other examples can be found in the examples directory. - Power Analysis + Power Analysis OpenSTA also supports static power analysis with the report_power command. Probabalistic switching activities are propagated from the input ports to determine switching activities for internal pins. read_liberty sky130hd_tt.libread_verilog gcd_sky130hd.vlink_design gcdread_sdc gcd_sky130hd.sdcread_spef gcd_sky130hd.spefset_power_activity -input -activity 0.1set_power_activity -input_port reset -activity 0report_power In this example the activity for all inputs is set to 0.1, and then the activity for the reset signal is set to zero because it does not switch during steady state operation. @@ -6352,14 +6367,14 @@ read_liberty sky130hd_tt.libread_verilog gcd_sky130hd.vlink_design gcdread_sdc gcd_sky130hd.sdcread_spef gcd_sky130hd.spefread_vcd -scope gcd_tb/gcd1 gcd_sky130hd.vcd.gzreport_power This example can be found in examples/power_vcd.tcl. Note that in this simple example design simulation based activities does not significantly change the results. - TCL Interpreter + TCL Interpreter Keyword arguments to commands may be abbreviated. For example, report_checks -unique is equivalent to the following command. report_checks -unique_paths_to_endpoint The help command lists matching commands and their arguments. > help report*report_annotated_check [-setup] [-hold] [-recovery] [-removal] [-nochange] [-width] [-period] [-max_skew] [-max_lines liness] [-list_annotated]group_path_count [-list_not_annotated] [-constant_arcs]report_annotated_delay [-cell] [-net] [-from_in_ports] [-to_out_ports] [-max_lines liness] [-list_annotated] [-list_not_annotated] [-constant_arcs]report_arrival pinreport_check_types [-violators] [-verbose] [-corner corner] [-format slack_only|end] [-max_delay] [-min_delay] [-recovery] [-removal] [-clock_gating_setup] [-clock_gating_hold] [-max_slew] [-min_slew] [-max_fanout] [-min_fanout] [-max_capacitance] [-min_capacitance [-min_pulse_width] [-min_period] [-max_skew] [-net net] [-digits digits [-no_line_splits] [> filename] [>> filename]report_checks [-from from_list|-rise_from from_list|-fall_from from_list] [-through through_list|-rise_through through_list|-fall_through through_list] [-to to_list|-rise_to to_list|-fall_to to_list] [-unconstrained] [-path_delay min|min_rise|min_fall|max|max_rise|max_fall|min_max] [-corner corner] [-group_path_count path_count] [-endpoint_path_count path_count] [-unique_paths_to_endpoint] [-slack_max slack_max] [-slack_min slack_min] [-sort_by_slack] [-path_group group_name] [-format full|full_clock|full_clock_expanded|short|end|summary]... - Many reporting commands support redirection of the output to a file much like a Unix shell. + Many reporting commands support redirection of the output to a file much like a Unix shell. report_checks -to out1 > path.logreport_checks -to out2 >> path.log Debugging Timing Here are some guidelines for debugging your design if static timing does not report any paths, or does not report the expected paths. @@ -6385,13 +6400,13 @@ Next, check the arrival times at the D and CP pins of the register with report_arrivals. % report_arrivals r1/D (clk1 ^) r 1.00:1.00 f 1.00:1.00% report_arrivals r1/CP (clk1 ^) r 0.00:0.00 f INF:-INF (clk1 v) r INF:-INF f 5.00:5.00 If there are no arrivals on an input port of the design, use the set_input_delay command to specify the arrival times on the port. - Commands + Commands - all_clocks + all_clocks @@ -6404,7 +6419,7 @@ - all_inputs + all_inputs [-no_clocks] @@ -6425,7 +6440,7 @@ - all_outputs + all_outputs @@ -6438,7 +6453,7 @@ - all_registers + all_registers [-clock clock_names][-cells | -data_pins | -clock_pins | -async_pins | ‑output_pins][-level_sensitive][-edge_triggered] @@ -6515,7 +6530,7 @@ - check_setup + check_setup [-verbose][-unconstrained_endpoints][-multiple_clock][-no_clock][-no_input_delay][-loops][-generated_clocks][> filename][>> filename] @@ -6584,7 +6599,7 @@ - connect_pin + connect_pin netport|pin @@ -6684,7 +6699,7 @@ - create_generated_clock + create_generated_clock [-name clock_name]-source master_pin[-master_clock master_clock][-divide_by divisor][-multiply_by multiplier][-duty_cycle duty_cycle][-invert][-edges edge_list][-edge_shift shift_list][-add]pin_list @@ -6800,7 +6815,7 @@ - create_voltage_area + create_voltage_area [-name name][-coordinate coordinates][-guard_band_x guard_x][-guard_band_y guard_y]cells @@ -6813,7 +6828,7 @@ - current_design + current_design [design] @@ -6826,7 +6841,7 @@ - current_instance + current_instance [instance] @@ -6848,7 +6863,7 @@ - define_corners + define_corners corner1 [corner2]... @@ -6870,7 +6885,7 @@ - delete_clock + delete_clock [-all] clocks @@ -6891,7 +6906,7 @@ - delete_from_list + delete_from_list list objects @@ -6920,7 +6935,7 @@ - delete_generated_clock + delete_generated_clock [-all] clocks @@ -6941,7 +6956,7 @@ - delete_instance + delete_instance instance @@ -6963,7 +6978,7 @@ - delete_net + delete_net net @@ -6984,7 +6999,7 @@ - disconnect_pin + disconnect_pin netport | pin | -all @@ -7029,7 +7044,7 @@ - elapsed_run_time + elapsed_run_time @@ -7043,7 +7058,7 @@ - find_timing_paths + find_timing_paths [-from from_list |-rise_from from_list |-fall_from from_list][-through through_list |-rise_through through_list |-fall_through through_list][-to to_list |-rise_to to_list |-fall_to to_list][-unconstrained][-path_delay min|min_rise|min_fall |max|max_rise|max_fall |min_max][-group_path_count path_count][-endpoint_path_count endpoint_path_count][-unique_paths_to_endpoint][-corner corner][-slack_max max_slack][-slack_min min_slack][-sort_by_slack][-path_group groups] @@ -7257,7 +7272,7 @@ - get_cells + get_cells [-hierarchical][-hsc separator][-filter expr][-regexp][-nocase][-quiet][-of_objects objects][patterns] @@ -7335,7 +7350,7 @@ - get_clocks + get_clocks [-regexp][-nocase][-filter expr][-quiet]patterns @@ -7389,7 +7404,7 @@ - get_fanin + get_fanin -to sink_list[-flat][-only_cells][-startpoints_only][-levels level_count][-pin_levels pin_count][-trace_arcs timing|enabled|all] @@ -7474,7 +7489,7 @@ - get_fanout + get_fanout -from source_list[-flat][-only_cells][-endpoints_only][-levels level_count][-pin_levels pin_count][-trace_arcs timing|enabled|all] @@ -7560,7 +7575,7 @@ - get_full_name + get_full_name object @@ -7651,7 +7666,7 @@ - get_lib_pins + get_lib_pins [-of_objects objects][-hsc separator][-filter expr][-regexp][-nocase][-quiet]patterns @@ -7720,7 +7735,7 @@ - get_libs + get_libs [-filter expr][-regexp][-nocase][-quiet]patterns @@ -7774,7 +7789,7 @@ - get_nets + get_nets [-hierarchical][-hsc separator][-filter expr][-regexp][-nocase][-quiet][-of_objects objects][patterns] @@ -7851,7 +7866,7 @@ - get_name + get_name object @@ -7872,7 +7887,7 @@ - get_pins + get_pins [-hierarchical][-hsc separator][-filter expr][-regexp][-nocase][-quiet][-of_objects objects][patterns] @@ -7944,7 +7959,7 @@ - get_ports + get_ports [-filter expr][-regexp][-nocase][-quiet][-of_objects objects][patterns] @@ -8005,7 +8020,7 @@ - get_property + get_property [-object_type object_type]objectproperty @@ -8066,7 +8081,7 @@ - get_timing_edges + get_timing_edges [-from from_pins][-to to_pins][-of_objects objects][-filter expr][patterns] @@ -8111,7 +8126,7 @@ - group_path + group_path -name group_name[-weight weight][-critical_range range][-from from_list |-rise_from from_list |-fall_from from_list][-through through_list][-rise_through through_list][-fall_through through_list][-to to_list |-rise_to to_list |-fall_to to_list][-default] @@ -8216,10 +8231,10 @@ - -default + -default - Restore the paths in the path group -from/-to/-through/-to to their default path group. + Restore the paths in the path group -from/-to/-through/-to to their default path group. @@ -8229,15 +8244,15 @@ - include + include - [-echo|-e][-verbose|-v]filename[> log_filename][>> log_filename] + [-echo|-e][-verbose|-v]filename[> log_filename][>> log_filename] - -echo|-e + -echo|-e Print each command before evaluating it. @@ -8245,7 +8260,7 @@ - -verbose|-v + -verbose|-v Print each command before evaluating it as well as the result it returns. @@ -8261,7 +8276,7 @@ - > log_filename + > log_filename Redirect command output to log_filename. @@ -8269,7 +8284,7 @@ - >> log_filename + >> log_filename Redirect command output and append log_filename. @@ -8277,24 +8292,24 @@ Read STA/SDC/Tcl commands from filename. - The include command stops and reports any errors encountered while reading a file unless sta_continue_on_error is 1. + The include command stops and reports any errors encountered while reading a file unless sta_continue_on_error is 1. - link_design + link_design - [-no_black_boxes][cell_name] + [-no_black_boxes][cell_name] - -no_black_boxes + -no_black_boxes - Do not make empty “black box” cells for instances that reference undefined cells. + Do not make empty “black box” cells for instances that reference undefined cells. @@ -8315,7 +8330,7 @@ - make_instance + make_instance inst_pathlib_cell @@ -8344,7 +8359,7 @@ - make_net + make_net net_name_list @@ -8365,18 +8380,18 @@ - read_liberty + read_liberty - [-corner corner][-min][-max][-infer_latches]filename + [-corner corner][-min][-max][-infer_latches]filename - -corner corner + -corner corner - Use the library for process corner corner delay calculation. + Use the library for process corner corner delay calculation. @@ -8400,12 +8415,12 @@ filename - The liberty file name to read. + The liberty file name to read. The read_liberty command reads a Liberty format library file. The first library that is read sets the units used by SDC/TCL commands and reporting. The include_file attribute is supported. - Some Liberty libraries do not include latch groups for cells that are describe transparent latches. In that situation the -infer_latches command flag can be used to infer the latches. The timing arcs required for a latch to be inferred should look like the following: + Some Liberty libraries do not include latch groups for cells that are describe transparent latches. In that situation the -infer_latches command flag can be used to infer the latches. The timing arcs required for a latch to be inferred should look like the following: cell (infered_latch) { pin(D) { direction : input ; timing () { related_pin : "E" ; timing_type : setup_falling ; } timing () { related_pin : "E" ; timing_type : hold_falling ; } } pin(E) { direction : input; } pin(Q) { direction : output ; timing () { related_pin : "D" ; } timing () { related_pin : "E" ; timing_type : rising_edge ; } }} In this example a positive level-sensitive latch is inferred. Files compressed with gzip are automatically uncompressed. @@ -8414,18 +8429,18 @@ - read_saif + read_saif - [-scope scope]filename + [-scope scope]filename - scope + scope - The SAIF scope of the current design to extract simulation data. Typically the test bench name and design under test instance name. Scope levels are separated with ‘/’. + The SAIF scope of the current design to extract simulation data. Typically the test bench name and design under test instance name. Scope levels are separated with ‘/’. @@ -8433,17 +8448,17 @@ filename - The name of the SAIF file to read. + The name of the SAIF file to read. - The read_saif command reads a SAIF (Switching Activity Interchange Format) file from a Verilog simulation and extracts pin activities and duty cycles for use in power estimation. Files compressed with gzip are supported. Annotated activities are propagated to the fanout of the annotated pins. + The read_saif command reads a SAIF (Switching Activity Interchange Format) file from a Verilog simulation and extracts pin activities and duty cycles for use in power estimation. Files compressed with gzip are supported. Annotated activities are propagated to the fanout of the annotated pins. - read_sdc + read_sdc [-echo]filename @@ -8475,7 +8490,7 @@ - read_sdf + read_sdf [-corner corner][-unescaped_dividers]filename @@ -8483,7 +8498,7 @@ - -corner corner + -corner corner Process corner delays to annotate. @@ -8506,7 +8521,7 @@ - Read SDF delays from a file. The min and max values in the SDF tuples are used to annotate the delays for corner. The typical values in the SDF tuples are ignored. If multiple corners are defined -corner must be specified. + Read SDF delays from a file. The min and max values in the SDF tuples are used to annotate the delays for corner. The typical values in the SDF tuples are ignored. If multiple corners are defined -corner must be specified. Files compressed with gzip are automatically uncompressed. INCREMENT is supported as an alias for INCREMENTAL. The following SDF statements are not supported. @@ -8516,15 +8531,15 @@ - read_spef + read_spef - [-min][-max][-path path][-corner corner][-keep_capacitive_coupling][-coupling_reduction_factor factor][-reduce]filename + [-min][-max][-path path][-corner corner][-keep_capacitive_coupling][-coupling_reduction_factor factor][-reduce]filename - -min + -min Annotate parasitics for min delays. @@ -8532,7 +8547,7 @@ - -max + -max Annotate parasitics for max delays. @@ -8543,15 +8558,15 @@ path - Hierarchical block instance path to annotate with parasitics. + Hierarchical block instance path to annotate with parasitics. - -corner corner + -corner corner - Annotate parasitics for one process corner. + Annotate parasitics for one process corner. @@ -8568,7 +8583,7 @@ ‑coupling_reduction_factorfactor - Factor to multiply coupling capacitance by when reducing parasitic networks. The default value is 1.0. + Factor to multiply coupling capacitance by when reducing parasitic networks. The default value is 1.0. @@ -8576,7 +8591,7 @@ -reduce - Reduce detailed parasitics and do not save the detailed parastic network. + Reduce detailed parasitics and do not save the detailed parastic network. @@ -8588,36 +8603,36 @@ - The read_spef command reads a file of net parasitics in SPEF format. Use the ‑report_parasitic_annotation command to check for nets that are not annotated. + The read_spef command reads a file of net parasitics in SPEF format. Use the ‑report_parasitic_annotation command to check for nets that are not annotated. Files compressed with gzip are automatically uncompressed. - Separate parasitics can be annotated for corners and min and max paths using the -corner, –min and -max arguments. To use the same parastiics for every corner and for min/max delay calculation read the SPEF without -corner, -min, and -max options. - read_spef spef1 - To use separate parastics for min/max delay, use the -min, and -max options for each SPEF file. - read_spef -min spef1read_spef -max spef2 - To use separate parastics for each corner, use the -corner option for each SPEF file. - read_spef -corner ss spef1read_spef -corner tt spef2read_spef -corner ff spef3 - To use separate parastics for each corner and separate min/max delay calculation, use the -corner option along with the -min, and -max options. - read_spef -corner ss -min spef1read_spef -corner ss -max spef2read_spef -corner ff -min spef3read_spef -corner ff -max spef4 - With the -reduce option, the current delay calculator reduces the parastic network to the appropriate type and deletes the parasitic network. This substantially reduces the memory required to store the parasitics. + Separate parasitics can be annotated for corners and min and max paths using the -corner, –min and -max arguments. To use the same parastiics for every corner and for min/max delay calculation read the SPEF without -corner, -min, and -max options. + read_spef spef1 + To use separate parastics for min/max delay, use the -min, and -max options for each SPEF file. + read_spef -min spef1read_spef -max spef2 + To use separate parastics for each corner, use the -corner option for each SPEF file. + read_spef -corner ss spef1read_spef -corner tt spef2read_spef -corner ff spef3 + To use separate parastics for each corner and separate min/max delay calculation, use the -corner option along with the -min, and -max options. + read_spef -corner ss -min spef1read_spef -corner ss -max spef2read_spef -corner ff -min spef3read_spef -corner ff -max spef4 + With the -reduce option, the current delay calculator reduces the parastic network to the appropriate type and deletes the parasitic network. This substantially reduces the memory required to store the parasitics. Coupling capacitors are multiplied by the –coupling_reduction_factor when a parasitic network is reduced. The following SPEF constructs are ignored. *DESIGN_FLOW (all values are ignored)*S slews*D driving cell*I pin capacitances (library cell capacitances are used instead)*Q r_net load poles*K r_net load residues If the SPEF file contains triplet values the first value is used. - Parasitic networks (DSPEF) can be annotated on hierarchical blocks using the -path argument to specify the instance path to the block. Parasitic networks in the higher level netlist are stitched together at the hierarchical pins of the blocks. + Parasitic networks (DSPEF) can be annotated on hierarchical blocks using the -path argument to specify the instance path to the block. Parasitic networks in the higher level netlist are stitched together at the hierarchical pins of the blocks. - read_vcd + read_vcd - [-scope scope]filename + [-scope scope]filename - scope + scope The VCD scope of the current design to extract simulation data. Typically the test bench name and design under test instance name. Scope levels are separated with ‘/’. @@ -8628,17 +8643,17 @@ filename - The name of the VCD file to read. + The name of the VCD file to read. - The read_vcd command reads a VCD (Value Change Dump) file from a Verilog simulation and extracts pin activities and duty cycles for use in power estimation. Files compressed with gzip are supported. Annotated activities are propagated to the fanout of the annotated pins. + The read_vcd command reads a VCD (Value Change Dump) file from a Verilog simulation and extracts pin activities and duty cycles for use in power estimation. Files compressed with gzip are supported. Annotated activities are propagated to the fanout of the annotated pins. - read_verilog + read_verilog filename @@ -8653,8 +8668,8 @@ - The read_verilog command reads a gate level verilog netlist. After all verilog netlist and Liberty libraries are read the design must be linked with the link_design command. - Verilog 2001 module port declaratations are supported. An example is shown below. + The read_verilog command reads a gate level verilog netlist. After all verilog netlist and Liberty libraries are read the design must be linked with the link_design command. + Verilog 2001 module port declaratations are supported. An example is shown below. module top (input in1, in2, clk1, clk2, clk3, output out); Files compressed with gzip are automatically uncompressed. @@ -8662,7 +8677,7 @@ - replace_cell + replace_cell instance_listreplacement_cell @@ -8685,14 +8700,14 @@ - The replace_cell command changes the cell of an instance. The replacement cell must have the same port list (number, name, and order) as the instance's existing cell for the replacement to be successful. + The replace_cell command changes the cell of an instance. The replacement cell must have the same port list (number, name, and order) as the instance's existing cell for the replacement to be successful. - replace_activity_annotation + replace_activity_annotation [-report_unannotated][-report_annotated] @@ -8703,7 +8718,7 @@ -report_unannotated - Report unannotated pins. + Report unannotated pins. @@ -8711,20 +8726,20 @@ -report_unannotated - Report annotated pins. + Report annotated pins. - Report a summary of pins that are annotated by read_vcd, read_saif or set_power_activity. Sequential internal pins and hierarchical pins are ignored. + Report a summary of pins that are annotated by read_vcd, read_saif or set_power_activity. Sequential internal pins and hierarchical pins are ignored. - report_annotated_check + report_annotated_check - [-setup][-hold][-recovery][-removal][-nochange][-width][-period][-max_skew][-max_line lines][-report_annotated][-report_unannotated][-constant_arcs] + [-setup][-hold][-recovery][-removal][-nochange][-width][-period][-max_skew][-max_line lines][-report_annotated][-report_unannotated][-constant_arcs] @@ -8793,26 +8808,26 @@ - -max_line lines + -max_line lines - Maximum number of lines listed by the –report_annotated and ‑report_unannotated options. + Maximum number of lines listed by the –report_annotated and ‑report_unannotated options. - -report_annotated + -report_annotated - Report annotated timing arcs. + Report annotated timing arcs. - -report_unannotated + -report_unannotated - Report unannotated timing arcs. + Report unannotated timing arcs. @@ -8825,16 +8840,16 @@ - The report_annotated_check command reports a summary of SDF timing check annotation. The -report_annotated and –report_annotated options can be used to list arcs that are annotated or not annotated. + The report_annotated_check command reports a summary of SDF timing check annotation. The -report_annotated and –report_annotated options can be used to list arcs that are annotated or not annotated. - report_annotated_delay + report_annotated_delay - [-cell][-net][-from_in_ports][-to_out_ports][-max_lines lines][-report_annotated][-report_unannotated][-constant_arcs] + [-cell][-net][-from_in_ports][-to_out_ports][-max_lines lines][-report_annotated][-report_unannotated][-constant_arcs] @@ -8855,7 +8870,7 @@ - -from_in_ports + -from_in_ports Report annotated delays from input ports. @@ -8863,7 +8878,7 @@ - -to_out_ports + -to_out_ports Report annotated delays to output ports. @@ -8871,26 +8886,26 @@ - -max_lines lines + -max_lines lines - Maximum number of lines listed by the –report_annotated and ‑report_unannotated options. + Maximum number of lines listed by the –report_annotated and ‑report_unannotated options. - -report_annotated + -report_annotated - Report annotated timing arcs. + Report annotated timing arcs. - -report_unannotated + -report_unannotated - Report unannotated timing arcs. + Report unannotated timing arcs. @@ -8902,98 +8917,98 @@ - The report_annotated_delay command reports a summary of SDF delay annotation. Without the ‑from_in_ports and –to_out_ports options arcs to and from top level ports are not reported. The ‑report_annotated and –report_unannotated options can be used to list arcs that are annotated or not annotated. + The report_annotated_delay command reports a summary of SDF delay annotation. Without the ‑from_in_ports and –to_out_ports options arcs to and from top level ports are not reported. The ‑report_annotated and –report_unannotated options can be used to list arcs that are annotated or not annotated. - report_checks + report_checks - [-from from_list |-rise_from from_list |-fall_from from_list][-through through_list |-rise_through through_list |-fall_through through_list][-to to_list |-rise_to to_list |-fall_to to_list][-unconstrained][-path_delay min|min_rise|min_fall |max|max_rise|max_fall |min_max][-group_path_count path_count][-endpoint_path_count endpoint_path_count][-unique_paths_to_endpoint][-corner corner][-slack_max max_slack][-slack_min min_slack][-sort_by_slack][-path_group groups][-format end|full|short|summary |full_clock|full_clock_expanded |json][-fields fields][-digits digits][-no_line_split][> filename][>> filename] + [-from from_list |-rise_from from_list |-fall_from from_list][-through through_list |-rise_through through_list |-fall_through through_list][-to to_list |-rise_to to_list |-fall_to to_list][-unconstrained][-path_delay min|min_rise|min_fall |max|max_rise|max_fall |min_max][-group_path_count path_count][-endpoint_path_count endpoint_path_count][-unique_paths_to_endpoint][-unique_edges_to_endpoint][-corner corner][-slack_max max_slack][-slack_min min_slack][-sort_by_slack][-path_group groups][-format end|full|short|summary |full_clock|full_clock_expanded |json][-fields fields][-digits digits][-no_line_split][> filename][>> filename] - -from from_list + -from from_list - Report paths from a list of clocks, instances, ports, register clock pins, or latch data pins. + Report paths from a list of clocks, instances, ports, register clock pins, or latch data pins. - -rise_from from_list + -rise_from from_list - Report paths from the rising edge of clocks, instances, ports, register clock pins, or latch data pins. + Report paths from the rising edge of clocks, instances, ports, register clock pins, or latch data pins. - -fall_from from_list + -fall_from from_list - Report paths from the falling edge of clocks, instances, ports, register clock pins, or latch data pins. + Report paths from the falling edge of clocks, instances, ports, register clock pins, or latch data pins. - -through through_list + -through through_list - Report paths through a list of instances, pins or nets. + Report paths through a list of instances, pins or nets. - -rise_through through_list + -rise_through through_list - Report rising paths through a list of instances, pins or nets. - - - - - -fall_through through_list - - - Report falling paths through a list of instances, pins or nets. + Report rising paths through a list of instances, pins or nets. - -to to_list + -fall_through through_list - Report paths to a list of clocks, instances, ports or pins. + Report falling paths through a list of instances, pins or nets. - -rise_to to_list + -to to_list - Report rising paths to a list of clocks, instances, ports or pins. + Report paths to a list of clocks, instances, ports or pins. - -fall_to to_list + -rise_to to_list - Report falling paths to a list of clocks, instances, ports or pins. + Report rising paths to a list of clocks, instances, ports or pins. - -unconstrained + -fall_to to_list - Report unconstrained paths also. The unconstrained path group is not reported without this option. + Report falling paths to a list of clocks, instances, ports or pins. + + + + + -unconstrained + + + Report unconstrained paths also. The unconstrained path group is not reported without this option. @@ -9001,7 +9016,7 @@ -path_delay min - Report min path (hold) checks. + Report min path (hold) checks. @@ -9009,7 +9024,7 @@ -path_delay min_rise - Report min path (hold) checks for rising endpoints. + Report min path (hold) checks for rising endpoints. @@ -9017,7 +9032,7 @@ -path_delay min_fall - Report min path (hold) checks for falling endpoints. + Report min path (hold) checks for falling endpoints. @@ -9025,7 +9040,7 @@ -path_delay max - Report max path (setup) checks. + Report max path (setup) checks. @@ -9033,7 +9048,7 @@ -path_delay max_rise - Report max path (setup) checks for rising endpoints. + Report max path (setup) checks for rising endpoints. @@ -9041,7 +9056,7 @@ -path_delay max_fall - Report max path (setup) checks for falling endpoints. + Report max path (setup) checks for falling endpoints. @@ -9049,55 +9064,64 @@ -path_delay min_max - Report max and max path (setup and hold) checks. + Report max and max path (setup and hold) checks. - -group_path_count path_count + -group_path_count path_count - The number of paths to report in each path group. The default is 1. + The number of paths to report in each path group. The default is 1. - -endpoint_path_count endpoint_path_count + -endpoint_path_count endpoint_path_count - The number of paths to report for each endpoint. The default is 1. + The number of paths to report for each endpoint. The default is 1. - ‑unique_paths_to_endpoint + ‑unique_paths_to_endpoint - When multiple paths to an endpoint are specified with ‑endpoint_path_count many of the paths may differ only in the rise/fall edges of the pins in the paths. With this option only the worst path through the set of pis is reported. + When multiple paths to an endpoint are specified with ‑endpoint_path_count, many of the paths may differ only in the rise/fall edges of the pins in the paths. With this option only the worst path through the set of pins is reported. - -corner corner + ‑unique_edges_to_endpoint - Report paths for one process corner. The default is to report paths for all process corners. + When multiple paths to an endpoint are specified with ‑endpoint_path_count, conditional timing arcs result in paths that through the same pins and rise/fall edges. With this option only the worst path through the set of pins and rise/fall edges is reported. - -slack_max max_slack + -corner corner - Only report paths with less slack than max_slack. + Report paths for one process corner. The default is to report paths for all process corners. - -slack_min min_slack + -slack_max max_slack - Only report paths with more slack than min_slack. + Only report paths with less slack than max_slack. + + + + + + -slack_min min_slack + + + Only report paths with more slack than min_slack. @@ -9105,15 +9129,15 @@ -sort_by_slack - Sort paths by slack rather than slack grouped by path group. + Sort paths by slack rather than slack grouped by path group. - -path_group groups + -path_group groups - List of path groups to report. The default is to report all path groups. + List of path groups to report. The default is to report all path groups. @@ -9121,16 +9145,15 @@ -format end - Report path ends in one line with delay, required time and slack. + Report path ends in one line with delay, required time and slack. - -format full - Report path start and end points and the path. This is the default path type. + Report path start and end points and the path. This is the default path type. @@ -9138,7 +9161,7 @@ -format full_clock - Report path start and end points, the path, and the source and and target clock paths. + Report path start and end points, the path, and the source and and target clock paths. @@ -9146,7 +9169,7 @@ -format full_clock_expanded - Report path start and end points, the path, and the source and and target clock paths. If the clock is generated and propagated, the path from the clock source pin is also reported. + Report path start and end points, the path, and the source and and target clock paths. If the clock is generated and propagated, the path from the clock source pin is also reported. @@ -9154,7 +9177,7 @@ -format short - Report only path start and end points. + Report only path start and end points. @@ -9162,7 +9185,7 @@ -format summary - Report only path ends with delay. + Report only path ends with delay. @@ -9170,12 +9193,12 @@ -format json - Report in json format. -fields is ignored. + Report in json format. -fields is ignored. - -fields fields + -fields fields List of capacitance|slew|input_pins|hierarchical_pins|nets|fanout|src_attr @@ -9183,10 +9206,10 @@ - -digits digits + -digits digits - The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. + The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. @@ -9194,24 +9217,24 @@ -no_line_splits - Do not split long lines into multiple lines. + Do not split long lines into multiple lines. - The report_checks command reports paths in the design. Paths are reported in groups by capture clock, unclocked path delays, gated clocks and unconstrained. - See set_false_path for a description of allowed from_list, through_list and to_list objects. + The report_checks command reports paths in the design. Paths are reported in groups by capture clock, unclocked path delays, gated clocks and unconstrained. + See set_false_path for a description of allowed from_list, through_list and to_list objects. + - report_check_types + report_check_types [-violators][-verbose][-format slack_only|end][-max_delay][-min_delay][-recovery][-removal][-clock_gating_setup][-clock_gating_hold][-max_slew][-min_slew][-min_pulse_width][-min_period][-digits digits][-no_split_lines][> filename][>> filename] - -violators @@ -9222,7 +9245,7 @@ - -verbose + -verbose Use a verbose output format. @@ -9316,6 +9339,7 @@ Report min pulse width design rule checks. + -min_period @@ -9337,7 +9361,7 @@ -digits digits - The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. + The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. @@ -9345,7 +9369,7 @@ -no_split_lines - Do not split long lines into multiple lines. + Do not split long lines into multiple lines. @@ -9355,45 +9379,44 @@ - report_clock_latency + report_clock_latency - [-clock clocks][-include_internal_latency][-digits digits] + [-clock clocks][-include_internal_latency][-digits digits] - -clock clocks + -clock clocks - The clocks to report. - - - - - - -include_internal_latency - - - Include internal clock latency from liberty min/max_clock_tree_path timing groups. + The clocks to report. - -digits digits + -include_internal_latency - The number of digits to report for delays. + Include internal clock latency from liberty min/max_clock_tree_path timing groups. + + + + + -digits digits + + + The number of digits to report for delays. - Report the clock network latency. + Report the clock network latency. - report_clock_min_period + report_clock_min_period [-clocks clocks][-include_port_paths] @@ -9401,7 +9424,7 @@ - -clocks clocks + -clocks clocks The clocks to report. @@ -9422,7 +9445,7 @@ - report_clock_properties + report_clock_properties [clock_names] @@ -9441,12 +9464,13 @@ + - report_clock_skew + report_clock_skew - [-setup|-hold][-clock clocks][-include_internal_latency][-digits digits] + [-setup|-hold][-clock clocks][-include_internal_latency][-digits digits] @@ -9467,7 +9491,7 @@ - -clock clocks + -clock clocks The clocks to report. @@ -9475,29 +9499,28 @@ - -include_internal_latency + -include_internal_latency - Include internal clock latency from liberty min/max_clock_tree_path timing groups. + Include internal clock latency from liberty min/max_clock_tree_path timing groups. - -digits digits + -digits digits The number of digits to report for delays. - Report the maximum difference in clock arrival between every source and target register that has a path between the source and target registers. + Report the maximum difference in clock arrival between every source and target register that has a path between the source and target registers. - - report_dcalc + report_dcalc [-from from_pin][-to to_pin][-corner corner][-min][-max][-digits digits][> filename][>> filename] @@ -9505,7 +9528,7 @@ - -from from_pin + -from from_pin Report delay calculations for timing arcs from instance input pin from_pin. @@ -9516,7 +9539,7 @@ -to to_pin - Report delay calculations for timing arcs to instance output pin to_pin. + Report delay calculations for timing arcs to instance output pin to_pin. @@ -9524,7 +9547,7 @@ -corner corner - Report paths for process corner. The -corner keyword is required if more than one process corner is defined. + Report paths for process corner. The -corner keyword is required if more than one process corner is defined. @@ -9532,7 +9555,7 @@ -min - Report delay calculation for min delays. + Report delay calculation for min delays. @@ -9540,7 +9563,7 @@ -max - Report delay calculation for max delays. + Report delay calculation for max delays. @@ -9548,7 +9571,7 @@ -digits digits - The number of digits after the decimal point to report. The default is sta_report_default_digits. + The number of digits after the decimal point to report. The default is sta_report_default_digits. @@ -9556,9 +9579,10 @@ + - report_disabled_edges + report_disabled_edges @@ -9572,36 +9596,36 @@ - report_edges + report_edges - [-from from_pin][-to to_pin] + [-from from_pin][-to to_pin] - -from from_pin + -from from_pin - Report edges/timing arcs from pin from_pin. + Report edges/timing arcs from pin from_pin. - -to to_pin + -to to_pin - Report edges/timing arcs to pin to_pin. + Report edges/timing arcs to pin to_pin. - Report the edges/timing arcs and their delays in the timing graph from/to/between pins. + Report the edges/timing arcs and their delays in the timing graph from/to/between pins. - report_instance + report_instance instance_path[> filename][>> filename] @@ -9622,7 +9646,7 @@ - report_lib_cell + report_lib_cell cell_name[> filename][>> filename] @@ -9643,18 +9667,19 @@ - report_net + report_net [-digits digits]net_path[> filename][>> filename] + - -digits digits + -digits digits - The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. + The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. @@ -9666,35 +9691,34 @@ - Report the connections and capacitance of a net. + Report the connections and capacitance of a net. - report_parasitic_annotation + report_parasitic_annotation - [-report_unannotated][> filename][>> filename] + [-report_unannotated][> filename][>> filename] - -report_unannotated + -report_unannotated - Report unannotated and partially annotated nets. + Report unannotated and partially annotated nets. - Report SPEF parasitic annotation completeness. + Report SPEF parasitic annotation completeness. - - report_power + report_power [-instances instances][-highest_power_instances count][-digits digits][> filename][>> filename] @@ -9702,7 +9726,7 @@ - -instances instances + -instances instances Report the power for each instance of instances. If the instance is hierarchical the total power for the instances inside the hierarchical instance is reported. @@ -9710,10 +9734,10 @@ - -highest_power_instances count + -highest_power_instances count - Report the power for the count highest power instances. + Report the power for the count highest power instances. @@ -9721,19 +9745,19 @@ -digits digits - The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. + The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. - The report_power command uses static power analysis based on propagated or annotated pin activities in the circuit using Liberty power models. The internal, switching, leakage and total power are reported. Design power is reported separately for combinational, sequential, macro and pad groups. Power values are reported in watts. - The read_vcd or read_saif commands can be used to read activities from a file based on simulation. If no simulation activities are available, the set_power_activity command should be used to set the activity of input ports or pins in the design. The default input activity and duty for inputs are 0.1 and 0.5 respectively. The activities are propagated from annotated input ports or pins through gates and used in the power calculations. - Group Internal Switching Leakage Total Power Power Power Power----------------------------------------------------------------Sequential 3.29e-06 3.41e-08 2.37e-07 3.56e-06 92.4%Combinational 1.86e-07 3.31e-08 7.51e-08 2.94e-07 7.6%Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%---------------------------------------------------------------Total 3.48e-06 6.72e-08 3.12e-07 3.86e-06 100.0% 90.2% 1.7% 8.1% + The report_power command uses static power analysis based on propagated or annotated pin activities in the circuit using Liberty power models. The internal, switching, leakage and total power are reported. Design power is reported separately for combinational, sequential, macro and pad groups. Power values are reported in watts. + The read_vcd or read_saif commands can be used to read activities from a file based on simulation. If no simulation activities are available, the set_power_activity command should be used to set the activity of input ports or pins in the design. The default input activity and duty for inputs are 0.1 and 0.5 respectively. The activities are propagated from annotated input ports or pins through gates and used in the power calculations. + Group Internal Switching Leakage Total Power Power Power Power----------------------------------------------------------------Sequential 3.29e-06 3.41e-08 2.37e-07 3.56e-06 92.4%Combinational 1.86e-07 3.31e-08 7.51e-08 2.94e-07 7.6%Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%---------------------------------------------------------------Total 3.48e-06 6.72e-08 3.12e-07 3.86e-06 100.0% 90.2% 1.7% 8.1% - report_pulse_width_checks + report_pulse_width_checks [-verbose][-digits digits][-no_line_splits][pins][> filename][>> filename] @@ -9741,7 +9765,7 @@ - -verbose + -verbose Use a verbose output format. @@ -9752,10 +9776,9 @@ -digits digits - The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. + The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. - -no_line_splits @@ -9773,79 +9796,79 @@ - The report_pulse_width_checks command reports min pulse width checks for pins in the clock network. If pins is not specified all clock network pins are reported. + The report_pulse_width_checks command reports min pulse width checks for pins in the clock network. If pins is not specified all clock network pins are reported. - report_slews + report_slews - [-corner corner]pin + [-corner corner]pin - -corner corner + -corner corner - Report paths for process corner. The -corner keyword is required if more than one process corner is defined. + Report paths for process corner. The -corner keyword is required if more than one process corner is defined. - pin + pin - + - Report the slews at pin + Report the slews at pin - report_tns + report_tns - [-min][-max][-digits digits] + [-min][-max][-digits digits] - -max + -max - Report the total max/setup slack. + Report the total max/setup slack. - -min + -min - Report the total min/hold slack. + Report the total min/hold slack. - -digits digits + -digits digits - The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. + The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. - Report the total negative slack. + Report the total negative slack. - report_units + report_units @@ -9857,47 +9880,46 @@ - - report_wns + report_wns - [-min][-max][-digits digits] + [-min][-max][-digits digits] - -max + -max - Report the worst max/setup slack. + Report the worst max/setup slack. - -min + -min - Report the worst min/hold slack. + Report the worst min/hold slack. - -digits digits + -digits digits - The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. + The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. - Report the worst negative slack. If the worst slack is positive, zero is reported. + Report the worst negative slack. If the worst slack is positive, zero is reported. - report_worst_slack + report_worst_slack [-min][-max][-digits digits] @@ -9924,7 +9946,7 @@ -digits digits - The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. + The number of digits after the decimal point to report. The default value is the variable sta_report_default_digits. @@ -9932,9 +9954,10 @@ + - set_assigned_check + set_assigned_check -setup|-hold|-recovery|-removal[-rise][-fall][-corner corner][-min][-max][-from from_pins][-to to_pins][-clock rise|fall][-cond sdf_cond][-worst]margin @@ -9956,7 +9979,6 @@ Annotate hold timing checks. - -recovery @@ -9994,7 +10016,7 @@ -corner corner - The name of a process corner. The -corner keyword is required if more than one process corner is defined. + The name of a process corner. The -corner keyword is required if more than one process corner is defined. @@ -10031,7 +10053,7 @@ - -clock rise|fall + -clock rise|fall The timing check clock pin transition. @@ -10050,9 +10072,10 @@ + - set_assigned_delay + set_assigned_delay -cell|-net[-rise][-fall][-corner corner][-min][-max][-from from_pins][-to to_pins]delay @@ -10090,13 +10113,12 @@ Annotate the falling delays. - -corner corner - The name of a process corner. The -corner keyword is required if more than one process corner is defined. + The name of a process corner. The -corner keyword is required if more than one process corner is defined. @@ -10147,12 +10169,13 @@ - set_assigned_transition + set_assigned_transition [-rise][-fall][-corner corner][-min][-max]slewpin_list + -rise @@ -10174,7 +10197,7 @@ -corner corner - Annotate delays for process corner. + Annotate delays for process corner. @@ -10214,10 +10237,9 @@ - - set_case_analysis + set_case_analysis 0|1|zero|one|rise|rising|fall|fallingport_or_pin_list @@ -10233,13 +10255,13 @@ The set_case_analysis command sets the signal on a port or pin to a constant logic value. No paths are propagated from constant pins. Constant values set with the set_case_analysis command are propagated through downstream gates. - Conditional timing arcs with mode groups are controlled by logic values on the instance pins. + Conditional timing arcs with mode groups are controlled by logic values on the instance pins. - set_clock_gating_check + set_clock_gating_check [-setup setup_time][-hold hold_time][-rise][-fall][-high][-low][objects] @@ -10277,6 +10299,7 @@ The setup/hold margin is for the falling edge of the clock enable. + -high @@ -10306,13 +10329,13 @@ If no objects are specified the setup/hold margin is global and applies to all clock gating circuits in the design. If neither of the -rise and -fall options are used the setup/hold margin applies to the rising and falling edges of the clock gating signal. Normally the library cell function is used to determine the active state of the clock. The clock is active high for AND/NAND functions and active low for OR/NOR functions. The -high and -low options are used to specify the active state of the clock for other cells, such as a MUX. If multiple set_clock_gating_check commands apply to a clock gating instance he priority of the commands is shown below (highest to lowest priority). - clock enable pininstanceclock pinclockglobal + clock enable pininstanceclock pinclockglobal - set_clock_groups + set_clock_groups [-name name][-logically_exclusive][-physically_exclusive][-asynchronous][-allow_paths]-group clocks @@ -10367,13 +10390,13 @@ - The set_clock_groups command is used to define groups of clocks that interact with each other. Clocks in different groups do not interact and paths between them are not reported. Use a –group argument for each clock group. + The set_clock_groups command is used to define groups of clocks that interact with each other. Clocks in different groups do not interact and paths between them are not reported. Use a –group argument for each clock group. - set_clock_latency + set_clock_latency [-source][-clock clock][-rise][-fall][-min][-max]delayobjects @@ -10381,7 +10404,7 @@ - -source + -source The latency is at the clock source. @@ -10395,7 +10418,6 @@ If multiple clocks are defined at a pin this use this option to specify the latency for a specific clock. - -rise @@ -10451,7 +10473,7 @@ - set_clock_transition + set_clock_transition [-rise][-fall][-min][-max]transitionclocks @@ -10473,12 +10495,13 @@ Set the transition time for the falling edge of the clock. + -min - Set the min transition time. + Set the min transition time. @@ -10486,7 +10509,7 @@ -max - Set the min transition time. + Set the min transition time. @@ -10510,10 +10533,9 @@ - - set_clock_uncertainty + set_clock_uncertainty [-from|-rise_from|-fall_from from_clock][-to|-rise_to|-fall_to to_clock][-rise][-fall][-setup][-hold]uncertainty[objects] @@ -10524,7 +10546,7 @@ -from from_clock - Inter-clock uncertainty source clock. + Inter-clock uncertainty source clock. @@ -10532,7 +10554,7 @@ -to to_clock - Inter-clock uncertainty target clock. + Inter-clock uncertainty target clock. @@ -10540,7 +10562,7 @@ -rise - Inter-clock target clock rise edge, alternative to ‑rise_to.Inter-clock target clock rise edge, alternative to ‑rise_to. + Inter-clock target clock rise edge, alternative to ‑rise_to.Inter-clock target clock rise edge, alternative to ‑rise_to. @@ -10548,7 +10570,7 @@ -fall - Inter-clock target clock rise edge, alternative to ‑fall_to. + Inter-clock target clock rise edge, alternative to ‑fall_to. @@ -10569,7 +10591,7 @@ - uncertainty + uncertainty Clock uncertainty. @@ -10584,82 +10606,81 @@ - The set_clock_uncertainty command specifies the uncertainty or jitter in a clock. The uncertainty for a clock can be specified on its source pin or port, or the clock itself. - set_clock_uncertainty .1 [get_clock clk1] - Inter-clock uncertainty between the source and target clocks of timing checks is specified with the ‑from|‑rise_from|-fall_from and ‑to|‑rise_to|-fall_to arguments . - set_clock_uncertainty -from [get_clock clk1] -to [get_clocks clk2] .1 - The following commands are equivalent. - set_clock_uncertainty -from [get_clock clk1] -rise_to [get_clocks clk2] .1set_clock_uncertainty -from [get_clock clk1] -to [get_clocks clk2] -rise .1 + The set_clock_uncertainty command specifies the uncertainty or jitter in a clock. The uncertainty for a clock can be specified on its source pin or port, or the clock itself. + set_clock_uncertainty .1 [get_clock clk1] + Inter-clock uncertainty between the source and target clocks of timing checks is specified with the ‑from|‑rise_from|-fall_from and ‑to|‑rise_to|-fall_to arguments . + set_clock_uncertainty -from [get_clock clk1] -to [get_clocks clk2] .1 + The following commands are equivalent. + set_clock_uncertainty -from [get_clock clk1] -rise_to [get_clocks clk2] .1set_clock_uncertainty -from [get_clock clk1] -to [get_clocks clk2] -rise .1 - - set_cmd_units + set_cmd_units - [-capacitance cap_unit][-resistance res_unit][-time time_unit][-voltage voltage_unit][-current current_unit][-power power_unit][-distance distance_unit] + [-capacitance cap_unit][-resistance res_unit][-time time_unit][-voltage voltage_unit][-current current_unit][-power power_unit][-distance distance_unit] - -capacitance cap_unit + -capacitance cap_unit - The capacitance scale factor followed by 'f'. + The capacitance scale factor followed by 'f'. - -resistance res_unit + -resistance res_unit - The resistance scale factor followed by 'ohm'. + The resistance scale factor followed by 'ohm'. - -time time_unit + -time time_unit - The time scale factor followed by 's'. + The time scale factor followed by 's'. - -voltage voltage_unit + -voltage voltage_unit - The voltage scale factor followed by 'v'. + The voltage scale factor followed by 'v'. - -current current_unit + -current current_unit - The current scale factor followed by 'A'. + The current scale factor followed by 'A'. - -power power_unit + -power power_unit - The power scale factor followed by 'w'. + The power scale factor followed by 'w'. - -distance distance_unit + -distance distance_unit - The distance scale factor followed by 'm'. + The distance scale factor followed by 'm'. - The set_cmd_units command is used to change the units used by the STA command interpreter when parsing commands and reporting results. The default units are the units specified in the first Liberty library file that is read. + The set_cmd_units command is used to change the units used by the STA command interpreter when parsing commands and reporting results. The default units are the units specified in the first Liberty library file that is read. Units are specified as a scale factor followed by a unit name. The scale factors are as follows. M 1E+6k 1E+3m 1E-3u 1E-6n 1E-9p 1E-12f 1E-15 An example of the set_units command is shown below. @@ -10670,15 +10691,15 @@ - set_data_check + set_data_check - [-from|-rise_from|-fall_from from_pin][-to|-rise_to|-fall_to to_pin][-setup][-hold][-clock clock]margin + [-from|-rise_from|-fall_from from_pin][-to|-rise_to|-fall_to to_pin][-setup][-hold][-clock clock]margin - -from from_pin + -from from_pin A pin used as the timing check reference. @@ -10686,7 +10707,7 @@ - -to to_pin + -to to_pin A pin that the setup/hold check is applied to. @@ -10710,7 +10731,7 @@ - -clock clock + -clock clock The setup/hold check clock. @@ -10731,7 +10752,7 @@ - set_disable_inferred_clock_gating + set_disable_inferred_clock_gating objects @@ -10746,13 +10767,13 @@ - The set_disable_inferred_clock_gating command disables clock gating checks on a clock gating instance, clock gating pin, or clock gating enable pin. + The set_disable_inferred_clock_gating command disables clock gating checks on a clock gating instance, clock gating pin, or clock gating enable pin. - set_disable_timing + set_disable_timing [-from from_port][-to to_port]objects @@ -10760,18 +10781,18 @@ - -from from_port + -from from_port - + - -to to_port + -to to_port - + @@ -10779,7 +10800,7 @@ objects - A list of instances, ports, pins, cells, cell/port, or library/cell/port. + A list of instances, ports, pins, cells, cell/port, or library/cell/port. @@ -10797,7 +10818,7 @@ - set_drive + set_drive [-rise][-fall][-max][-min]resistanceports @@ -10808,7 +10829,7 @@ -rise - Set the drive rise resistance. + Set the drive rise resistance. @@ -10816,7 +10837,7 @@ -fall - Set the drive fall resistance. + Set the drive fall resistance. @@ -10832,7 +10853,7 @@ -min - Set the minimum resistance. + Set the minimum resistance. @@ -10859,7 +10880,7 @@ - set_driving_cell + set_driving_cell [-lib_cell cell_name][-library library][-rise][-fall][-min][-max][-pin pin][-from_pin from_pin][-input_transition_rise trans_rise][-input_transition_fall trans_fall]ports @@ -10867,18 +10888,18 @@ - -lib_cell cell_name + -lib_cell cell_name - The driving cell. + The driving cell. - -library library + -library library - The driving cell library. + The driving cell library. @@ -10886,7 +10907,7 @@ -rise - Set the driving cell for a rising edge. + Set the driving cell for a rising edge. @@ -10894,7 +10915,7 @@ -fall - Set the driving cell for a falling edge. + Set the driving cell for a falling edge. @@ -10902,7 +10923,7 @@ -max - Set the driving cell for max delays. + Set the driving cell for max delays. @@ -10910,7 +10931,7 @@ -min - Set the driving cell for min delays. + Set the driving cell for min delays. @@ -10931,7 +10952,7 @@ - -input_transition_rise trans_rise + -input_transition_rise trans_rise The transition time for a rising input at from_pin. @@ -10939,7 +10960,7 @@ - -input_transition_fall trans_fall + -input_transition_fall trans_fall The transition time for a falling input at from_pin. @@ -10961,7 +10982,7 @@ - set_false_path + set_false_path [-setup][-hold][-rise][-fall][-from from_list][-rise_from from_list][-fall_from from_list][-through through_list][-rise_through through_list][-fall_through through_list][-to to_list][-rise_to to_list][-fall_to to_list][-reset_path] @@ -11009,7 +11030,7 @@ - -from from_list + -from from_list A list of clocks, instances, ports or pins. @@ -11017,7 +11038,7 @@ - -through through_list + -through through_list A list of instances, pins or nets. @@ -11025,7 +11046,7 @@ - -to to_list + -to to_list A list of clocks, instances, ports or pins. @@ -11042,7 +11063,7 @@ - set_fanout_load + set_fanout_load fanoutport_list @@ -11055,7 +11076,7 @@ - set_hierarchy_separator + set_hierarchy_separator separator @@ -11076,7 +11097,7 @@ - set_ideal_latency + set_ideal_latency [-rise] [-fall] [-min] [-max] delay objects @@ -11089,7 +11110,7 @@ - set_ideal_network + set_ideal_network [-no_propagation] objects @@ -11102,7 +11123,7 @@ - set_ideal_transition + set_ideal_transition [-rise] [-fall] [-min] [-max] transition_time objects @@ -11115,7 +11136,7 @@ - set_input_delay + set_input_delay [-rise][-fall][-max][-min][-clock clock][-clock_fall][-reference_pin ref_pin][-source_latency_included][-network_latency_included][-add_delay]delayport_pin_list @@ -11143,7 +11164,7 @@ -max - Set the maximum arrival time. + Set the maximum arrival time. @@ -11151,12 +11172,12 @@ -min - Set the minimum arrival time. + Set the minimum arrival time. - -clock clock + -clock clock The arrival time is from clock. @@ -11172,7 +11193,7 @@ - -reference_pin ref_pin + -reference_pin ref_pin The arrival time is with respect to the clock that arrives at ref_pin. @@ -11191,7 +11212,7 @@ -network_latency_included - Do not add the clock latency to the delay value when the clock is ideal. + Do not add the clock latency to the delay value when the clock is ideal. @@ -11219,20 +11240,20 @@ - The set_input_delay command is used to specify the arrival time of an input signal. - The following command sets the min, max, rise and fall times on the in1 input port 1.0 time units after the rising edge of clk1. - set_input_delay -clock clk1 1.0 [get_ports in1] - Use multiple commands with the -add_delay option to specify separate arrival times for min, max, rise and fall times or multiple clocks. For example, the following specifies separate arrival times with respect to clocks clk1 and clk2. - set_input_delay -clock clk1 1.0 [get_ports in1]set_input_delay -add_delay -clock clk2 2.0 [get_ports in1] - The –reference_pin option is used to specify an arrival time with respect to the arrival on a pin in the clock network. For propagated clocks, the input arrival time is relative to the clock arrival time at the reference pin (the clock source latency and network latency from the clock source to the reference pin). For ideal clocks, input arrival time is relative to the reference pin clock source latency. With the -clock_fall flag the arrival time is relative to the falling transition at the reference pin. If no clocks arrive at the reference pin the set_input_delay command is ignored. If no -clock is specified the arrival time is with respect to all clocks that arrive at the reference pin. The -source_latency_included and -network_latency_included options cannot be used with -reference_pin. - Paths from inputs that do not have an arrival time defined by set_input_delay are not reported. Set the sta_input_port_default_clock variable to 1 to report paths from inputs without a set_input_delay. + The set_input_delay command is used to specify the arrival time of an input signal. + The following command sets the min, max, rise and fall times on the in1 input port 1.0 time units after the rising edge of clk1. + set_input_delay -clock clk1 1.0 [get_ports in1] + Use multiple commands with the -add_delay option to specify separate arrival times for min, max, rise and fall times or multiple clocks. For example, the following specifies separate arrival times with respect to clocks clk1 and clk2. + set_input_delay -clock clk1 1.0 [get_ports in1]set_input_delay -add_delay -clock clk2 2.0 [get_ports in1] + The –reference_pin option is used to specify an arrival time with respect to the arrival on a pin in the clock network. For propagated clocks, the input arrival time is relative to the clock arrival time at the reference pin (the clock source latency and network latency from the clock source to the reference pin). For ideal clocks, input arrival time is relative to the reference pin clock source latency. With the -clock_fall flag the arrival time is relative to the falling transition at the reference pin. If no clocks arrive at the reference pin the set_input_delay command is ignored. If no -clock is specified the arrival time is with respect to all clocks that arrive at the reference pin. The -source_latency_included and -network_latency_included options cannot be used with -reference_pin. + Paths from inputs that do not have an arrival time defined by set_input_delay are not reported. Set the sta_input_port_default_clock variable to 1 to report paths from inputs without a set_input_delay. - set_input_transition + set_input_transition [-rise][-fall][-max][-min]transitionport_list @@ -11251,7 +11272,7 @@ -fall - Set the falling edge transition. + Set the falling edge transition. @@ -11293,7 +11314,7 @@ - set_level_shifter_strategy + set_level_shifter_strategy [-rule rule_type] @@ -11306,7 +11327,7 @@ - set_level_shifter_threshold + set_level_shifter_threshold [-voltage voltage] @@ -11319,7 +11340,7 @@ - set_load + set_load [-rise][-fall][-max][-min][-subtract_pin_load][-pin_load][-wire_load]capacitanceobjects @@ -11338,7 +11359,7 @@ -fall - Set the external port falling capacitance (ports only). + Set the external port falling capacitance (ports only). @@ -11347,7 +11368,7 @@ -max - Set the max capacitance. + Set the max capacitance. @@ -11355,7 +11376,7 @@ -min - Set the min capacitance. + Set the min capacitance. @@ -11363,7 +11384,7 @@ -subtract_pin_load - Subtract the capacitance of all instance pins connected to the net from capacitance (nets only). If the resulting capacitance is negative, zero is used. Pin capacitances are ignored by delay calculation when this option is used. + Subtract the capacitance of all instance pins connected to the net from capacitance (nets only). If the resulting capacitance is negative, zero is used. Pin capacitances are ignored by delay calculation when this option is used. @@ -11400,15 +11421,15 @@ The set_load command annotates wire capacitance on a net or external capacitance on a port. There are four different uses for the set_load commanc: - set_load -wire_load port external port wire capacitanceset_load -pin_load port external port pin capacitanceset_load port same as -pin_loadset_load net net wire capacitance - External port capacitance can be annotated separately with the -pin_load and ‑wire_load options. Without the -pin_load and -wire_load options pin capacitance is annotated. - When annotating net wire capacitance with the -subtract_pin_load option the capacitance of all instance pins connected to the net is subtracted from capacitance. Setting the capacitance on a net overrides SPEF parasitics for delay calculation. + set_load -wire_load port external port wire capacitanceset_load -pin_load port external port pin capacitanceset_load port same as -pin_loadset_load net net wire capacitance + External port capacitance can be annotated separately with the -pin_load and ‑wire_load options. Without the -pin_load and -wire_load options pin capacitance is annotated. + When annotating net wire capacitance with the -subtract_pin_load option the capacitance of all instance pins connected to the net is subtracted from capacitance. Setting the capacitance on a net overrides SPEF parasitics for delay calculation. - set_logic_dc + set_logic_dc port_list @@ -11429,7 +11450,7 @@ - set_logic_one + set_logic_one port_list @@ -11451,7 +11472,7 @@ - set_logic_zero + set_logic_zero port_list @@ -11472,7 +11493,7 @@ - set_max_area + set_max_area area @@ -11493,7 +11514,7 @@ - set_max_capacitance + set_max_capacitance capacitanceobjects @@ -11522,10 +11543,10 @@ - set_max_delay + set_max_delay - [-rise][-fall][-from from_list][-rise_from from_list][-fall_from from_list][-through through_list][-rise_through through_list][-fall_through through_list][-to to_list][-rise_to to_list][-fall_to to_list][-ignore_clock_latency][-probe][-reset_path]delay + [-rise][-fall][-from from_list][-rise_from from_list][-fall_from from_list][-through through_list][-rise_through through_list][-fall_through through_list][-to to_list][-rise_to to_list][-fall_to to_list][-ignore_clock_latency][-probe][-reset_path]delay @@ -11541,7 +11562,7 @@ -fall - Set max delay for falling paths. + Set max delay for falling paths. @@ -11579,10 +11600,10 @@ - -probe + -probe - Do not break paths at internal pins (non startpoints). + Do not break paths at internal pins (non startpoints). @@ -11609,7 +11630,7 @@ - set_max_dynamic_power + set_max_dynamic_power power [unit] @@ -11622,7 +11643,7 @@ - set_max_fanout + set_max_fanout fanoutobjects @@ -11651,7 +11672,7 @@ - set_max_leakage_power + set_max_leakage_power power [unit] @@ -11664,7 +11685,7 @@ - set_max_time_borrow + set_max_time_borrow delayobjects @@ -11688,13 +11709,13 @@ - The set_max_time_borrow command specifies the maximum amount of time that latches can borrow. Time borrowing is the time that a data input to a transparent latch arrives after the latch opens. + The set_max_time_borrow command specifies the maximum amount of time that latches can borrow. Time borrowing is the time that a data input to a transparent latch arrives after the latch opens. - set_max_transition + set_max_transition [-data_path][-clock_path][-rise][-fall]transitionobjects @@ -11702,34 +11723,34 @@ - -data_path + -data_path - Set the max slew for data paths. + Set the max slew for data paths. - -clock_path + -clock_path - Set the max slew for clock paths. + Set the max slew for clock paths. - -rise + -rise - Set the max slew for rising paths. + Set the max slew for rising paths. - -fall + -fall - Set the max slew for falling paths. + Set the max slew for falling paths. @@ -11757,7 +11778,7 @@ - set_min_capacitance + set_min_capacitance capacitanceobjects @@ -11768,7 +11789,7 @@ capacitance - Minimum capacitance. + Minimum capacitance. @@ -11787,7 +11808,7 @@ - set_min_delay + set_min_delay [-rise][-fall][-from from_list][-rise_from from_list][-fall_from from_list][-through through_list][-rise_through through_list][-fall_through through_list][-to to_list][-rise_to to_list][-fall_to to_list][-ignore_clock_latency][-probe][-reset_path]delay @@ -11806,7 +11827,7 @@ -fall - Set min delay for falling paths. + Set min delay for falling paths. @@ -11843,10 +11864,10 @@ - -probe + -probe - Do not break paths at internal pins (non startpoints). + Do not break paths at internal pins (non startpoints). @@ -11862,7 +11883,7 @@ delay - The minimum delay. + The minimum delay. @@ -11874,7 +11895,7 @@ - set_min_pulse_width + set_min_pulse_width [-high][-low]min_widthobjects @@ -11919,7 +11940,7 @@ - set_multicycle_path + set_multicycle_path [-setup][-hold][-rise][-fall][-start][-end][-from from_list][-rise_from from_list][-fall_from from_list][-through through_list][-rise_through through_list][-fall_through through_list][-to to_list][-rise_to to_list][-fall_to to_list][-reset_path]path_multiplier @@ -11946,7 +11967,7 @@ -rise - Set cycle count for rising path edges. + Set cycle count for rising path edges. @@ -11954,7 +11975,7 @@ -fall - Set cycle count for falling path edges. + Set cycle count for falling path edges. @@ -12021,15 +12042,15 @@ - set_operating_conditions + set_operating_conditions - [-analysis_type single|bc_wc|on_chip_variation][-library lib][condition][-min min_condition][-max max_condition][-min_library min_lib][-max_library max_lib] + [-analysis_type single|bc_wc|on_chip_variation][-library lib][condition][-min min_condition][-max max_condition][-min_library min_lib][-max_library max_lib] - -analysis_type single + -analysis_type single Use one operating condition for min and max paths. @@ -12037,7 +12058,7 @@ - -analysis_type bc_wc + -analysis_type bc_wc Best case, worst case analysis. Setup checks use max_condition for clock and data paths. Hold checks use the min_condition for clock and data paths. @@ -12045,7 +12066,7 @@ - ‑analysis_type on_chip_variation + ‑analysis_type on_chip_variation The min and max operating conditions represent variations on the chip that can occur simultaneously. Setup checks use max_condition for data paths and min_condition for clock paths. Hold checks use min_condition for data paths and max_condition for clock paths. This is the default analysis type. @@ -12085,7 +12106,7 @@ - -min_library min_lib + -min_library min_lib The name of the library that contains min_condition. @@ -12093,7 +12114,7 @@ - -max_library max_lib + -max_library max_lib The name of the library that contains max_condition. @@ -12106,7 +12127,7 @@ - set_output_delay + set_output_delay [-rise][-fall][-max][-min][-clock clock][-clock_fall][-reference_pin ref_pin][-source_latency_included][-network_latency_included][-add_delay]delayport_pin_list @@ -12125,7 +12146,7 @@ -fall - Set the output delay for the falling edge of the input. + Set the output delay for the falling edge of the input. @@ -12133,7 +12154,7 @@ -max - Set the maximum output delay. + Set the maximum output delay. @@ -12141,15 +12162,15 @@ -min - Set the minimum output delay. + Set the minimum output delay. - -clock clock + -clock clock - The external check is to clock. The default clock edge is rising. + The external check is to clock. The default clock edge is rising. @@ -12157,12 +12178,12 @@ -clock_fall - The external check is to the falling edge of clock. + The external check is to the falling edge of clock. - -reference_pin ref_pin + -reference_pin ref_pin The external check is clocked by the clock that arrives at ref_pin. @@ -12194,13 +12215,13 @@ The set_output_delay command is used to specify the external delay to a setup/hold check on an output port or internal pin that is clocked by clock. Unless the -add_delay option is specified any existing output delays are replaced. - The –reference_pin option is used to specify a timing check with respect to the arrival on a pin in the clock network. For propagated clocks, the timing check is relative to the clock arrival time at the reference pin (the clock source latency and network latency from the clock source to the reference pin). For ideal clocks, the timing check is relative to the reference pin clock source latency. With the -clock_fall flag the timing check is relative to the falling edge of the reference pin. If no clocks arrive at the reference pin the set_output_delay command is ignored. If no -clock is specified the timing check is with respect to all clocks that arrive at the reference pin. The -source_latency_included and -network_latency_included options cannot be used with -reference_pin. + The –reference_pin option is used to specify a timing check with respect to the arrival on a pin in the clock network. For propagated clocks, the timing check is relative to the clock arrival time at the reference pin (the clock source latency and network latency from the clock source to the reference pin). For ideal clocks, the timing check is relative to the reference pin clock source latency. With the -clock_fall flag the timing check is relative to the falling edge of the reference pin. If no clocks arrive at the reference pin the set_output_delay command is ignored. If no -clock is specified the timing check is with respect to all clocks that arrive at the reference pin. The -source_latency_included and -network_latency_included options cannot be used with -reference_pin. - set_port_fanout_number + set_port_fanout_number [-min][-max]fanoutports @@ -12219,7 +12240,7 @@ -max - Set the max fanout. + Set the max fanout. @@ -12239,13 +12260,13 @@ - Set the external fanout for ports. + Set the external fanout for ports. - set_power_activity + set_power_activity [-global][-input][-input_ports ports][-pins pins][-activity activity | -density density][-duty duty][-clock clock] @@ -12285,18 +12306,18 @@ - -activity activity + -activity activity - The activity, or number of transitions per clock cycle. If clock is not specified the clock with the minimum period is used. If no clocks are defined an error is reported. + The activity, or number of transitions per clock cycle. If clock is not specified the clock with the minimum period is used. If no clocks are defined an error is reported. - -density density + -density density - Transitions per library time unit. + Transitions per library time unit. @@ -12309,22 +12330,22 @@ - -clock clock + -clock clock - The clock to use for the period with -activity. This option is ignored if -density is used. + The clock to use for the period with -activity. This option is ignored if -density is used. - The set_power_activity command is used to set the activity and duty used for power analysis globally or for input ports or pins in the design. - The default input activity for inputs is 0.1 transitions per minimum clock period if a clock is defined or 0.0 if there are no clocks defined. The default input duty is 0.5. This is equivalent to the following command: - set_power_activity -input -activity 0.1 -duty 0.5 + The set_power_activity command is used to set the activity and duty used for power analysis globally or for input ports or pins in the design. + The default input activity for inputs is 0.1 transitions per minimum clock period if a clock is defined or 0.0 if there are no clocks defined. The default input duty is 0.5. This is equivalent to the following command: + set_power_activity -input -activity 0.1 -duty 0.5 - set_propagated_clock + set_propagated_clock objects @@ -12345,11 +12366,11 @@ - set_pvt + set_pvt - [-min][-max][-process process][-voltage voltage] - [-temperature temperature]instances + [-min][-max][-process process][-voltage voltage] + [-temperature temperature]instances @@ -12408,7 +12429,7 @@ - set_sense + set_sense [-type clock|data][-positive][-negative][-pulse pulse_type][-stop_propagation][-clock clocks]pins @@ -12416,18 +12437,18 @@ - -type clock + -type clock - Set the sense for clock paths. + Set the sense for clock paths. - -type data + -type data - Set the sense for data paths (not supported). + Set the sense for data paths (not supported). @@ -12448,7 +12469,7 @@ - -pulse pulse_type + -pulse pulse_type rise_triggered_high_pulserise_triggered_low_pulsefall_triggered_high_pulsefall_triggered_low_pulseNot supported. @@ -12486,7 +12507,7 @@ - set_timing_derate + set_timing_derate [-rise][-fall][-early][-late][-clock][-data][-net_delay][-cell_delay][-cell_check]derate[objects] @@ -12497,7 +12518,7 @@ -rise - Set the derating for rising delays. + Set the derating for rising delays. @@ -12505,7 +12526,7 @@ -fall - Set the derating for falling delays. + Set the derating for falling delays. @@ -12588,7 +12609,7 @@ - set_resistance + set_resistance [-max][-min]resistancenets @@ -12634,72 +12655,72 @@ - set_units + set_units - [-capacitance cap_unit][-resistance res_unit][-time time_unit][-voltage voltage_unit][-current current_unit][-power power_unit][-distance distance_unit] + [-capacitance cap_unit][-resistance res_unit][-time time_unit][-voltage voltage_unit][-current current_unit][-power power_unit][-distance distance_unit] - -capacitance cap_unit + -capacitance cap_unit - The capacitance scale factor followed by 'f'. + The capacitance scale factor followed by 'f'. - -resistance res_unit + -resistance res_unit - The resistance scale factor followed by 'ohm'. + The resistance scale factor followed by 'ohm'. - -time time_unit + -time time_unit - The time scale factor followed by 's'. + The time scale factor followed by 's'. - -voltage voltage_unit + -voltage voltage_unit - The voltage scale factor followed by 'v'. + The voltage scale factor followed by 'v'. - -current current_unit + -current current_unit - The current scale factor followed by 'A'. + The current scale factor followed by 'A'. - -power power_unit + -power power_unit - The power scale factor followed by 'w'. + The power scale factor followed by 'w'. The set_units command is used to check the units used by the STA command interpreter when parsing commands and reporting results. If the current units differ from the set_unit value a warning is printed. Use the set_cmd_units command to change the command units. Units are specified as a scale factor followed by a unit name. The scale factors are as follows. - M 1E+6k 1E+3m 1E-3u 1E-6n 1E-9p 1E-12f 1E-15 + M 1E+6k 1E+3m 1E-3u 1E-6n 1E-9p 1E-12f 1E-15 An example of the set_units command is shown below. - set_units -time ns -capacitance pF -current mA -voltage V -resistance kOhm + set_units -time ns -capacitance pF -current mA -voltage V -resistance kOhm - set_wire_load_min_block_size + set_wire_load_min_block_size size @@ -12712,7 +12733,7 @@ - set_wire_load_mode + set_wire_load_mode top|enclosed|segmented @@ -12749,7 +12770,7 @@ - set_wire_load_model + set_wire_load_model -name model_name[-library library][-max][-min][objects] @@ -12757,7 +12778,7 @@ - -name model_name + -name model_name The name of a wire load model. @@ -12765,7 +12786,7 @@ - -library library + -library library Library to look for model_name. @@ -12802,7 +12823,7 @@ - set_wire_load_selection_group + set_wire_load_selection_group [-library library][-max][-min]group_name[objects] @@ -12856,28 +12877,28 @@ - suppress_msg + suppress_msg - msg_ids + msg_ids - msg_ids + msg_ids - A list of error/warning message IDs to suppress. + A list of error/warning message IDs to suppress. - The suppress_msg command suppresses specified error/warning messages by ID. The list of message IDs can be found in doc/messages.txt. + The suppress_msg command suppresses specified error/warning messages by ID. The list of message IDs can be found in doc/messages.txt. - unset_case_analysis + unset_case_analysis port_or_pin_list @@ -12898,7 +12919,7 @@ - unset_clock_latency + unset_clock_latency [-source]objects @@ -12927,7 +12948,7 @@ - unset_clock_transition + unset_clock_transition clocks @@ -12949,7 +12970,7 @@ - unset_clock_uncertainty + unset_clock_uncertainty [-from|-rise_from|-fall_from from_clock][-to|-rise_to|-fall_to to_clock][-rise][-fall][-setup][-hold][objects] @@ -12957,7 +12978,7 @@ - -from from_clock + -from from_clock @@ -12965,7 +12986,7 @@ - -to to_clock + -to to_clock @@ -13005,7 +13026,7 @@ - uncertainty + uncertainty Clock uncertainty. @@ -13026,15 +13047,15 @@ - unset_data_check + unset_data_check - [-from|-rise_from|-fall_from from_object][-to|-rise_to|-fall_to to_object][-setup][-hold][-clock clock] + [-from|-rise_from|-fall_from from_object][-to|-rise_to|-fall_to to_object][-setup][-hold][-clock clock] - -from from_object + -from from_object A pin used as the timing check reference. @@ -13042,7 +13063,7 @@ - -to to_object + -to to_object A pin that the setup/hold check is applied to. @@ -13066,7 +13087,7 @@ - clock + clock The setup/hold check clock. @@ -13079,7 +13100,7 @@ - unset_disable_inferred_clock_gating + unset_disable_inferred_clock_gating objects @@ -13094,13 +13115,13 @@ - The unset_disable_inferred_clock_gating command removes a previous set_disable_inferred_clock_gating command. + The unset_disable_inferred_clock_gating command removes a previous set_disable_inferred_clock_gating command. - unset_disable_timing + unset_disable_timing [-from from_port][-to to_port]objects @@ -13111,7 +13132,7 @@ from_port - + @@ -13119,7 +13140,7 @@ to_port - + @@ -13137,7 +13158,7 @@ - unset_input_delay + unset_input_delay [-rise][-fall][-max][-min][-clock clock][-clock_fall]port_pin_list @@ -13172,7 +13193,7 @@ -min - Unset the maximum arrival time. + Unset the maximum arrival time. @@ -13207,7 +13228,7 @@ - unset_output_delay + unset_output_delay [-rise][-fall][-max][-min][-clock clock][-clock_fall]port_pin_list @@ -13276,10 +13297,10 @@ - unset_path_exceptions + unset_path_exceptions - [-setup][-hold][-rise][-fall][-from|-rise_from|-fall_from from][-through|-rise_through|-fall_through through][-to|-rise_to|-fall_to to] + [-setup][-hold][-rise][-fall][-from|-rise_from|-fall_from from][-through|-rise_through|-fall_through through][-to|-rise_to|-fall_to to] @@ -13295,7 +13316,7 @@ -hold - Unset path exceptions for hold checks. + Unset path exceptions for hold checks. @@ -13303,7 +13324,7 @@ -rise - Unset path exceptions for rising path edges. + Unset path exceptions for rising path edges. @@ -13312,7 +13333,7 @@ -fall - Unset path exceptions for falling path edges. + Unset path exceptions for falling path edges. @@ -13325,7 +13346,7 @@ - -through through + -through through A list of instances, pins or nets. @@ -13341,66 +13362,66 @@ The unset_path_exceptions command removes any matching set_false_path, set_multicycle_path, set_max_delay, and set_min_delay exceptions. - + - unset_power_activity + unset_power_activity - [-global][-input][-input_ports ports][-pins pins] + [-global][-input][-input_ports ports][-pins pins] - -global + -global - Set the activity/duty for all non-clock pins. + Set the activity/duty for all non-clock pins. - -input + -input - Set the default input port activity/duty. + Set the default input port activity/duty. - -input_ports input_ports + -input_ports input_ports - Set the input port activity/duty. + Set the input port activity/duty. - -pins pins + -pins pins - Set the pin activity/duty. + Set the pin activity/duty. - -activity activity + -activity activity - The activity, or number of transitions per clock cycle. If clock is not specified the clock with the minimum period is used. If no clocks are defined an error is reported. + The activity, or number of transitions per clock cycle. If clock is not specified the clock with the minimum period is used. If no clocks are defined an error is reported. - The unset_power_activity_command is used to undo the effects of the set_power_activity command. + The unset_power_activity_command is used to undo the effects of the set_power_activity command. - unset_propagated_clock + unset_propagated_clock objects @@ -13421,42 +13442,42 @@ - unset_timing_derate + unset_timing_derate - Remove all derating factors set with the set_timing_derate command. + Remove all derating factors set with the set_timing_derate command. - unsuppress_msg + unsuppress_msg - msg_ids + msg_ids - msg_ids + msg_ids - A list of error/warning message IDs to unsuppress. + A list of error/warning message IDs to unsuppress. - The unsuppress_msg command removes suppressions for the specified error/warning messages by ID. The list of message IDs can be found in doc/messages.txt. + The unsuppress_msg command removes suppressions for the specified error/warning messages by ID. The list of message IDs can be found in doc/messages.txt. - user_run_time + user_run_time @@ -13469,7 +13490,7 @@ - with_output_to_variable + with_output_to_variable var { commands } @@ -13492,21 +13513,21 @@ - The with_output_to_variable command redirects the output of TCL commands to a variable. + The with_output_to_variable command redirects the output of TCL commands to a variable. - write_path_spice + write_path_spice - -path_args path_args-spice_directory spice_directory-lib_subckt_file lib_subckts_file-model_file model_file-power power-ground ground[-simulator hspice|ngspice|xyce] + -path_args path_args-spice_directory spice_directory-lib_subckt_file lib_subckts_file-model_file model_file-power power-ground ground[-simulator hspice|ngspice|xyce] - path_args + path_args -from|-through|-to arguments as in report_checks. @@ -13514,15 +13535,15 @@ - spice_directory + spice_directory - Directory for spice to write output files. + Directory for spice to write output files. - lib_subckts_file + lib_subckts_file Cell transistor level subckts. @@ -13530,7 +13551,7 @@ - model_file + model_file Transistor model definitions .included by spice_file. @@ -13538,7 +13559,7 @@ - power + power Voltage supply name in voltage_map of the default liberty library. @@ -13546,7 +13567,7 @@ - ground + ground Ground supply name in voltage_map of the default liberty library. @@ -13554,25 +13575,25 @@ - -simulator + -simulator - Simulator that will read the spice netlist. + Simulator that will read the spice netlist. The write_path_spice command writes a spice netlist for timing paths. Use path_args to specify -from/-through/-to as arguments to the find_timing_paths command. For each path, a spice netlist and the subckts referenced by the path are written in spice_directory. The spice netlist is written in path_<id>.sp and subckt file is path_<id>.subckt. The spice netlists used by the path are written to subckt_file, which spice_file .includes. The device models used by the spice subckt netlists in model_file are also .included in spice_file. Power and ground names are specified with the -power and -ground arguments. The spice netlist includes a piecewise linear voltage source at the input and .measure statement for each gate delay and pin slew. - Example command: - write_path_spice -path_args {-from "in0" -to "out1" -unconstrained} \ -spice_directory $result_dir \ -lib_subckt_file "write_spice1.subckt" \ -model_file "write_spice1.models" \ -power VDD -ground VSS - When the simulator is hspice, .measure statements will be added to the spice netlist. - When the simulator is Xyce, the .print statement selects the CSV format and writes the waveform data to a file name path_<id>.csv so the results can be used by gnuplot. + Example command: + write_path_spice -path_args {-from "in0" -to "out1" -unconstrained} \ -spice_directory $result_dir \ -lib_subckt_file "write_spice1.subckt" \ -model_file "write_spice1.models" \ -power VDD -ground VSS + When the simulator is hspice, .measure statements will be added to the spice netlist. + When the simulator is Xyce, the .print statement selects the CSV format and writes the waveform data to a file name path_<id>.csv so the results can be used by gnuplot. - write_sdc + write_sdc [-digits digits][-gzip][-no_timestamp]filename @@ -13617,7 +13638,7 @@ - write_sdf + write_sdf [-corner corner][-divider /|.][-include_typ][-digits digits][-gzip][-no_timestamp][-no_version]filename @@ -13650,7 +13671,7 @@ - -digits digits + -digits digits The number of digits after the decimal point to report. The default is 4. @@ -13689,75 +13710,75 @@ - Write the delay calculation delays for the design in SDF format to filename. If -corner is not specified the min/max delays are across all corners. With -corner the min/max delays for corner are written. The SDF TIMESCALE is same as the time_unit in the first liberty file read. + Write the delay calculation delays for the design in SDF format to filename. If -corner is not specified the min/max delays are across all corners. With -corner the min/max delays for corner are written. The SDF TIMESCALE is same as the time_unit in the first liberty file read. - write_timing_model + write_timing_model - [-library_name lib_name][-cell_name cell_name] - [-corner corner]filename + [-library_name lib_name][-cell_name cell_name] + [-corner corner]filename - -library_name lib_name + -library_name lib_name - The name to use for the liberty library. Defaults to cell_name. + The name to use for the liberty library. Defaults to cell_name. - -cell_name cell_name + -cell_name cell_name - The name to use for the liberty cell. Defaults to the top level module name. + The name to use for the liberty cell. Defaults to the top level module name. - -corner corner + -corner corner - The process corner to use for extracting the model. + The process corner to use for extracting the model. - filename + filename - Filename for the liberty timing model. + Filename for the liberty timing model. - The write_timing_model command constructs a liberty timing model for the current design and writes it to filename. cell_name defaults to the cell name of the top level block in the design. - The SDC used to extract the block should include the clock definitions. If the block contains a clock network set_propagated_clock should be used so the clock delays are included in the timing model. The following SDC commands are ignored when building the timing model. + The write_timing_model command constructs a liberty timing model for the current design and writes it to filename. cell_name defaults to the cell name of the top level block in the design. + The SDC used to extract the block should include the clock definitions. If the block contains a clock network set_propagated_clock should be used so the clock delays are included in the timing model. The following SDC commands are ignored when building the timing model. set_input_delayset_output_delayset_loadset_timing_derate - Using set_input_transition with the slew from the block context will be used will improve the match between the timing model and the block netlist. Paths defined on clocks that are defined on internal pins are ignored because the model has no way to include the clock definition. + Using set_input_transition with the slew from the block context will be used will improve the match between the timing model and the block netlist. Paths defined on clocks that are defined on internal pins are ignored because the model has no way to include the clock definition. The resulting timing model can be used in a hierarchical timing flow as a replacement for the block to speed up timing analysis. This hierarchical timing methodology does not handle timing exceptions that originate or terminate inside the block. The timing model includes: combinational paths between inputs and outputssetup and hold timing constraints on inputsclock to output timing paths - Resistance of long wires on inputs and outputs of the block cannot be modeled in Liberty. To reduce inaccuracies from wire resistance in technologies with resistive wires place buffers on inputs and ouputs. + Resistance of long wires on inputs and outputs of the block cannot be modeled in Liberty. To reduce inaccuracies from wire resistance in technologies with resistive wires place buffers on inputs and ouputs. The extracted timing model setup/hold checks are scalar (no input slew dependence). Delay timing arcs are load dependent but do not include input slew dependency. - write_verilog + write_verilog - [-sort] - [-include_pwr_gnd][-remove_cells lib_cells]filename + [-sort] + [-include_pwr_gnd][-remove_cells lib_cells]filename - -sort + -sort Sort the instances in the netlist. @@ -13765,7 +13786,7 @@ - -include_pwr_gnd + -include_pwr_gnd Include power and ground pins on instances. @@ -13773,7 +13794,7 @@ - -remove_cells lib_cells + -remove_cells lib_cells Liberty cells to remove from the Verilog netlist. Use get_lib_cells, a list of cells names, or a cell name with wildcards. @@ -13781,16 +13802,16 @@ - filename + filename Filename for the liberty library. - The write_verilog command writes a Verilog netlist to filename. Use -sort to sort the instances so the results are reproducible across operating systems. Use -remove_cells to remove instances of lib_cells from the netlist. - Filter Expressions - The get_cells, get_pins, get_ports and get_timing_edges functions support filtering the returned objects by property values. Supported filter expressions are shown below. + The write_verilog command writes a Verilog netlist to filename. Use -sort to sort the instances so the results are reproducible across operating systems. Use -remove_cells to remove instances of lib_cells from the netlist. + Filter Expressions + The get_cells, get_pins, get_ports and get_timing_edges functions support filtering the returned objects by property values. Supported filter expressions are shown below. @@ -13799,7 +13820,7 @@ property - Return objects with property value equal to 1. + Return objects with property value equal to 1. @@ -13807,7 +13828,7 @@ property==value - Return objects with property value equal to value. + Return objects with property value equal to value. @@ -13815,7 +13836,7 @@ property=~pattern - Return objects with property value that matches pattern. + Return objects with property value that matches pattern. @@ -13823,7 +13844,7 @@ property!=value - Return objects with property value not equal to value. + Return objects with property value not equal to value. @@ -13831,7 +13852,7 @@ property!~value - Return objects with property value that does not match pattern. + Return objects with property value that does not match pattern. @@ -13839,7 +13860,7 @@ expr1&&expr2 - Return objects with expr1 and expr2. expr1 and expr2 are one of the first three property value forms shown above. + Return objects with expr1 and expr2. expr1 and expr2 are one of the first three property value forms shown above. @@ -13848,18 +13869,18 @@ expr1||expr2 - Return objects with expr1 or expr2. expr1 and expr2 are one of the first three property value forms shown above. + Return objects with expr1 or expr2. expr1 and expr2 are one of the first three property value forms shown above. Where property is a property supported by the get_property command. Note that if there are spaces in the expression it must be enclosed in quotes so that it is a single argument. - Variables + Variables - hierarchy_separator + hierarchy_separator Any character. @@ -13872,7 +13893,7 @@ - sta_bidirect_net_paths_enabled + sta_bidirect_net_paths_enabled 0|1 @@ -13885,7 +13906,7 @@ - sta_continue_on_error + sta_continue_on_error 0|1 @@ -13898,20 +13919,20 @@ - sta_crpr_mode + sta_crpr_mode same_pin|same_transition - When the data and clock paths of a timing check overlap (see sta_crpr_enabled), pessimism is removed independent of whether of the path rise/fall transitions. When sta_crpr_mode is same_transition, the pessimism is only removed if the path rise/fall transitions are the same. The default value is same_pin. + When the data and clock paths of a timing check overlap (see sta_crpr_enabled), pessimism is removed independent of whether of the path rise/fall transitions. When sta_crpr_mode is same_transition, the pessimism is only removed if the path rise/fall transitions are the same. The default value is same_pin. - sta_cond_default_arcs_enabled + sta_cond_default_arcs_enabled 0|1 @@ -13924,7 +13945,7 @@ - sta_crpr_enabled + sta_crpr_enabled 0|1 @@ -13937,7 +13958,7 @@ - sta_dynamic_loop_breaking + sta_dynamic_loop_breaking 0|1 @@ -13950,20 +13971,20 @@ - sta_gated_clock_checks_enabled + sta_gated_clock_checks_enabled 0|1 - When sta_gated_clock_checks_enabled is 1, clock gating setup and hold timing checks are checked. The default value is 1. + When sta_gated_clock_checks_enabled is 1, clock gating setup and hold timing checks are checked. The default value is 1. - sta_input_port_default_clock + sta_input_port_default_clock 0|1 @@ -13976,7 +13997,7 @@ - sta_internal_bidirect_instance_paths_enabled + sta_internal_bidirect_instance_paths_enabled 0|1 @@ -13989,7 +14010,7 @@ - sta_pocv_enabled + sta_pocv_enabled 0|1 @@ -14002,14 +14023,14 @@ - sta_propagate_all_clocks + sta_propagate_all_clocks 0|1 - All clocks defined after sta_propagate_all_clocks is set to 1 are propagated. If it is set before any clocks are defined it has the same effect as + All clocks defined after sta_propagate_all_clocks is set to 1 are propagated. If it is set before any clocks are defined it has the same effect as set_propagated_clock [all_clocks] After all clocks have been defined. The default value is 0. @@ -14017,34 +14038,34 @@ - sta_propagate_gated_clock_enable + sta_propagate_gated_clock_enable 0|1 - When set to 1, paths of gated clock enables are propagated through the clock gating instances. If the gated clock controls sequential elements setting sta_propagate_gated_clock_enable to 0 prevents spurious paths from the clock enable. The default value is 1. + When set to 1, paths of gated clock enables are propagated through the clock gating instances. If the gated clock controls sequential elements setting sta_propagate_gated_clock_enable to 0 prevents spurious paths from the clock enable. The default value is 1. - sta_recovery_removal_checks_enabled + sta_recovery_removal_checks_enabled 0|1 - When sta_recovery_removal_checks_enabled is 0, recovery and removal timing checks are disabled. The default value is 1. + When sta_recovery_removal_checks_enabled is 0, recovery and removal timing checks are disabled. The default value is 1. - sta_report_default_digits + sta_report_default_digits integer @@ -14057,7 +14078,7 @@ - sta_preset_clear_arcs_enabled + sta_preset_clear_arcs_enabled 0|1 @@ -14090,184 +14111,184 @@ - Alphabetical Index + Alphabetical Index - all_clocks6 - all_inputs6 - all_outputs6 - all_registers6 - check_setup7 - Command Line Arguments1 - Commands6 - connect_pin7 - create_generated_clock9 - create_voltage_area10 - current_design10 - current_instance10 - define_corners11 - delete_clock11 - delete_from_list11 - delete_generated_clock11 - delete_instance11 - delete_net12 - disconnect_pin12 - elapsed_run_time12 - Example Command Scripts1 - Filter Expressions80 - find_timing_paths13 - get_cells14 - get_clocks15 - get_fanin16 - get_fanout16 - get_full_name17 - get_lib_pins18 - get_libs18 - get_name20 - get_nets19 - get_pins20 - get_ports21 - get_property21 - get_timing_edges24 - group_path25 - hierarchy_separator80 - include26 - link_design26 - make_instance26 - make_net27 - Power Analysis2 - read_liberty27 - read_saif28 - read_sdc28 - read_sdf28 - read_spef29 - read_vcd31 - read_verilog31 - redirection4 - replace_activity_annotation31 - replace_cell31 - report_annotated_check32 - report_annotated_delay33 - report_check_types36 - report_checks34 - report_clock_latency37 - report_clock_min_period38 - report_clock_properties38 - report_clock_skew38 - report_dcalc39 - report_disabled_edges39 - report_edges39 - report_instance40 - report_lib_cell40 - report_net40 - report_parasitic_annotation40 - report_power41 - report_pulse_width_checks41 - report_slews42 - report_tns42 - report_units42 - report_wns43 - report_worst_slack43 - set_assigned_check43 - set_assigned_delay44 - set_assigned_transition45 - set_case_analysis46 - set_clock_gating_check46 - set_clock_groups47 - set_clock_latency47 - set_clock_transition48 - set_clock_uncertainty49 - set_cmd_units50 - set_data_check51 - set_disable_inferred_clock_gating51 - set_disable_timing51 - set_drive52 - set_driving_cell53 - set_false_path54 - set_fanout_load55 - set_hierarchy_separator55 - set_ideal_latency55 - set_ideal_network55 - set_ideal_transition55 - set_input_delay55 - set_input_transition57 - set_level_shifter_strategy57 - set_level_shifter_threshold57 - set_load57 - set_logic_dc58 - set_logic_one58 - set_logic_zero59 - set_max_area59 - set_max_capacitance59 - set_max_delay59 - set_max_dynamic_power60 - set_max_fanout60 - set_max_leakage_power60 - set_max_time_borrow60 - set_max_transition61 - set_min_capacitance61 - set_min_delay62 - set_min_pulse_width62 - set_multicycle_path63 - set_operating_conditions64 - set_output_delay65 - set_port_fanout_number66 - set_power_activity66 - set_propagated_clock67 - set_pvt67 - set_resistance69 - set_sense68 - set_timing_derate69 - set_units70 - set_wire_load_min_block_size71 - set_wire_load_mode71 - set_wire_load_model71 - set_wire_load_selection_group71 - SPEF30 - sta_bidirect_net_paths_enabled80 - sta_cond_default_arcs_enabled81 - sta_continue_on_error80 - sta_crpr_enabled81 - sta_crpr_mode81 - sta_dynamic_loop_breaking81 - sta_gated_clock_checks_enabled81 - sta_input_port_default_clock81 - sta_internal_bidirect_instance_paths_enabled81 - sta_pocv_enabled82 - sta_preset_clear_arcs_enabled82 - sta_propagate_all_clocks82 - sta_propagate_gated_clock_enable82 - sta_recovery_removal_checks_enabled82 - sta_report_default_digits82 - suppress_msg72 - TCL Interpreter3 - Timing Analysis using SDF2 - Timing Analysis with Multiple Process Corners2 - unset_case_analysis72 - unset_clock_latency72 - unset_clock_transition72 - unset_clock_uncertainty73 - unset_data_check73 - unset_disable_inferred_clock_gating74 - unset_disable_timing74 - unset_input_delay74 - unset_output_delay75 - unset_path_exceptions75 - unset_propagated_clock76 - unset_timing_derate76 - unsuppress_msg76 - user_run_time76 - Variables80 - verilog netlist31 - with_output_to_variable76 - write_path_spice77 - write_sdc77 - write_sdf78 - write_timing_model78 - write_verilog79 + all_clocks6 + all_inputs6 + all_outputs6 + all_registers6 + check_setup7 + Command Line Arguments1 + Commands6 + connect_pin7 + create_generated_clock9 + create_voltage_area10 + current_design10 + current_instance10 + define_corners11 + delete_clock11 + delete_from_list11 + delete_generated_clock11 + delete_instance11 + delete_net12 + disconnect_pin12 + elapsed_run_time12 + Example Command Scripts1 + Filter Expressions80 + find_timing_paths13 + get_cells14 + get_clocks15 + get_fanin16 + get_fanout16 + get_full_name17 + get_lib_pins18 + get_libs18 + get_name20 + get_nets19 + get_pins20 + get_ports21 + get_property21 + get_timing_edges24 + group_path25 + hierarchy_separator80 + include26 + link_design26 + make_instance26 + make_net27 + Power Analysis2 + read_liberty27 + read_saif28 + read_sdc28 + read_sdf28 + read_spef29 + read_vcd31 + read_verilog31 + redirection4 + replace_activity_annotation31 + replace_cell31 + report_annotated_check32 + report_annotated_delay33 + report_check_types36 + report_checks34 + report_clock_latency37 + report_clock_min_period38 + report_clock_properties38 + report_clock_skew38 + report_dcalc39 + report_disabled_edges39 + report_edges39 + report_instance40 + report_lib_cell40 + report_net40 + report_parasitic_annotation40 + report_power41 + report_pulse_width_checks41 + report_slews42 + report_tns42 + report_units42 + report_wns43 + report_worst_slack43 + set_assigned_check43 + set_assigned_delay44 + set_assigned_transition45 + set_case_analysis46 + set_clock_gating_check46 + set_clock_groups47 + set_clock_latency47 + set_clock_transition48 + set_clock_uncertainty49 + set_cmd_units50 + set_data_check51 + set_disable_inferred_clock_gating51 + set_disable_timing51 + set_drive52 + set_driving_cell53 + set_false_path54 + set_fanout_load55 + set_hierarchy_separator55 + set_ideal_latency55 + set_ideal_network55 + set_ideal_transition55 + set_input_delay55 + set_input_transition57 + set_level_shifter_strategy57 + set_level_shifter_threshold57 + set_load57 + set_logic_dc58 + set_logic_one58 + set_logic_zero59 + set_max_area59 + set_max_capacitance59 + set_max_delay59 + set_max_dynamic_power60 + set_max_fanout60 + set_max_leakage_power60 + set_max_time_borrow60 + set_max_transition61 + set_min_capacitance61 + set_min_delay62 + set_min_pulse_width62 + set_multicycle_path63 + set_operating_conditions64 + set_output_delay65 + set_port_fanout_number66 + set_power_activity66 + set_propagated_clock67 + set_pvt67 + set_resistance69 + set_sense68 + set_timing_derate69 + set_units70 + set_wire_load_min_block_size71 + set_wire_load_mode71 + set_wire_load_model71 + set_wire_load_selection_group71 + SPEF30 + sta_bidirect_net_paths_enabled80 + sta_cond_default_arcs_enabled81 + sta_continue_on_error80 + sta_crpr_enabled81 + sta_crpr_mode81 + sta_dynamic_loop_breaking81 + sta_gated_clock_checks_enabled81 + sta_input_port_default_clock81 + sta_internal_bidirect_instance_paths_enabled81 + sta_pocv_enabled82 + sta_preset_clear_arcs_enabled82 + sta_propagate_all_clocks82 + sta_propagate_gated_clock_enable82 + sta_recovery_removal_checks_enabled82 + sta_report_default_digits82 + suppress_msg72 + TCL Interpreter3 + Timing Analysis using SDF2 + Timing Analysis with Multiple Process Corners2 + unset_case_analysis72 + unset_clock_latency72 + unset_clock_transition72 + unset_clock_uncertainty73 + unset_data_check73 + unset_disable_inferred_clock_gating74 + unset_disable_timing74 + unset_input_delay74 + unset_output_delay75 + unset_path_exceptions75 + unset_propagated_clock76 + unset_timing_derate76 + unsuppress_msg76 + user_run_time76 + Variables80 + verilog netlist31 + with_output_to_variable76 + write_path_spice77 + write_sdc77 + write_sdf78 + write_timing_model78 + write_verilog79 - - Version 2.6.0, Sep 23, 2024Copyright (c) 2024, Parallax Software, Inc. + + Version 2.6.0, Sep 23, 2024Copyright (c) 2024, Parallax Software, Inc. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. 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93424a22..cc84f9ea 100644 --- a/include/sta/PathGroup.hh +++ b/include/sta/PathGroup.hh @@ -53,6 +53,7 @@ public: int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, const MinMax *min_max, const StaState *sta); // Path group that compares arrival time, sorted by min_max. @@ -60,6 +61,7 @@ public: int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, float min_slack, float max_slack, const StaState *sta); @@ -83,6 +85,7 @@ protected: size_t group_path_count, size_t endpoint_path_count, bool unique_pins, + bool unique_edges, float min_slack, float max_slack, bool cmp_slack, @@ -96,6 +99,7 @@ protected: size_t group_path_count_; size_t endpoint_path_count_; bool unique_pins_; + bool unique_edges_; float slack_min_; float slack_max_; PathEndSeq path_ends_; @@ -112,6 +116,7 @@ public: PathGroups(int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, PathGroupNameSet *group_names, @@ -148,6 +153,7 @@ protected: int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, const Corner *corner, const MinMaxAll *min_max); void makeGroupPathEnds(ExceptionTo *to, @@ -162,6 +168,7 @@ protected: int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, bool cmp_slack); void pushGroupPathEnds(PathEndSeq &path_ends); @@ -171,6 +178,7 @@ protected: void makeGroups(int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, PathGroupNameSet *group_names, @@ -185,6 +193,7 @@ protected: int group_path_count_; int endpoint_path_count_; bool unique_pins_; + bool unique_edges_; float slack_min_; float slack_max_; diff --git a/include/sta/Search.hh b/include/sta/Search.hh index cc3eb057..9e925d1b 100644 --- a/include/sta/Search.hh +++ b/include/sta/Search.hh @@ -105,6 +105,7 @@ public: size_t group_path_count, size_t endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, bool sort_by_slack, @@ -169,18 +170,6 @@ public: PathGroupSeq pathGroups(const PathEnd *path_end) const; void deletePathGroups(); - void makePathGroups(int group_path_count, - int endpoint_path_count, - bool unique_pins, - float min_slack, - float max_slack, - PathGroupNameSet *group_names, - bool setup, - bool hold, - bool recovery, - bool removal, - bool clk_gating_setup, - bool clk_gating_hold); virtual ExceptionPath *exceptionTo(ExceptionPathType type, const Path *path, const Pin *pin, diff --git a/include/sta/Sta.hh b/include/sta/Sta.hh index c73f1038..6f29c7ac 100644 --- a/include/sta/Sta.hh +++ b/include/sta/Sta.hh @@ -821,9 +821,12 @@ public: // Number of paths to report for // each endpoint. int endpoint_path_count, - // endpoint_path_count paths report unique pins - // without rise/fall variations. + // endpoint_path_count paths report paths with + // unique pins. bool unique_pins, + // endpoint_path_count paths report paths with + // unique pins and rise/fall edges. + bool unique_edges, // Min/max bounds for slack of // returned path ends. float slack_min, diff --git a/search/PathEnum.cc b/search/PathEnum.cc index bce85521..07293827 100644 --- a/search/PathEnum.cc +++ b/search/PathEnum.cc @@ -48,6 +48,7 @@ namespace sta { // after_div<--------+ // | // <--...--before_div<--...--path<---path_end +// class Diversion { public: @@ -105,6 +106,7 @@ deleteDiversionPathEnd(Diversion *div) PathEnum::PathEnum(size_t group_path_count, size_t endpoint_path_count, bool unique_pins, + bool unique_edges, bool cmp_slack, const StaState *sta) : StaState(sta), @@ -112,6 +114,7 @@ PathEnum::PathEnum(size_t group_path_count, group_path_count_(group_path_count), endpoint_path_count_(endpoint_path_count), unique_pins_(unique_pins), + unique_edges_(unique_edges), div_queue_(DiversionGreater(sta)), div_count_(0), inserts_pruned_(false), @@ -230,6 +233,7 @@ PathEnum::reportDiversionPath(Diversion *div) //////////////////////////////////////////////////////////////// typedef std::set> VisitedFanins; +typedef std::pair VertexEdge; class PathEnumFaninVisitor : public PathVisitor { @@ -237,6 +241,7 @@ public: PathEnumFaninVisitor(PathEnd *path_end, Path *before_div, bool unique_pins, + bool unique_edges, PathEnum *path_enum); virtual VertexVisitor *copy() const override; void visitFaninPathsThru(Path *before_div, @@ -271,6 +276,7 @@ private: const Pin *to_pin, Vertex *to_vertex) override; virtual void visit(Vertex *) override {} // Not used. + void insertUniqueEdgeDiv(Diversion *div); void reportDiversion(const Edge *edge, const TimingArc *div_arc, Path *after_div); @@ -278,6 +284,7 @@ private: PathEnd *path_end_; Path *before_div_; bool unique_pins_; + bool unique_edges_; PathEnum *path_enum_; Slack path_end_slack_; @@ -289,16 +296,19 @@ private: Vertex *prev_vertex_; bool crpr_active_; VisitedFanins visited_fanins_; + std::map unique_edge_divs_; }; PathEnumFaninVisitor::PathEnumFaninVisitor(PathEnd *path_end, Path *before_div, bool unique_pins, + bool unique_edges, PathEnum *path_enum) : PathVisitor(path_enum), path_end_(path_end), before_div_(before_div), unique_pins_(unique_pins), + unique_edges_(unique_edges), path_enum_(path_enum), path_end_slack_(path_end->slack(this)), @@ -310,6 +320,13 @@ PathEnumFaninVisitor::PathEnumFaninVisitor(PathEnd *path_end, { } +VertexVisitor * +PathEnumFaninVisitor::copy() const +{ + return new PathEnumFaninVisitor(path_end_, before_div_, unique_pins_, + unique_edges_, path_enum_); +} + void PathEnumFaninVisitor::visitFaninPathsThru(Path *before_div, Vertex *prev_vertex, @@ -324,7 +341,13 @@ PathEnumFaninVisitor::visitFaninPathsThru(Path *before_div, prev_arc_ = prev_arc; prev_vertex_ = prev_vertex; visited_fanins_.clear(); + unique_edge_divs_.clear(); visitFaninPaths(before_div_->vertex(this)); + + if (unique_edges_) { + for (auto [vertex_edge, div] : unique_edge_divs_) + path_enum_->insert(div); + } } // Specialize PathVisitor::visitEdge to filter paths/arcs to @@ -342,13 +365,15 @@ PathEnumFaninVisitor::visitEdge(const Pin *from_pin, VertexPathIterator from_iter(from_vertex, search_); while (from_iter.hasNext()) { Path *from_path = from_iter.next(); + // Filter paths by path ap. PathAnalysisPt *path_ap = from_path->pathAnalysisPt(this); if (path_ap->index() == before_div_ap_index_) { const MinMax *min_max = path_ap->pathMinMax(); const RiseFall *from_rf = from_path->transition(this); TimingArc *arc1, *arc2; arc_set->arcsFrom(from_rf, arc1, arc2); - if (arc1 && arc1->toEdge()->asRiseFall()->index() == before_div_rf_index_) { + // Filter arcs by to edge. + if (arc1 && arc1->toEdge()->asRiseFall()->index() == before_div_rf_index_) { if (!visitArc(from_pin, from_vertex, from_rf, from_path, edge, arc1, to_pin, to_vertex, min_max, path_ap)) @@ -366,13 +391,6 @@ PathEnumFaninVisitor::visitEdge(const Pin *from_pin, return true; } -VertexVisitor * -PathEnumFaninVisitor::copy() const -{ - return new PathEnumFaninVisitor(path_end_, before_div_, unique_pins_, - path_enum_); -} - bool PathEnumFaninVisitor::visitFromToPath(const Pin *, Vertex *from_vertex, @@ -393,42 +411,49 @@ PathEnumFaninVisitor::visitFromToPath(const Pin *, // These paths fanin to before_div_ so we know to_vertex matches. if ((!unique_pins_ || from_vertex != prev_vertex_) && arc != prev_arc_ - && Tag::matchNoCrpr(to_tag, before_div_tag_)) { + && Tag::matchNoCrpr(to_tag, before_div_tag_) + // Ignore paths that only differ by crpr from same vertex/edge. + && (!crpr_active_ + || visited_fanins_.find({from_vertex, arc}) == visited_fanins_.end())) { debugPrint(debug_, "path_enum", 3, "visit fanin %s -> %s %s %s", from_path->to_string(this).c_str(), to_vertex->to_string(this).c_str(), to_rf->to_string().c_str(), delayAsString(search_->deratedDelay(from_vertex, arc, edge, false,path_ap), this)); - if (crpr_active_) { - // Ingore paths that only differ by crpr from same vertex/edge. - if (visited_fanins_.find({from_vertex, arc}) == visited_fanins_.end()) { - PathEnd *div_end; - Path *after_div_copy; - // Make the diverted path end to check slack with from_path crpr. - makeDivertedPathEnd(from_path, edge, arc, div_end, after_div_copy); - if (div_end) { - reportDiversion(edge, arc, from_path); - path_enum_->makeDiversion(div_end, after_div_copy); - visited_fanins_.emplace(from_vertex, arc); - } - } - else - debugPrint(debug_, "path_enum", 3, " pruned %s %s", - edge->to_string(this).c_str(), - arc->to_string().c_str()); - } - else { - PathEnd *div_end; - Path *after_div_copy; - makeDivertedPathEnd(from_path, edge, arc, div_end, after_div_copy); - reportDiversion(edge, arc, from_path); - path_enum_->makeDiversion(div_end, after_div_copy); - } + PathEnd *div_end; + Path *after_div_copy; + // Make the diverted path end to check slack with from_path crpr. + makeDivertedPathEnd(from_path, edge, arc, div_end, after_div_copy); + reportDiversion(edge, arc, from_path); + Diversion *div = new Diversion(div_end, after_div_copy); + if (unique_edges_) + insertUniqueEdgeDiv(div); + else + path_enum_->insert(div); + if (crpr_active_) + visited_fanins_.emplace(from_vertex, arc); } + else + debugPrint(debug_, "path_enum", 3, " pruned %s %s", + edge->to_string(this).c_str(), + arc->to_string().c_str()); return true; } +void +PathEnumFaninVisitor::insertUniqueEdgeDiv(Diversion *div) +{ + Slack div_slack = div->pathEnd()->slack(this); + const Path *div_path = div->divPath(); + const Vertex *div_vertex = div_path->vertex(this); + const RiseFall *div_rf = div_path->transition(this); + auto itr = unique_edge_divs_.find({div_vertex, div_rf}); + if (itr == unique_edge_divs_.end() + || div_slack > itr->second->pathEnd()->slack(this)) + itr->second = div; +} + void PathEnumFaninVisitor::makeDivertedPathEnd(Path *after_div, Edge *div_edge, @@ -440,12 +465,8 @@ PathEnumFaninVisitor::makeDivertedPathEnd(Path *after_div, Path *div_path; path_enum_->makeDivertedPath(path_end_->path(), before_div_, after_div, div_edge, div_arc, div_path, after_div_copy); - if (after_div_copy) { - div_end = path_end_->copy(); - div_end->setPath(div_path); - } - else - div_end = nullptr; + div_end = path_end_->copy(); + div_end->setPath(div_path); } void @@ -476,21 +497,11 @@ PathEnumFaninVisitor::reportDiversion(const Edge *div_edge, } } -// A diversion is an alternate path formed by changing the previous -// path/arc of before_div to after_div/div_arc in path. -// -// div_arc -// after_div<--------+ -// | -// <--...--before_div<--...--path<---path_end void -PathEnum::makeDiversion(PathEnd *div_end, - Path *after_div_copy) +PathEnum::insert(Diversion *div) { - Diversion *div = new Diversion(div_end, after_div_copy); div_queue_.push(div); div_count_++; - if (div_queue_.size() > group_path_count_ * 2) // We have more potenial paths than we will need. pruneDiversionQueue(); @@ -550,7 +561,7 @@ PathEnum::divSlack(Path *before_div, } } else { - report()->error(1370, "path diversion missing edge."); + report_->error(1370, "path diversion missing edge."); return 0.0; } } @@ -564,7 +575,8 @@ PathEnum::makeDiversions(PathEnd *path_end, Path *path = before; Path *prev_path = path->prevPath(); TimingArc *prev_arc = path->prevArc(this); - PathEnumFaninVisitor fanin_visitor(path_end, path, unique_pins_, this); + PathEnumFaninVisitor fanin_visitor(path_end, path, unique_pins_, + unique_edges_, this); while (prev_path) { // Fanin visitor does all the work. // While visiting the fanins the fanin_visitor finds the diff --git a/search/PathEnum.hh b/search/PathEnum.hh index b48b0d32..1f13f1e9 100644 --- a/search/PathEnum.hh +++ b/search/PathEnum.hh @@ -61,6 +61,7 @@ public: PathEnum(size_t group_path_count, size_t endpoint_path_count, bool unique_pins, + bool unique_edges, bool cmp_slack, const StaState *sta); // Insert path ends that are enumerated in slack/arrival order. @@ -72,8 +73,7 @@ public: private: void makeDiversions(PathEnd *path_end, Path *before); - void makeDiversion(PathEnd *div_end, - Path *after_div_copy); + void insert(Diversion *div); void makeDivertedPath(Path *path, Path *before_div, Path *after_div, @@ -97,6 +97,7 @@ private: size_t group_path_count_; size_t endpoint_path_count_; bool unique_pins_; + bool unique_edges_; DiversionQueue div_queue_; int div_count_; // Number of paths returned for each endpoint (limit to endpoint_path_count). diff --git a/search/PathGroup.cc b/search/PathGroup.cc index 019269ff..3ce7443a 100644 --- a/search/PathGroup.cc +++ b/search/PathGroup.cc @@ -53,12 +53,14 @@ PathGroup::makePathGroupSlack(const char *name, int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, const StaState *sta) { - return new PathGroup(name, group_path_count, endpoint_path_count, unique_pins, - slack_min, slack_max, true, MinMax::min(), sta); + return new PathGroup(name, group_path_count, endpoint_path_count, + unique_pins, unique_edges, slack_min, slack_max, + true, MinMax::min(), sta); } PathGroup * @@ -66,17 +68,20 @@ PathGroup::makePathGroupArrival(const char *name, int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, const MinMax *min_max, const StaState *sta) { - return new PathGroup(name, group_path_count, endpoint_path_count, unique_pins, - 0.0, 0.0, false, min_max, sta); + return new PathGroup(name, group_path_count, endpoint_path_count, + unique_pins, unique_edges, 0.0, 0.0, + false, min_max, sta); } PathGroup::PathGroup(const char *name, size_t group_path_count, size_t endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, bool cmp_slack, @@ -86,6 +91,7 @@ PathGroup::PathGroup(const char *name, group_path_count_(group_path_count), endpoint_path_count_(endpoint_path_count), unique_pins_(unique_pins), + unique_edges_(unique_edges), slack_min_(slack_min), slack_max_(slack_max), min_max_(min_max), @@ -252,6 +258,7 @@ const char *PathGroups::unconstrained_group_name_ = "unconstrained"; PathGroups::PathGroups(int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, PathGroupNameSet *group_names, @@ -267,14 +274,15 @@ PathGroups::PathGroups(int group_path_count, group_path_count_(group_path_count), endpoint_path_count_(endpoint_path_count), unique_pins_(unique_pins), + unique_edges_(unique_edges), slack_min_(slack_min), slack_max_(slack_max) { - makeGroups(group_path_count, endpoint_path_count, unique_pins, + makeGroups(group_path_count, endpoint_path_count, unique_pins, unique_edges, slack_min, slack_max, group_names, setup, recovery, clk_gating_setup, unconstrained, MinMax::max()); - makeGroups(group_path_count, endpoint_path_count, unique_pins, + makeGroups(group_path_count, endpoint_path_count, unique_pins, unique_edges, slack_min, slack_max, group_names, hold, removal, clk_gating_hold, unconstrained, MinMax::min()); @@ -284,6 +292,7 @@ void PathGroups::makeGroups(int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, PathGroupNameSet *group_names, @@ -301,6 +310,7 @@ PathGroups::makeGroups(int group_path_count, group_path_count, endpoint_path_count, unique_pins, + unique_edges, slack_min, slack_max, this); named_map_[mm_index][name] = group; @@ -314,6 +324,7 @@ PathGroups::makeGroups(int group_path_count, group_path_count, endpoint_path_count, unique_pins, + unique_edges, slack_min, slack_max, this); clk_map_[mm_index][clk] = group; @@ -327,6 +338,7 @@ PathGroups::makeGroups(int group_path_count, group_path_count, endpoint_path_count, unique_pins, + unique_edges, slack_min, slack_max, this); else @@ -338,6 +350,7 @@ PathGroups::makeGroups(int group_path_count, group_path_count, endpoint_path_count, unique_pins, + unique_edges, slack_min, slack_max, this); else @@ -349,6 +362,7 @@ PathGroups::makeGroups(int group_path_count, group_path_count, endpoint_path_count, unique_pins, + unique_edges, slack_min, slack_max, this); else @@ -359,7 +373,7 @@ PathGroups::makeGroups(int group_path_count, unconstrained_[mm_index] = PathGroup::makePathGroupArrival(unconstrained_group_name_, group_path_count, endpoint_path_count, - unique_pins, min_max, this); + unique_pins, unique_edges, min_max, this); else unconstrained_[mm_index] = nullptr; } @@ -576,8 +590,8 @@ PathGroups::makePathEnds(ExceptionTo *to, bool sort_by_slack) { Stats stats(debug_, report_); - makeGroupPathEnds(to, group_path_count_, endpoint_path_count_, unique_pins_, - corner, min_max); + makeGroupPathEnds(to, group_path_count_, endpoint_path_count_, + unique_pins_, unique_edges_, corner, min_max); PathEndSeq path_ends; pushGroupPathEnds(path_ends); @@ -805,6 +819,7 @@ PathGroups::makeGroupPathEnds(ExceptionTo *to, int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, const Corner *corner, const MinMaxAll *min_max) { @@ -822,27 +837,33 @@ PathGroups::makeGroupPathEnds(ExceptionTo *to, const char *name = name_group.first; PathGroup *group = findPathGroup(name, path_min_max); if (group) - enumPathEnds(group, group_path_count, endpoint_path_count, unique_pins, true); + enumPathEnds(group, group_path_count, endpoint_path_count, + unique_pins, unique_edges, true); } for (auto clk : sdc_->clks()) { PathGroup *group = findPathGroup(clk, path_min_max); if (group) - enumPathEnds(group, group_path_count, endpoint_path_count, unique_pins, true); + enumPathEnds(group, group_path_count, endpoint_path_count, + unique_pins, unique_edges, true); } PathGroup *group = unconstrained_[mm_index]; if (group) - enumPathEnds(group, group_path_count, endpoint_path_count, unique_pins, false); + enumPathEnds(group, group_path_count, endpoint_path_count, + unique_pins, unique_edges, false); group = path_delay_[mm_index]; if (group) - enumPathEnds(group, group_path_count, endpoint_path_count, unique_pins, true); + enumPathEnds(group, group_path_count, endpoint_path_count, + unique_pins, unique_edges, true); group = gated_clk_[mm_index]; if (group) - enumPathEnds(group, group_path_count, endpoint_path_count, unique_pins, true); + enumPathEnds(group, group_path_count, endpoint_path_count, + unique_pins, unique_edges, true); group = async_[mm_index]; if (group) - enumPathEnds(group, group_path_count, endpoint_path_count, unique_pins, true); + enumPathEnds(group, group_path_count, endpoint_path_count, + unique_pins, unique_edges, true); } } } @@ -852,12 +873,13 @@ PathGroups::enumPathEnds(PathGroup *group, int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, bool cmp_slack) { // Insert the worst max_path path ends in the group into a path // enumerator. PathEnum path_enum(group_path_count, endpoint_path_count, - unique_pins, cmp_slack, this); + unique_pins, unique_edges, cmp_slack, this); PathGroupIterator *end_iter = group->iterator(); while (end_iter->hasNext()) { PathEnd *end = end_iter->next(); diff --git a/search/Search.cc b/search/Search.cc index a05bebc9..e6e02fdb 100644 --- a/search/Search.cc +++ b/search/Search.cc @@ -450,6 +450,7 @@ Search::findPathEnds(ExceptionFrom *from, size_t group_path_count, size_t endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, bool sort_by_slack, @@ -466,11 +467,15 @@ Search::findPathEnds(ExceptionFrom *from, recovery = removal = false; if (!variables_->gatedClkChecksEnabled()) clk_gating_setup = clk_gating_hold = false; - makePathGroups(group_path_count, endpoint_path_count, unique_pins, - slack_min, slack_max, - group_names, setup, hold, - recovery, removal, - clk_gating_setup, clk_gating_hold); + path_groups_ = new PathGroups(group_path_count, endpoint_path_count, + unique_pins, unique_edges, + slack_min, slack_max, + group_names, + setup, hold, + recovery, removal, + clk_gating_setup, clk_gating_hold, + unconstrained_paths_, + this); ensureDownstreamClkPins(); PathEndSeq path_ends = path_groups_->makePathEnds(to, unconstrained_paths_, corner, min_max, @@ -4126,31 +4131,6 @@ Search::wnsSlack(Vertex *vertex, //////////////////////////////////////////////////////////////// -void -Search::makePathGroups(int group_path_count, - int endpoint_path_count, - bool unique_pins, - float slack_min, - float slack_max, - PathGroupNameSet *group_names, - bool setup, - bool hold, - bool recovery, - bool removal, - bool clk_gating_setup, - bool clk_gating_hold) -{ - path_groups_ = new PathGroups(group_path_count, endpoint_path_count, - unique_pins, - slack_min, slack_max, - group_names, - setup, hold, - recovery, removal, - clk_gating_setup, clk_gating_hold, - unconstrained_paths_, - this); -} - void Search::deletePathGroups() { diff --git a/search/Search.i b/search/Search.i index 1d0efdd6..9be59d15 100644 --- a/search/Search.i +++ b/search/Search.i @@ -372,6 +372,7 @@ find_path_ends(ExceptionFrom *from, int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, bool sort_by_slack, @@ -387,7 +388,7 @@ find_path_ends(ExceptionFrom *from, PathEndSeq ends = sta->findPathEnds(from, thrus, to, unconstrained, corner, delay_min_max, group_path_count, endpoint_path_count, - unique_pins, + unique_pins, unique_edges, slack_min, slack_max, sort_by_slack, groups->size() ? groups : nullptr, diff --git a/search/Search.tcl b/search/Search.tcl index 10480194..ba5acba4 100644 --- a/search/Search.tcl +++ b/search/Search.tcl @@ -102,6 +102,7 @@ define_cmd_args "find_timing_paths" \ [-group_path_count path_count] \ [-endpoint_path_count path_count]\ [-unique_paths_to_endpoint]\ + [-unique_edges_to_endpoint]\ [-slack_max slack_max]\ [-slack_min slack_min]\ [-sort_by_slack]\ @@ -121,7 +122,9 @@ proc find_timing_paths_cmd { cmd args_var } { -path_delay -corner -group_count -endpoint_count \ -group_path_count -endpoint_path_count \ -slack_max -slack_min -path_group} \ - flags {-unconstrained -sort_by_slack -unique_paths_to_endpoint} 0 + flags {-unconstrained -sort_by_slack \ + -unique_paths_to_endpoint \ + -unique_edges_to_endpoint} 0 set min_max "max" set end_rf "rise_fall" @@ -195,6 +198,7 @@ proc find_timing_paths_cmd { cmd args_var } { } set unique_pins [info exists flags(-unique_paths_to_endpoint)] + set unique_edges [info exists flags(-unique_edges_to_endpoint)] set slack_min "-1e+30" if [info exist keys(-slack_min)] { @@ -229,7 +233,8 @@ proc find_timing_paths_cmd { cmd args_var } { set path_ends [find_path_ends $from $thrus $to $unconstrained \ $corner $min_max \ - $group_path_count $endpoint_path_count $unique_pins \ + $group_path_count $endpoint_path_count \ + $unique_pins $unique_edges \ $slack_min $slack_max \ $sort_by_slack $groups \ 1 1 1 1 1 1] @@ -574,7 +579,7 @@ proc_redirect report_check_types { set slack_max $sta::float_inf } set path_ends [find_path_ends "NULL" {} "NULL" 0 \ - $corner $path_min_max $group_path_count 1 0 \ + $corner $path_min_max $group_path_count 1 1 0 \ $slack_min $slack_max \ 0 {} \ $setup $hold \ diff --git a/search/Sta.cc b/search/Sta.cc index 7c0b67f7..75c1c26a 100644 --- a/search/Sta.cc +++ b/search/Sta.cc @@ -2464,6 +2464,7 @@ Sta::findPathEnds(ExceptionFrom *from, int group_path_count, int endpoint_path_count, bool unique_pins, + bool unique_edges, float slack_min, float slack_max, bool sort_by_slack, @@ -2477,8 +2478,10 @@ Sta::findPathEnds(ExceptionFrom *from, { searchPreamble(); return search_->findPathEnds(from, thrus, to, unconstrained, - corner, min_max, group_path_count, endpoint_path_count, - unique_pins, slack_min, slack_max, + corner, min_max, group_path_count, + endpoint_path_count, + unique_pins, unique_edges, + slack_min, slack_max, sort_by_slack, group_names, setup, hold, recovery, removal, @@ -2727,8 +2730,10 @@ Sta::findGroupPathPins(const char *group_path_name) nullptr, nullptr, nullptr, false, // corner, min_max, nullptr, MinMaxAll::max(), - // group_path_count, endpoint_path_count, unique_pins - 1, 1, false, + // group_path_count, endpoint_path_count + 1, 1, + // unique_pins, unique_edges + true, true, -INF, INF, // slack_min, slack_max, false, // sort_by_slack nullptr, // group_names From 28812daf2092e0eaf4f98a7afd1435ff304dd593 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Tue, 4 Nov 2025 16:50:54 -0700 Subject: [PATCH 6/8] leak Signed-off-by: James Cherry --- sdc/Sdc.cc | 1 + 1 file changed, 1 insertion(+) diff --git a/sdc/Sdc.cc b/sdc/Sdc.cc index 8bdddd34..b10a7add 100644 --- a/sdc/Sdc.cc +++ b/sdc/Sdc.cc @@ -4894,6 +4894,7 @@ Sdc::deleteExceptions() path_delay_internal_from_break_.clear(); path_delay_internal_to_.clear(); path_delay_internal_to_break_.clear(); + pin_exceptions_.deleteContentsClear(); deleteExceptionPtHashMapSets(exception_merge_hash_); exception_merge_hash_.clear(); From 10a3cdc4d10e8aac238e16e417a1427e94b4fbb2 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Tue, 4 Nov 2025 16:57:28 -0700 Subject: [PATCH 7/8] Exception::delete* hash update resolves #325 Signed-off-by: James Cherry --- include/sta/Sdc.hh | 2 +- sdc/ExceptionPath.cc | 57 +++++++++++++++++++++++++++++--------------- 2 files changed, 39 insertions(+), 20 deletions(-) diff --git a/include/sta/Sdc.hh b/include/sta/Sdc.hh index 4b09a1a4..84914596 100644 --- a/include/sta/Sdc.hh +++ b/include/sta/Sdc.hh @@ -144,7 +144,7 @@ typedef UnorderedMap EdgeExceptionsMap; typedef Vector ExceptionThruSeq; typedef Map InputDriveMap; -typedef Map > ExceptionPathPtHash; +typedef Map > ExceptionPathPtHash; typedef Set ClockLatencies; typedef Map PinClockUncertaintyMap; typedef Set InterClockUncertaintySet; diff --git a/sdc/ExceptionPath.cc b/sdc/ExceptionPath.cc index 6eec647f..2d4ccbf3 100644 --- a/sdc/ExceptionPath.cc +++ b/sdc/ExceptionPath.cc @@ -630,7 +630,8 @@ FalsePath::overrides(ExceptionPath *exception) const //////////////////////////////////////////////////////////////// -LoopPath::LoopPath(ExceptionThruSeq *thrus, bool own_pts) : +LoopPath::LoopPath(ExceptionThruSeq *thrus, + bool own_pts) : FalsePath(nullptr, thrus, nullptr, MinMaxAll::all(), own_pts, falsePathPriority() + fromThruToPriority(nullptr, thrus, nullptr), nullptr) @@ -1128,9 +1129,12 @@ ExceptionFromTo::deletePin(const Pin *pin, const Network *network) { if (pins_) { - pins_->erase(pin); - // Incrementally update hash. - hash_ -= network->id(pin) * hash_pin; + auto itr = pins_->find(pin); + if (itr != pins_->end()) { + pins_->erase(itr); + // Incrementally update hash. + hash_ -= network->id(pin) * hash_pin; + } } } @@ -1138,9 +1142,12 @@ void ExceptionFromTo::deleteClock(Clock *clk) { if (clks_) { - clks_->erase(clk); - // Incrementally update hash. - hash_ -= clk->index() * hash_clk; + auto itr = clks_->find(clk); + if (itr != clks_->end()) { + clks_->erase(itr); + // Incrementally update hash. + hash_ -= clk->index() * hash_clk; + } } } @@ -1149,9 +1156,12 @@ ExceptionFromTo::deleteInstance(const Instance *inst, const Network *network) { if (insts_) { - insts_->erase(inst); - // Incrementally update hash. - hash_ -= network->id(inst) * hash_inst; + auto itr = insts_->find(inst); + if (itr != insts_->end()) { + insts_->erase(itr); + // Incrementally update hash. + hash_ -= network->id(inst) * hash_inst; + } } } @@ -1782,9 +1792,12 @@ ExceptionThru::deletePin(const Pin *pin, const Network *network) { if (pins_) { - pins_->erase(pin); - // Incrementally update hash. - hash_ -= network->id(pin) * hash_pin; + auto itr = pins_->find(pin); + if (itr != pins_->end()) { + pins_->erase(itr); + // Incrementally update hash. + hash_ -= network->id(pin) * hash_pin; + } } } @@ -1793,9 +1806,12 @@ ExceptionThru::deleteNet(const Net *net, const Network *network) { if (nets_) { - nets_->erase(net); - // Incrementally update hash. - hash_ -= network->id(net) * hash_net; + auto itr = nets_->find(net); + if (itr != nets_->end()) { + nets_->erase(itr); + // Incrementally update hash. + hash_ -= network->id(net) * hash_net; + } } } @@ -1804,9 +1820,12 @@ ExceptionThru::deleteInstance(const Instance *inst, const Network *network) { if (insts_) { - insts_->erase(inst); - // Incrementally update hash. - hash_ -= network->id(inst) * hash_inst; + auto itr = insts_->find(inst); + if (itr != insts_->end()) { + insts_->erase(itr); + // Incrementally update hash. + hash_ -= network->id(inst) * hash_inst; + } } } From 79d8a5ecb32e9b6b02fe311ed29e6a652c407cf6 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Wed, 5 Nov 2025 11:42:38 -0700 Subject: [PATCH 8/8] report_checks before report_skew with gated clk Signed-off-by: James Cherry --- search/ClkSkew.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/search/ClkSkew.cc b/search/ClkSkew.cc index 0c8cabcb..eb32989c 100644 --- a/search/ClkSkew.cc +++ b/search/ClkSkew.cc @@ -421,7 +421,8 @@ ClkSkews::findClkSkew(Vertex *src_vertex, while (src_iter.hasNext()) { Path *src_path = src_iter.next(); const Clock *src_clk = src_path->clock(this); - if (src_rf->matches(src_path->transition(this)) + if (src_path->isClock(this) + && src_rf->matches(src_path->transition(this)) && src_path->minMax(this) == setup_hold_ && clk_set_.find(src_clk) != clk_set_.end()) { Corner *src_corner = src_path->pathAnalysisPt(this)->corner();

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