From 7ca079f3f6421e41bab12d8db5218c13c2683404 Mon Sep 17 00:00:00 2001
From: James Cherry <cherry@CerezoBook.local>
Date: Thu, 18 Jun 2026 14:42:12 -0700
Subject: [PATCH] LibertyPort::setIsLatchOutput

Signed-off-by: James Cherry <cherry@CerezoBook.local>
---
 include/sta/Liberty.hh |  3 +++
 include/sta/Network.hh |  1 +
 liberty/Liberty.cc     |  8 ++++++++
 network/Network.cc     | 10 ++++++++++
 search/Search.cc       | 13 ++++---------
 5 files changed, 26 insertions(+), 9 deletions(-)

diff --git a/include/sta/Liberty.hh b/include/sta/Liberty.hh
index 461166a1..f34d5e8f 100644
--- a/include/sta/Liberty.hh
+++ b/include/sta/Liberty.hh
@@ -861,6 +861,8 @@ public:
   void setIsRegOutput(bool is_reg_out);
   bool isLatchData() const { return is_latch_data_; }
   void setIsLatchData(bool is_latch_data);
+  bool isLatchOutput() const { return is_latch_output_; }
+  void setIsLatchOutput(bool is_latch_output);
   // Is the clock for timing checks.
   bool isCheckClk() const { return is_check_clk_; }
   void setIsCheckClk(bool is_clk);
@@ -956,6 +958,7 @@ protected:
   bool is_reg_clk_:1 {false};
   bool is_reg_output_:1 {false};
   bool is_latch_data_: 1 {false};
+  bool is_latch_output_:1 {false};
   bool is_check_clk_:1 {false};
   bool is_clk_gate_clk_:1 {false};
   bool is_clk_gate_enable_:1 {false};
diff --git a/include/sta/Network.hh b/include/sta/Network.hh
index 9c45f095..d07b3db3 100644
--- a/include/sta/Network.hh
+++ b/include/sta/Network.hh
@@ -319,6 +319,7 @@ public:
   // Pin clocks a timing check.
   [[nodiscard]] bool isCheckClk(const Pin *pin) const;
   [[nodiscard]] bool isLatchData(const Pin *pin) const;
+  [[nodiscard]] bool isLatchOutput(const Pin *pin) const;
 
   // Iterate over all of the pins connected to a pin and the parent
   // and child nets it is hierarchically connected to (port, leaf and
diff --git a/liberty/Liberty.cc b/liberty/Liberty.cc
index b63e56fa..09c92678 100644
--- a/liberty/Liberty.cc
+++ b/liberty/Liberty.cc
@@ -1769,6 +1769,7 @@ LibertyCell::makeLatchEnable(LibertyPort *d,
   latch_d_to_q_map_[d_to_q] = idx;
   latch_check_map_[setup_check] = idx;
   d->setIsLatchData(true);
+  q->setIsLatchOutput(true);
   debugPrint(debug, "liberty_latch", 1,
              "latch {} -> {} | {} {} -> {} | {} {} -> {} setup",
              d->name(),
@@ -2434,6 +2435,13 @@ LibertyPort::setIsLatchData(bool is_latch_data)
   setMemberFlag(is_latch_data, &LibertyPort::setIsLatchData);
 }
 
+void
+LibertyPort::setIsLatchOutput(bool is_latch_output)
+{
+  is_latch_output_ = is_latch_output;
+  setMemberFlag(is_latch_output, &LibertyPort::setIsLatchOutput);
+}
+
 void
 LibertyPort::setIsCheckClk(bool is_clk)
 {
diff --git a/network/Network.cc b/network/Network.cc
index 3bf22cf6..373d52b7 100644
--- a/network/Network.cc
+++ b/network/Network.cc
@@ -636,6 +636,16 @@ Network::isLatchData(const Pin *pin) const
     return false;
 }
 
+bool
+Network::isLatchOutput(const Pin *pin) const
+{
+  LibertyPort *port = libertyPort(pin);
+  if (port)
+    return port->isLatchOutput();
+  else
+    return false;
+}
+
 ////////////////////////////////////////////////////////////////
 
 std::string
diff --git a/search/Search.cc b/search/Search.cc
index 08829669..ae23c681 100644
--- a/search/Search.cc
+++ b/search/Search.cc
@@ -1132,15 +1132,10 @@ ArrivalVisitor::setAlwaysToEndpoints(bool to_endpoints)
 void
 ArrivalVisitor::visit(Vertex *vertex)
 {
-  VertexInEdgeIterator edge_iter(vertex, graph_);
-  while (edge_iter.hasNext()) {
-    Edge *edge = edge_iter.next();
-    if (edge->role()->isLatchDtoQ()) {
-      search_->enqueueLatchOutput(vertex);
-      return;
-    }
-  }
-  visit(vertex, false);
+  if (network_->isLatchOutput(vertex->pin()))
+    search_->enqueueLatchOutput(vertex);
+  else
+    visit(vertex, false);
 }
 
 void