diff --git a/dcalc/test/dcalc_case_analysis_leak.ok b/dcalc/test/dcalc_case_analysis_leak.ok
index efb775b2..2cc2edc9 100644
--- a/dcalc/test/dcalc_case_analysis_leak.ok
+++ b/dcalc/test/dcalc_case_analysis_leak.ok
@@ -1,10 +1,10 @@
 
 load on constant net cn (ff)    arrival at z (ps)
-0                               159.19
-50                              159.71
-200                             167.60
-500                             181.63
-1000                            205.57
+0                               158.79
+50                              158.79
+200                             158.79
+500                             158.79
+1000                            158.79
 
-arrival spread across the sweep: 46.38 ps (expected 0.00)
+arrival spread across the sweep: 0.00 ps (expected 0.00)
 
diff --git a/dcalc/test/dcalc_case_analysis_leak.tcl b/dcalc/test/dcalc_case_analysis_leak.tcl
index 47cd4dca..ac814f6b 100644
--- a/dcalc/test/dcalc_case_analysis_leak.tcl
+++ b/dcalc/test/dcalc_case_analysis_leak.tcl
@@ -1,21 +1,22 @@
-# Delay calculation ignores set_case_analysis constants.
+# Delay calculation must not merge slew from set_case_analysis constants.
 #
-# GraphDelayCalc uses DcalcPred (dcalc/GraphDelayCalc.cc), whose searchFrom
-# stops only at power/ground nets:
+# Regression guard for "dcalc no slew merge for constant disabled arcs".
+#
+# GraphDelayCalc uses DcalcPred (dcalc/GraphDelayCalc.cc).  Its searchFrom
+# used to stop only at power/ground nets:
 #
 #   return !(sdc->isDisabledConstraint(from_pin)
 #            || (net && (network->isPower(net) || network->isGround(net))));
 #
-# SearchPred0::searchFrom (search/SearchPred.cc) instead stops at
-# sim->isConstant(from_vertex).  DcalcPred::searchTo returns true
-# unconditionally where SearchPred0::searchTo returns !sim->isConstant, and
-# DcalcPred::searchThru omits sim->isDisabledCond and the
-# simTimingSense == none test.  GraphDelayCalc.cc never references Sim at all.
+# SearchPred0::searchFrom (search/SearchPred.cc) stops at
+# sim->isConstant(from_vertex); DcalcPred did not, so in
+# findDriverEdgeDelays an arc whose source pin is an SDC constant still
+# passed searchFrom/searchThru and had its delay and slew merged into the
+# driver vertex -- including when that driver is a live, non-constant pin.
 #
-# Consequence: in findDriverEdgeDelays (GraphDelayCalc.cc:1011) an arc whose
-# source pin is an SDC constant still passes searchFrom/searchThru, so its
-# delay and slew are computed and merged into the driver vertex -- including
-# when that driver is a live, non-constant pin.
+# The fix adds sim->isConstant(from_vertex) to DcalcPred::searchFrom, and
+# makes Sta::delayCalcPreamble propagate constants before delay calculation
+# so the predicate sees them.
 #
 # Circuit (dcalc_case_analysis_leak.v):
 #
@@ -27,9 +28,10 @@
 # AND, so n1 and z stay live and the A2->ZN arc is dead.  The reported path is
 # a -> u1 -> u2 -> z, which never traverses cn.
 #
-# Sweeping the wire load on cn must not change anything on that path.  It
-# does: cn's slew rides the dead A2->ZN arc into n1, and n1's slew sets u2's
-# delay.  The arrival column below should be flat and is not.
+# Sweeping the wire load on cn must not change anything on that path.  Before
+# the fix it did: cn's slew rode the dead A2->ZN arc into n1, and n1's slew
+# set u2's delay, so the arrival spread was 46.38 ps.  The arrival column
+# below must now be flat.
 
 read_liberty ../../examples/nangate45_slow.lib.gz
 read_verilog dcalc_case_analysis_leak.v
diff --git a/graph/test/graph_modify.ok b/graph/test/graph_modify.ok
index d1d2c152..72bdbb69 100644
--- a/graph/test/graph_modify.ok
+++ b/graph/test/graph_modify.ok
@@ -2415,7 +2415,7 @@ Corner: slow
    0.14    1.14 v buf1/Z (BUF_X1)
    0.09    1.23 v and1/ZN (AND2_X1)
    0.09    1.32 ^ nand1/ZN (NAND2_X1)
-   0.07    1.38 ^ buf4/Z (BUF_X4)
+   0.06    1.38 ^ buf4/Z (BUF_X4)
    0.00    1.38 ^ q3 (out)
            1.38   data arrival time
 
diff --git a/sdc/test/sdc_port_delay_advanced.ok b/sdc/test/sdc_port_delay_advanced.ok
index 32e0b4a4..8ee4dbd5 100644
--- a/sdc/test/sdc_port_delay_advanced.ok
+++ b/sdc/test/sdc_port_delay_advanced.ok
@@ -111,7 +111,7 @@ max slew
 
 Pin                                    Limit    Slew   Slack
 ------------------------------------------------------------
-nor1/ZN                                 0.20    0.01    0.18 (MET)
+reg1/QN                                 0.20    0.01    0.19 (MET)
 
 max fanout