From 451831edd7c203de4b63c42dace53e6c23ab8a10 Mon Sep 17 00:00:00 2001 From: James Cherry Date: Thu, 24 Aug 2023 15:52:28 -0700 Subject: [PATCH] read_verilog pin { pin ( seg fault Signed-off-by: James Cherry --- liberty/LibertyReader.cc | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/liberty/LibertyReader.cc b/liberty/LibertyReader.cc index 76661f40..9946e201 100644 --- a/liberty/LibertyReader.cc +++ b/liberty/LibertyReader.cc @@ -2977,21 +2977,23 @@ LibertyReader::endPorts() { // Capacitances default based on direction so wait until the end // of the pin group to set them. - for (LibertyPort *port : *ports_) { - if (in_bus_ || in_bundle_) { - // Do not clobber member port capacitances by setting the capacitance - // on a bus or bundle. - LibertyPortMemberIterator member_iter(port); - while (member_iter.hasNext()) { - LibertyPort *member = member_iter.next(); - setPortCapDefault(member); + if (ports_) { + for (LibertyPort *port : *ports_) { + if (in_bus_ || in_bundle_) { + // Do not clobber member port capacitances by setting the capacitance + // on a bus or bundle. + LibertyPortMemberIterator member_iter(port); + while (member_iter.hasNext()) { + LibertyPort *member = member_iter.next(); + setPortCapDefault(member); + } } + else + setPortCapDefault(port); } - else - setPortCapDefault(port); + ports_ = nullptr; + port_group_ = nullptr; } - ports_ = nullptr; - port_group_ = nullptr; } void