diff --git a/CMakeLists.txt b/CMakeLists.txt
index 52ef2661..65d9c62b 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -39,6 +39,7 @@ project(STA VERSION 2.7.0
 option(CUDD_DIR "CUDD BDD package directory")
 option(USE_TCL_READLINE "Use TCL readline package" ON)
 option(ENABLE_TSAN "Compile with thread santizer enabled" OFF)
+option(ENABLE_ASAN "Compile with address santizer enabled" OFF)
 
 # Turn on to debug compiler args.
 set(CMAKE_VERBOSE_MAKEFILE OFF)
@@ -541,6 +542,12 @@ if(ENABLE_TSAN)
   set(CMAKE_EXE_LINKER_FLAGS "-fsanitize=thread")
 endif()
 
+if(ENABLE_ASAN)
+  message(STATUS "Address sanitizer: ${ENABLE_ASAN}")
+  set(CXX_FLAGS "${CXX_FLAGS};-fsanitize=address")
+  set(CMAKE_EXE_LINKER_FLAGS "-fsanitize=address")
+endif()
+
 target_compile_options(OpenSTA
   PRIVATE
   $<$<CXX_COMPILER_ID:GNU>:${CXX_FLAGS}>
diff --git a/dcalc/GraphDelayCalc.cc b/dcalc/GraphDelayCalc.cc
index 9106ca9d..b0b0402d 100644
--- a/dcalc/GraphDelayCalc.cc
+++ b/dcalc/GraphDelayCalc.cc
@@ -1012,7 +1012,7 @@ GraphDelayCalc::makeArcDcalcArgs(Vertex *drvr_vertex,
       arc1 = arc;
     }
     else
-      findParallelEdge(drvr_vertex1, edge, arc, edge1, arc1);
+      findParallelEdge(drvr_vertex1, arc, edge1, arc1);
     // Shockingly one fpga vendor connects outputs with no timing arcs together.
     if (edge1) {
       Vertex *from_vertex = edge1->from(graph_);
@@ -1036,7 +1036,6 @@ GraphDelayCalc::makeArcDcalcArgs(Vertex *drvr_vertex,
 // primary driver drvr_edge/drvr_arc.
 void
 GraphDelayCalc::findParallelEdge(Vertex *vertex,
-                                 Edge *drvr_edge,
                                  const TimingArc *drvr_arc,
                                  // Return values.
                                  Edge *&edge,
@@ -1047,11 +1046,10 @@ GraphDelayCalc::findParallelEdge(Vertex *vertex,
   if (vertex_cell == drvr_cell) {
     // Homogeneous drivers.
     arc = drvr_arc;
-    LibertyPort *from_port = network_->libertyPort(drvr_edge->from(graph_)->pin());
     VertexInEdgeIterator edge_iter(vertex, graph_);
     while (edge_iter.hasNext()) {
       edge = edge_iter.next();
-      if (network_->libertyPort(edge->from(graph_)->pin()) == from_port)
+      if (edge->timingArcSet() == arc->set())
         return;
     }
   }
diff --git a/graph/Graph.cc b/graph/Graph.cc
index fc134d29..8cdd75bc 100644
--- a/graph/Graph.cc
+++ b/graph/Graph.cc
@@ -35,6 +35,7 @@
 #include "PortDirection.hh"
 #include "Network.hh"
 #include "DcalcAnalysisPt.hh"
+#include "FuncExpr.hh"
 
 namespace sta {
 
@@ -1293,6 +1294,11 @@ Edge::to_string(const StaState *sta) const
   string str = from(graph)->to_string(sta);
   str += " -> ";
   str += to(graph)->to_string(sta);
+  FuncExpr *when = arc_set_->cond();
+  if (when) {
+    str += " ";
+    str += when->to_string();
+  }
   return str;
 }
 
diff --git a/include/sta/ExceptionPath.hh b/include/sta/ExceptionPath.hh
index c7cd839c..1619fec3 100644
--- a/include/sta/ExceptionPath.hh
+++ b/include/sta/ExceptionPath.hh
@@ -632,7 +632,7 @@ private:
   void expandFrom();
   void expandThrus(ExceptionFrom *expanded_from);
   void expandThru(ExceptionFrom *expanded_from,
-		  ExceptionThruSeq::Iterator &thru_iter,
+		  size_t next_thru_idx,
 		  ExceptionThruSeq *expanded_thrus);
   void expandTo(ExceptionFrom *expanded_from,
 		ExceptionThruSeq *expanded_thrus);
diff --git a/include/sta/GraphDelayCalc.hh b/include/sta/GraphDelayCalc.hh
index b38e6654..942c8468 100644
--- a/include/sta/GraphDelayCalc.hh
+++ b/include/sta/GraphDelayCalc.hh
@@ -204,7 +204,6 @@ protected:
                                   const DcalcAnalysisPt *dcalc_ap,
                                   ArcDelayCalc *arc_delay_calc);
   void findParallelEdge(Vertex *vertex,
-                        Edge *drvr_edge,
                         const TimingArc *drvr_arc,
                         // Return values.
                         Edge *&edge,
diff --git a/include/sta/Search.hh b/include/sta/Search.hh
index 308542cc..ccd427d9 100644
--- a/include/sta/Search.hh
+++ b/include/sta/Search.hh
@@ -366,9 +366,6 @@ public:
  			Vertex *vertex,
  			TagGroupBldr *tag_bldr);
   void ensureDownstreamClkPins();
-  // Check paths from inputs from the default arrival clock
-  // (missing set_input_delay).
-  virtual bool checkDefaultArrivalPaths() { return true; }
   bool matchesFilter(Path *path,
 		     const ClockEdge *to_clk_edge);
   CheckCrpr *checkCrpr() { return check_crpr_; }
diff --git a/sdc/ExceptionPath.cc b/sdc/ExceptionPath.cc
index 47a119af..22dfaf5e 100644
--- a/sdc/ExceptionPath.cc
+++ b/sdc/ExceptionPath.cc
@@ -2146,9 +2146,8 @@ ExpandedExceptionVisitor::expandThrus(ExceptionFrom *expanded_from)
   ExceptionThruSeq *thrus = exception_->thrus();
   if (thrus) {
     // Use tail recursion to expand the exception points in the thrus.
-    ExceptionThruSeq::Iterator thru_iter(thrus);
     ExceptionThruSeq expanded_thrus;
-    expandThru(expanded_from, thru_iter, &expanded_thrus);
+    expandThru(expanded_from, 0, &expanded_thrus);
   }
   else
     expandTo(expanded_from, nullptr);
@@ -2156,40 +2155,41 @@ ExpandedExceptionVisitor::expandThrus(ExceptionFrom *expanded_from)
 
 void
 ExpandedExceptionVisitor::expandThru(ExceptionFrom *expanded_from,
-				     ExceptionThruSeq::Iterator &thru_iter,
+				     size_t next_thru_idx,
 				     ExceptionThruSeq *expanded_thrus)
 {
-  if (thru_iter.hasNext()) {
-    ExceptionThru *thru = thru_iter.next();
+  ExceptionThruSeq *thrus = exception_->thrus();
+  if (next_thru_idx < thrus->size()) {
+    ExceptionThru *thru = (*thrus)[next_thru_idx];
     const RiseFallBoth *rf = thru->transition();
     if (thru->pins()) {
       for (const Pin *pin : *thru->pins()) {
-        PinSet pins(network_);
-        pins.insert(pin);
-        ExceptionThru expanded_thru(&pins, nullptr, nullptr, rf, false, network_);
-        expanded_thrus->push_back(&expanded_thru);
-        expandThru(expanded_from, thru_iter, expanded_thrus);
-        expanded_thrus->pop_back();
+	PinSet pins(network_);
+	pins.insert(pin);
+	ExceptionThru expanded_thru(&pins, nullptr, nullptr, rf, false, network_);
+	expanded_thrus->push_back(&expanded_thru);
+	expandThru(expanded_from, next_thru_idx + 1, expanded_thrus);
+	expanded_thrus->pop_back();
       }
     }
     if (thru->nets()) {
       for (const Net *net : *thru->nets()) {
-        NetSet nets(network_);
-        nets.insert(net);
-        ExceptionThru expanded_thru(nullptr, &nets, nullptr, rf, false, network_);
-        expanded_thrus->push_back(&expanded_thru);
-        expandThru(expanded_from, thru_iter, expanded_thrus);
-        expanded_thrus->pop_back();
+	NetSet nets(network_);
+	nets.insert(net);
+	ExceptionThru expanded_thru(nullptr, &nets, nullptr, rf, false, network_);
+	expanded_thrus->push_back(&expanded_thru);
+	expandThru(expanded_from, next_thru_idx + 1, expanded_thrus);
+	expanded_thrus->pop_back();
       }
     }
     if (thru->instances()) {
       for (const Instance *inst : *thru->instances()) {
-        InstanceSet insts(network_);
-        insts.insert(inst);
-        ExceptionThru expanded_thru(nullptr, nullptr, &insts, rf, false, network_);
-        expanded_thrus->push_back(&expanded_thru);
-        expandThru(expanded_from, thru_iter, expanded_thrus);
-        expanded_thrus->pop_back();
+	InstanceSet insts(network_);
+	insts.insert(inst);
+	ExceptionThru expanded_thru(nullptr, nullptr, &insts, rf, false, network_);
+	expanded_thrus->push_back(&expanded_thru);
+	expandThru(expanded_from, next_thru_idx + 1, expanded_thrus);
+	expanded_thrus->pop_back();
       }
     }
   }
diff --git a/sdc/Sdc.cc b/sdc/Sdc.cc
index d26def4c..5b8b697c 100644
--- a/sdc/Sdc.cc
+++ b/sdc/Sdc.cc
@@ -5115,8 +5115,10 @@ ExpandException::visit(ExceptionFrom *from,
   ExceptionThruSeq *thrus_clone = nullptr;
   if (thrus) {
     thrus_clone = new ExceptionThruSeq;
-    for (ExceptionThru *thru : *thrus)
-      thrus_clone->push_back(thru->clone(network_));
+    for (ExceptionThru *thru : *thrus) {
+      ExceptionThru *thru_clone = thru->clone(network_);
+      thrus_clone->push_back(thru_clone);
+    }
   }
   ExceptionTo *to_clone = nullptr;
   if (to)
diff --git a/search/Search.cc b/search/Search.cc
index ab2a8901..bff6b4c8 100644
--- a/search/Search.cc
+++ b/search/Search.cc
@@ -2227,7 +2227,8 @@ PathVisitor::visitFromPath(const Pin *from_pin,
     }
   }
   else if (edge->role() == TimingRole::latchDtoQ()) {
-    if (min_max == MinMax::max()) {
+    if (min_max == MinMax::max()
+	&& clk) {
       arc_delay = search_->deratedDelay(from_vertex, arc, edge, false, path_ap);
       latches_->latchOutArrival(from_path, arc, edge, path_ap,
                                 to_tag, arc_delay, to_arrival);
diff --git a/search/Search.tcl b/search/Search.tcl
index 41f53a70..e11ac07e 100644
--- a/search/Search.tcl
+++ b/search/Search.tcl
@@ -978,7 +978,7 @@ proc report_slack { pin } {
 proc report_tag_arrivals { pin } {
   set pin [get_port_pin_error "pin" $pin]
   foreach vertex [$pin vertices] {
-    report_tag_arrivals_cmd $vertex
+    report_tag_arrivals_cmd $vertex 1
   }
 }
 
diff --git a/search/VisitPathEnds.cc b/search/VisitPathEnds.cc
index effc22b9..9e0ca3bc 100644
--- a/search/VisitPathEnds.cc
+++ b/search/VisitPathEnds.cc
@@ -178,9 +178,6 @@ VisitPathEnds::visitCheckEnd(const Pin *pin,
                     && tgt_clk != sdc_->defaultArrivalClock()
                     && sdc_->sameClockGroup(src_clk, tgt_clk)
                     && !sdc_->clkStopPropagation(tgt_pin, tgt_clk)
-                    && (search_->checkDefaultArrivalPaths()
-                        || src_clk_edge
-                        != sdc_->defaultArrivalClockEdge())
                     // False paths and path delays override
                     // paths.
                     && (exception == nullptr
@@ -360,9 +357,6 @@ VisitPathEnds::visitOutputDelayEnd1(OutputDelay *output_delay,
     is_constrained = true;
   }
   else if (src_clk_edge
-           && (search_->checkDefaultArrivalPaths()
-               || src_clk_edge
-               != sdc_->defaultArrivalClockEdge())
            && tgt_clk_edge
 	   && sdc_->sameClockGroup(path->clock(this), tgt_clk_edge->clock())
 	   // False paths and path delays override.